Commit Graph

63163 Commits

Author SHA1 Message Date
Elena Demikhovsky
8395251c0a Added INSERT and EXTRACT intructions from AVX-512 ISA.
All insertf*/extractf* functions replaced with insert/extract since we have insertf and inserti forms.
Added lowering for INSERT_VECTOR_ELT / EXTRACT_VECTOR_ELT for 512-bit vectors.
Added lowering for EXTRACT/INSERT subvector for 512-bit vectors.
Added a test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187491 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 11:35:14 +00:00
Richard Sandiford
f3068d02e5 [SystemZ] Add RISBLG and RISBHG instruction definitions
The next patch will make use of RISBLG for codegen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187490 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 11:17:35 +00:00
Richard Trieu
5b62bb0af1 Add parentheses to silence gcc warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187482 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 04:07:28 +00:00
Craig Topper
0c49a9b619 Increment arg_count inside the loop in printInline. Patch by Joe Matarazzo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187477 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 03:22:07 +00:00
Craig Topper
418eb3df74 Changed register names (and pointer keywords) to be lower case when using Intel X86 assembler syntax.
Patch by Richard Mitton.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187476 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 02:47:52 +00:00
Andrew Trick
d832d32f57 Fix a severe compile time problem when forming large SCEV expressions.
This fix is very lightweight. The same fix already existed for AddRec
but was missing for NAry expressions.

This is obviously an improvement and I'm unsure how to test compile
time problems.

Patch by Xiaoyi Guo!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187475 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 02:43:40 +00:00
Craig Topper
5bd1b815b3 Remove trailing whitespace and some tab characters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187472 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 02:00:15 +00:00
Craig Topper
1a5c55e54d Fixed incorrect disassembly for MOV16o16a when using Intel syntax.
Patch by Richard Mitton.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187471 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 01:50:26 +00:00
Eric Christopher
1a54c57cf6 Fix crashing on invalid inline asm with matching constraints.
For a testcase like the following:

 typedef unsigned long uint64_t;

 typedef struct {
   uint64_t lo;
   uint64_t hi;
 } blob128_t;

 void add_128_to_128(const blob128_t *in, blob128_t *res) {
   asm ("PAND %1, %0" : "+Q"(*res) : "Q"(*in));
 }

where we'll fail to allocate the register for the output constraint,
our matching input constraint will not find a register to match,
and could try to search past the end of the current operands array.

On the idea that we'd like to attempt to keep compilation going
to find more errors in the module, change the error cases when
we're visiting inline asm IR to return immediately and avoid
trying to create a node in the DAG. This leaves us with only
a single error message per inline asm instruction, but allows us
to safely keep going in the general case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187470 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 01:26:24 +00:00
Akira Hatanaka
782638aa0d [mips] Rename instruction DANDi to ANDi64.
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187469 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 00:57:41 +00:00
Akira Hatanaka
52b7321a48 [mips] Define instruction itineraries IIArith and IILogic.
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187468 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 00:55:34 +00:00
Matt Arsenault
1bf0ec4e16 Fix ptr vector inconsistency in CreatePointerCast
One form would accept a vector of pointers, and the other did not.
Make both accept vectors of pointers, and add an assertion
for the number of elements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187464 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 00:17:33 +00:00
Rafael Espindola
9ce8b2818d Fix windows' implementation of status when a file doesn't exist.
The unix one was returning no_such_file_or_directory, but the windows one
was return success.

Update the one one caller that was depending on the old behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187463 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 00:10:25 +00:00
Owen Anderson
605b3427a9 Preserve fast-math flags when folding (fsub x, (fneg y)) to (fadd x, y).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187462 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 23:53:17 +00:00
Eric Christopher
b0bee810e7 Reflow this to be easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187459 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 22:50:44 +00:00
Matt Arsenault
3181f5900f Respect address space sizes in isEliminableCastPair.
This avoids constant folding bitcast/ptrtoint/inttoptr combinations
that have illegal bitcasts between differently sized address spaces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187455 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 22:27:10 +00:00
Matt Arsenault
485c7fd76b Revert "Remove isCastable since nothing uses it now"
Apparently dragonegg uses it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187454 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 22:02:14 +00:00
Matt Arsenault
0de6832c16 Remove isCastable since nothing uses it now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187448 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 21:11:17 +00:00
David Majnemer
36850ad779 isKnownToBeAPowerOfTwo: Strengthen isKnownToBeAPowerOfTwo's analysis on add instructions
Call into ComputeMaskedBits to figure out which bits are set on both add
operands and determine if the value is a power-of-two-or-zero or not.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187445 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 21:01:36 +00:00
Matt Arsenault
f34dc428fa Change behavior of calling bitcasted alias functions.
It will now only convert the arguments / return value and call
the underlying function if the types are able to be bitcasted.
This avoids using fp<->int conversions that would occur before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187444 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 20:45:05 +00:00
Akira Hatanaka
80bec28b66 [mips] Delete instruction format for "bal".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187443 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 20:42:19 +00:00
Rafael Espindola
f4ab63f3d8 Implement getUniqueID for directories on windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187441 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 20:25:53 +00:00
Akira Hatanaka
8838da6587 [mips] Define "bal" as a pseudo instruction. Also, fix bug in the InstAlias that
turns "bal" into "bgezal".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187440 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 20:24:24 +00:00
Rafael Espindola
ed0a016e80 Remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187439 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 20:02:18 +00:00
Andrew Trick
c0173e6f9f Down-scale slot index distance to save bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187438 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 19:59:19 +00:00
Andrew Trick
d71efffdcf MI Sched: Track live-thru registers.
When registers must be live throughout the scheduling region, increase
the limit for the register class. Once we exceed the original limit,
they will be spilled, and there's no point further reducing pressure.

This isn't a perfect heuristics but avoids a situation where the
scheduler could become trapped by trying to achieve the impossible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187436 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 19:59:12 +00:00
Andrew Trick
1e46fcd989 MI Sched fix: assert "Disconnected LRG within the scheduling region."
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187435 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 19:59:08 +00:00
Venkatraman Govindaraju
8717679c44 [Sparc] Rewrite MBB's live-in registers for leaf functions. Also, add
register i7 as a live-in if current function's return address is taken.

This revision fixes PR16269.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187433 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 19:53:10 +00:00
Rui Ueyama
264e92d6db Implement TokenizeWindowsCommandLine.
This is a follow up patch for r187390 to implement the parser for the
Windows-style command line. This should follow the rule as described
at http://msdn.microsoft.com/en-us/library/windows/desktop/17w5ykft(v=vs.85).aspx

Differential Revision: http://llvm-reviews.chandlerc.com/D1235

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187430 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 19:03:20 +00:00
Tom Stellard
e3d60ac334 R600/SI: Expand vector fp <-> int conversions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187421 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 14:31:03 +00:00
Vladimir Medic
b67775df0c This patch implements parsing of mips FCC register operands. The example instructions have been added to test files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187410 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 10:12:14 +00:00
Saleem Abdulrasool
f7f22a64df [ARM] check bitwidth in PerformORCombine
When simplifying a (or (and B A) (and C ~A)) to a (VBSL A B C) ensure that the
bitwidth of the second operands to both ands match before comparing the negation
of the values.

Split the check of the value of the second operands to the ands.  Move the cast
and variable declaration slightly higher to make it slightly easier to follow.

Bug-Id: 16700
Signed-off-by: Saleem Abdulrasool <compnerd@compnerd.org>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187404 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 04:43:08 +00:00
Venkatraman Govindaraju
80cdaf35ab [Sparc] Use call's debugloc for the unimp instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187402 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 02:26:29 +00:00
Bill Schmidt
646cd7933b [PowerPC] Skeletal FastISel support for 64-bit PowerPC ELF.
This is the first of many upcoming patches for PowerPC fast
instruction selection support.  This patch implements the minimum
necessary for a functional (but extremely limited) FastISel pass.  It
allows the table-generated portions of the selector to be created and
used, but in most cases selection will fall back to the DAG selector.
None of the block terminator instructions are implemented yet, and
most interesting instructions require some special handling.
Therefore there aren't any new test cases with this patch.  There will
be quite a few tests coming with future patches.

This patch adds the make/CMake support for the new code (including
tablegen -gen-fast-isel) and creates the FastISel object for PPC64 ELF
only.  It instantiates the necessary virtual functions
(TargetSelectInstruction, TargetMaterializeConstant,
TargetMaterializeAlloca, tryToFoldLoadIntoMI, and FastLowerArguments),
but of these, only TargetMaterializeConstant contains any useful
implementation.  This is present since the table-generated code
requires the ability to materialize integer constants for some
instructions.

This patch has been tested by building and running the
projects/test-suite code with -O0.  All tests passed with the
exception of a couple of long-running tests that time out using -O0
code generation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187399 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 00:50:39 +00:00
Quentin Colombet
15d1b85094 [R600] Replicate old DAGCombiner behavior in target specific DAG combine.
build_vector is lowered to REG_SEQUENCE, which is something the register
allocator does a good job at optimizing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187397 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 00:27:16 +00:00
Quentin Colombet
75c9433b49 [DAGCombiner] insert_vector_elt: Avoid building a vector twice.
This patch prevents the following combine when the input vector is used more
than once.
insert_vector_elt (build_vector elt0, ..., eltN), NewEltIdx, idx
=>
build_vector elt0, ..., NewEltIdx, ..., eltN 

The reasons are:
- Building a vector may be expensive, so try to reuse the existing part of a
  vector instead of creating a new one (think big vectors).
- elt0 to eltN now have two users instead of one. This may prevent some other
  optimizations.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187396 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 00:24:09 +00:00
Eric Christopher
86aa03d5f9 Fix a truly egregious thinko in anonymous namespace check,
update testcase to make sure we generate debug info for walrus
by adding a non-trivial constructor and verify that we don't
emit an ODR signature for the type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187393 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 23:53:08 +00:00
Eric Christopher
944aa2b784 Make sure we don't emit an ODR hash for types with no name and make
sure the comments for each testcase are a bit easier to distinguish.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187392 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 23:53:05 +00:00
Eric Christopher
be48204a7b Elaborate a bit on the type unit and ODR conditional code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187385 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 22:24:32 +00:00
Rafael Espindola
e0913798bc Make file_status::getUniqueID const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187383 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 21:55:38 +00:00
Rafael Espindola
3ed45fe2be Include st_dev to make the result of getUniqueID actually unique.
This will let us use getUniqueID instead of st_dev directly on clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187378 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 21:26:49 +00:00
Akira Hatanaka
c0fa31d51b [mips] Add comment and simplify function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187371 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 19:08:34 +00:00
Nadav Rotem
79c6bee7a9 SLPVectorier: update the debug location for the new instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187363 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 18:18:46 +00:00
Nico Rieck
fdbea5107b Use proper section suffix for COFF weak symbols
32-bit symbols have "_" as global prefix, but when forming the name of
COMDAT sections this prefix is ignored. The current behavior assumes that
this prefix is always present which is not the case for 64-bit and names
are truncated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187356 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 13:58:39 +00:00
Nico Rieck
944061c4e1 Proper va_arg/va_copy lowering on win64
Win64 uses CharPtrBuiltinVaList instead of X86_64ABIBuiltinVaList like
other 64-bit targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187355 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 13:07:06 +00:00
Rafael Espindola
cf48cf23de Add support for the 's' operation to llvm-ar.
If no other operation is specified, 's' becomes an operation instead of an
modifier. The s operation just creates a symbol table. It is the same as
running ranlib.

We assume the archive was created by a sane ar (like llvm-ar or gnu ar) and
if the symbol table is present, then it is current. We use that to optimize
the most common case: a broken build system that thinks it has to run ranlib.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187353 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 12:40:31 +00:00
Nico Rieck
c63dce3c59 MC: Support larger COFF string tables
Single-slash encoded entries do not require a terminating null. This bumps
the maximum table size from ~1MB to ~9.5MB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187352 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 12:30:12 +00:00
Benjamin Kramer
9e036910f8 Some Intel Penryn CPUs come with SSE4 disabled. Detect them as core 2.
PR16721.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187350 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 11:02:08 +00:00
Silviu Baranga
fd79485dfa Allow generation of vmla.f32 instructions when targeting Cortex-A15. The patch also adds the VFP4 feature to Cortex-A15 and fixes the DontUseFusedMAC predicate so that we can still generate vmla.f32 instructions on non-darwin targets with VFP4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187349 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 09:25:50 +00:00
Robert Lytton
3d906e9846 test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187348 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 09:23:13 +00:00
Chandler Carruth
e1361ec325 Teach the AllocaPromoter which is wrapped around the SSAUpdater
infrastructure to do promotion without a domtree the same smarts about
looking through GEPs, bitcasts, etc., that I just taught mem2reg about.
This way, if SROA chooses to promote an alloca which still has some
noisy instructions this code can cope with them.

I've not used as principled of an approach here for two reasons:
1) This code doesn't really need it as we were already set up to zip
   through the instructions used by the alloca.
2) I view the code here as more of a hack, and hopefully a temporary one.

The SSAUpdater path in SROA is a real sore point for me. It doesn't make
a lot of architectural sense for many reasons:
- We're likely to end up needing the domtree anyways in a subsequent
  pass, so why not compute it earlier and use it.
- In the future we'll likely end up needing the domtree for parts of the
  inliner itself.
- If we need to we could teach the inliner to preserve the domtree. Part
  of the re-work of the pass manager will allow this to be very powerful
  even in large SCCs with many functions.
- Ultimately, computing a domtree has gotten significantly faster since
  the original SSAUpdater-using code went into ScalarRepl. We no longer
  use domfrontiers, and much of domtree is lazily done based on queries
  rather than eagerly.
- At this point keeping the SSAUpdater-based promotion saves a total of
  0.7% on a build of the 'opt' tool for me. That's not a lot of
  performance given the complexity!

So I'm leaving this a bit ugly in the hope that eventually we just
remove all of this nonsense.

I can't even readily test this because this code isn't reachable except
through SROA. When I re-instate the patch that fast-tracks allocas
already suitable for promotion, I'll add a testcase there that failed
before this change. Before that, SROA will fix any test case I give it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187347 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 09:06:53 +00:00
Nadav Rotem
3202f6cdb9 Don't vectorize when the attribute NoImplicitFloat is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187340 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 05:13:00 +00:00
Rafael Espindola
15658b2908 Fix -Wdocumentation warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187336 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-28 23:43:28 +00:00
Chandler Carruth
064a68682d Update comments for SSAUpdater to use the modern doxygen comment
standards for LLVM. Remove duplicated comments on the interface from the
implementation file (implementation comments are left there of course).
Also clean up, re-word, and fix a few typos and errors in the commenst
spotted along the way.

This is in preparation for changes to these files and to keep the
uninteresting tidying in a separate commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187335 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-28 22:00:33 +00:00
Chandler Carruth
65f12f1d05 Temporarily revert r187323 until I update SSAUpdater to match mem2reg.
I forgot that we had two totally independent things here. :: sigh ::

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187327 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-28 09:05:49 +00:00
Elena Demikhovsky
c18f4efc5d Added encoding prefixes for KNL instructions (EVEX).
Added 512-bit operands printing.
Added instruction formats for KNL instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187324 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-28 08:28:38 +00:00
Chandler Carruth
cea60aff34 Now that mem2reg understands how to cope with a slightly wider set of
uses of an alloca, we can pre-compute promotability while analyzing an
alloca for splitting in SROA. That lets us short-circuit the common case
of a bunch of trivially promotable allocas. This cuts 20% to 30% off the
run time of SROA for typical frontend-generated IR sequneces I'm seeing.
It gets the new SROA to within 20% of ScalarRepl for such code. My
current benchmark for these numbers is PR15412, but it fits the general
pattern of IR emitted by Clang so it should be widely applicable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187323 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-28 08:27:12 +00:00
Chandler Carruth
6c3a95dab5 Thread DataLayout through the callers and into mem2reg. This will be
useful in a subsequent patch, but causes an unfortunate amount of noise,
so I pulled it out into a separate patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187322 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-28 06:43:11 +00:00
Bill Schmidt
f5b9110ce1 [PowerPC] Add comment explaining preprocessor directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187320 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-28 03:23:32 +00:00
Bill Schmidt
eec21735b3 Revert 187318
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187319 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-28 02:13:24 +00:00
Bill Schmidt
8faa99081d [PowerPC] Remove unnecessary preprocessor checking.
The tests !defined(__ppc__) && !defined(__powerpc__) are not needed
or helpful when verifying that code is being compiled for a 64-bit
target.  The simpler test provided by this revision is sufficient to
tell if the target is 64-bit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187318 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-28 02:08:13 +00:00
Nadav Rotem
1aaaf34154 Update the comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187316 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 23:28:47 +00:00
Michael Gottesman
ca4d2e60ea [APFloat] Make all arithmetic operations with NaN produce positive NaNs.
IEEE-754R 1.4 Exclusions states that IEEE-754R does not specify the
interpretation of the sign of NaNs. In order to remove an irrelevant
variable that most floating point implementations do not use,
standardize add, sub, mul, div, mod so that operating anything with
NaN always yields a positive NaN.

In a later commit I am going to update the APIs for creating NaNs so
that one can not even create a negative NaN.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187314 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 21:49:25 +00:00
Michael Gottesman
060d34b1cf [APFloat] Move setting fcNormal in zeroSignificand() to calling code.
Zeroing the significand of a floating point number does not necessarily cause a
floating point number to become finite non zero. For instance, if one has a NaN,
zeroing the significand will cause it to become +/- infinity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187313 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 21:49:21 +00:00
Matt Arsenault
fe655dc155 Minor code simplification suggested by Duncan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187309 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 19:22:28 +00:00
Benjamin Kramer
1faea8f086 DwarfDebug: MD5 is always little endian, bswap on big endian platforms.
This makes LLVM emit the same signature regardless of host and target endianess.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187304 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 14:14:43 +00:00
Chandler Carruth
214de30d9d Create a constant pool symbol for the GOT in the ARMCGBR the same way we
do in the SDag when lowering references to the GOT: use
ARMConstantPoolSymbol rather than creating a dummy global variable. The
computation of the alignment still feels weird (it uses IR types and
datalayout) but it preserves the exact previous behavior. This change
fixes the memory leak of the global variable detected on the valgrind
leak checking bot.

Thanks to Benjamin Kramer for pointing me at ARMConstantPoolSymbol to
handle this use case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187303 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 11:58:26 +00:00
Chandler Carruth
6c54b3dfb4 Fix yet another memory leak found by the vg-leak bot. Folks (including
me) should start watching this bot more as its catching lots of bugs.

The fix here is to not construct the global if we aren't going to need
it. That's cheaper anyways, and globals have highly predictable types in
practice. I've added an assert to catch skew between our manual testing
of the type and the actual type just for paranoia's sake.

Note that this pattern is actually fine in most globals because when you
build a global with a module it automatically is moved to be owned by
that module. But here, we're in isel and don't really want to do that.
The solution of not creating a global is simpler anyways.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187302 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 11:23:08 +00:00
Chandler Carruth
05497cc965 Fix a memory leak in the debug emission by simply not allocating memory.
There doesn't appear to be any reason to put this variable on the heap.
I'm suspicious of the LexicalScope above that we stuff in a map and then
delete afterward, but I'm just trying to get the valgrind bot clean.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187301 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 11:09:58 +00:00
Chandler Carruth
37886438dd Fix a memory leak in the hexagon scheduler. We call initialize here more
than once, and the second time through we leaked memory. Found thanks to
the vg-leak bot, but I can't locally reproduce it with valgrind. The
debugger confirms that it is in fact leaking here.

This whole code is totally gross. Why is initialize being called on each
runOnFunction??? Why aren't these OwningPtr<>s, and why aren't their
lifetimes better defined? Anyways, this is just a surgical change to
help out the leak checking bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187299 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 10:48:45 +00:00
Chandler Carruth
89934cbd34 Don't use all the #ifdefs to hide the stats counters and instead rely on
their being optimized out in debug mode. Realistically, this just isn't
going to be the slow part anyways. This also fixes unused variable
warnings that are breaking LLD build bots. =/ I didn't see these at
first, and kept losing track of the fact that they were broken.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187297 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 10:17:49 +00:00
Chandler Carruth
33ae899113 Merge the removal of dead instructions and lifetime markers with the
analysis of the alloca. We don't need to visit all the users twice for
this. We build up a kill list during the analysis and then just process
it afterward. This recovers the tiny bit of performance lost by moving
to the visitor based analysis system as it removes one entire use-list
walk from mem2reg. In some cases, this is now faster than mem2reg was
previously.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187296 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 09:43:30 +00:00
Manman Ren
2d69cc4bae Debug Info Verifier: verify SPs in llvm.dbg.sp.
Also always add DIType, DISubprogram and DIGlobalVariable to the list
in DebugInfoFinder without checking them, so we can verify them later
on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187285 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 01:26:08 +00:00
Nick Lewycky
b66d765993 Also update CMakeLists.txt for r187283.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187284 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 01:25:51 +00:00
Nick Lewycky
81e480463d Reimplement isPotentiallyReachable to make nocapture deduction much stronger.
Adds unit tests for it too.

Split BasicBlockUtils into an analysis-half and a transforms-half, and put the
analysis bits into a new Analysis/CFG.{h,cpp}. Promote isPotentiallyReachable
into llvm::isPotentiallyReachable and move it into Analysis/CFG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187283 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 01:24:00 +00:00
Tom Stellard
57e6b2d1f3 SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions
Merge consecutive if-regions if they contain identical statements.
Both transformations reduce number of branches.  The transformation
is guarded by a target-hook, and is currently enabled only for +R600,
but the correctness has been tested on X86 target using a variety of
CPU benchmarks.

Patch by: Mei Ye

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187278 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-27 00:01:07 +00:00
Nadav Rotem
67a38a2875 SLP Vectorier: Don't vectorize really short chains because they are already handled by the SelectionDAG store-vectorizer, which does a better job in deciding when to vectorize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187267 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 23:07:55 +00:00
Nadav Rotem
a629c3a4f0 SLP Vectorizer: Disable the vectorization of non power of two chains, such as <3 x float>, because we dont have a good cost model for these types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187265 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 22:53:11 +00:00
Rafael Espindola
496cf2308a Revert "[PowerPC] Improve consistency in use of __ppc__, __powerpc__, etc."
This reverts commit r187248. It broke many bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187254 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 22:13:57 +00:00
Owen Anderson
107c578126 Fix variable name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187253 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 22:06:21 +00:00
Owen Anderson
0c326f07ca When InstCombine tries to fold away (fsub x, (fneg y)) into (fadd x, y), it is
also worthwhile for it to look through FP extensions and truncations, whose
application commutes with fneg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187249 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 21:40:29 +00:00
Bill Schmidt
d063a326b2 [PowerPC] Improve consistency in use of __ppc__, __powerpc__, etc.
Both GCC and LLVM will implicitly define __ppc__ and __powerpc__ for
all PowerPC targets, whether 32- or 64-bit.  They will both implicitly
define __ppc64__ and __powerpc64__ for 64-bit PowerPC targets, and not
for 32-bit targets.  We cannot be sure that all other possible
compilers used to compile Clang/LLVM define both __ppc__ and
__powerpc__, for example, so it is best to check for both when relying
on either inside the Clang/LLVM code base.

This patch makes sure we always check for both variants.  In addition,
it fixes one unnecessary check in lib/Target/PowerPC/PPCJITInfo.cpp.
(At least one of __ppc__ and __powerpc__ should always be defined when
compiling for a PowerPC target, no matter which compiler is used, so
testing for them is unnecessary.)

There are some places in the compiler that check for other variants,
like __POWERPC__ and _POWER, and I have left those in place.  There is
no need to add them elsewhere.  This seems to be in Apple-specific
code, and I won't take a chance on breaking it.

There is no intended change in behavior; thus, no test cases are
added.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187248 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 21:39:15 +00:00
Eric Christopher
388d3225dd Use more parens to clarify assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187247 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 21:16:25 +00:00
Eric Christopher
0be31910e0 Remove addLetterToHash, no functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187245 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 21:07:18 +00:00
Akira Hatanaka
9758562aa7 [mips] Implement llvm.trap intrinsic.
Patch by Sasa Stankovic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187244 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 20:58:55 +00:00
Akira Hatanaka
407883b69b [mips] Fix FP conditional move instructions to have explicit FP condition code
register operands.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187242 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 20:51:20 +00:00
Rafael Espindola
8b68480453 Add missing 'n'.
Thanks to Han Finkel for noticing it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187241 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 20:44:45 +00:00
Akira Hatanaka
83d8ef133b [mips] Fix FP branch instructions to have explicit FP condition code register
operands.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187238 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 20:13:47 +00:00
Manman Ren
ce0a12399c Debug Info Verifier: enable verification of DICompileUnit.
We used to call Verify before adding DICompileUnit to the list, and now we
remove the check and always add DICompileUnit to the list in DebugInfoFinder,
so we can verify them later on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187237 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 20:04:30 +00:00
Akira Hatanaka
0fc641df37 [mips] Increase the number of floating point condition code registers to eight.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187234 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 19:03:48 +00:00
Akira Hatanaka
9955cb931b [mips] Fix floating point branch, comparison, and conditional move instructions
to have register FCC0 (the first floating point condition code register) in
their Uses/Defs list.

No intended functionality change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187233 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 19:01:56 +00:00
Akira Hatanaka
d6a7ea2736 [mips] Delete register print method MipsInstPrinter::printCPURegs that is not
needed. The generic method printOperand will do.

No functionality change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187231 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 18:50:42 +00:00
Akira Hatanaka
9b06dd6ca2 [mips] Print instructions "beq", "bne" and "or" using assembler pseudo
instructions "beqz", "bnez" and "move", when possible.

beq $2, $zero, $L1 => beqz $2, $L1
bne $2, $zero, $L1 => bnez $2, $L1
or  $2, $3, $zero  => move $2, $3



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187229 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 18:34:25 +00:00
Stephen Lin
3b6bb79578 Correct case of m_UIToFp to m_UIToFP to match instruction name, add m_SIToFP for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187225 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 17:55:00 +00:00
Eric Christopher
d4afa8bbab Collapse conditional and add an assert for unhandled scope types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187224 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 17:45:19 +00:00
Matt Arsenault
58376d8ede Re-add DataLayout pointer size convenience functions.
These were reverted in r167222 along with the rest
of the last different address space pointer size attempt.
These will be used in later commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187223 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 17:37:20 +00:00
Eric Christopher
3dee575b8d Add preliminary support for hashing DIEs and breaking them into
type units.

Initially this support is used in the computation of an ODR checker
for C++. For now we're attaching it to the DIE, but in the future
it will be attached to the type unit.

This also starts breaking out types into the separation for type
units, but without actually splitting the DIEs.

In preparation for hashing the DIEs this adds a DIEString type
that contains a StringRef with the string contained at the label.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187213 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 17:02:41 +00:00
Eric Christopher
956e5aa3bd Add a way to get the context of any particular scope.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187212 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 17:02:36 +00:00
Reid Kleckner
65985348c5 Remove dead or useless header checks from cmake and autoconf
On Windows, this improves clean cmake configuration time on my
workstation from 1m58s to 1m32s, which is pretty significant.  There's
probably more that can be done here, but this is the low hanging fruit.

Eric volunteered to regenerate ./configure for me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187209 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 16:54:23 +00:00
Rafael Espindola
105a409679 Extend the lifetime of the strings passed to posix_spawn_file_actions_addopen.
Thanks to Hal Finkel for finding the bug and for the initial patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187208 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 16:21:31 +00:00
Rafael Espindola
71b1c76cdf Improve our error handling on windows.
* Remove LLVM_ENABLE_CRT_REPORT. LLVM_DISABLE_CRASH_REPORT made it redundant.
* set Return to 1, so that we get a stack trace on failure.
* don't call _exit, so that we get a negative exit value and "not --crash"
  correctly differentiates crashes and regular errors.

This is a bit experimental since the documentation on this interface is sparse.
It doesn't bring up a dialog on my windows setup, but feel free to revert
if it causes problem for your setup (and let me know what it is so that I
can try to fix this patch).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187206 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 14:55:36 +00:00
Justin Holewinski
320185fa5f Add a target legalize hook for SplitVectorOperand (again)
CustomLowerNode was not being called during SplitVectorOperand,
meaning custom legalization could not be used by targets.

This also adds a test case for NVPTX that depends on this custom
legalization.

Differential Revision: http://llvm-reviews.chandlerc.com/D1195

Attempt to fix the buildbots by making the X86 test I just added platform independent

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187202 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 13:28:29 +00:00
Rafael Espindola
c735c1c2ae Revert "Add a target legalize hook for SplitVectorOperand"
This reverts commit 187198. It broke the bots.

The soft float test probably needs a -triple because of name differences.
On the hard float test I am getting a "roundss $1, %xmm0, %xmm0", instead of
"vroundss $1, %xmm0, %xmm0, %xmm0".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187201 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 13:18:16 +00:00
Justin Holewinski
5a24ed951b Add a target legalize hook for SplitVectorOperand
CustomLowerNode was not being called during SplitVectorOperand,
meaning custom legalization could not be used by targets.

This also adds a test case for NVPTX that depends on this custom
legalization.

Differential Revision: http://llvm-reviews.chandlerc.com/D1195

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187198 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 12:46:39 +00:00
Richard Osborne
c223ec731e test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187195 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 10:19:02 +00:00
Richard Osborne
21a8e31c9e [XCore] Add TODO regarding byval structs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187193 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 09:50:55 +00:00
Chandler Carruth
8d93d41027 Re-implement the analysis of uses in mem2reg to be significantly more
robust. It now uses an InstVisitor and worklist to actually walk the
uses of the Alloca transitively and detect the pattern which we can
directly promote: loads & stores of the whole alloca and instructions we
can completely ignore.

Also, with this new implementation teach both the predicate for testing
whether we can promote and the promotion engine itself to use the same
code so we no longer have strange divergence between the two code paths.

I've added some silly test cases to demonstrate that we can handle
slightly more degenerate code patterns now. See the below for why this
is even interesting.

Performance impact: roughly 1% regression in the performance of SROA or
ScalarRepl on a large C++-ish test case where most of the allocas are
basically ready for promotion. The reason is because of silly redundant
work that I've left FIXMEs for and which I'll address in the next
commit. I wanted to separate this commit as it changes the behavior.
Once the redundant work in removing the dead uses of the alloca is
fixed, this code appears to be faster than the old version. =]

So why is this useful? Because the previous requirement for promotion
required a *specific* visit pattern of the uses of the alloca to verify:
we *had* to look for no more than 1 intervening use. The end goal is to
have SROA automatically detect when an alloca is already promotable and
directly hand it to the mem2reg machinery rather than trying to
partition and rewrite it. This is a 25% or more performance improvement
for SROA, and a significant chunk of the delta between it and
ScalarRepl. To get there, we need to make mem2reg actually capable of
promoting allocas which *look* promotable to SROA without have SROA do
tons of work to massage the code into just the right form.

This is actually the tip of the iceberg. There are tremendous potential
savings we can realize here by de-duplicating work between mem2reg and
SROA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187191 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 08:20:39 +00:00
Craig Topper
35786c0505 Fix more Intel syntax issues with FP instruction aliases. Test cases coming in a subsequent patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187187 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 05:37:46 +00:00
Tobias Grosser
e7bc5bb862 Make .bc en/decoding of AttrKind stable
The bitcode representation attribute kinds are encoded into / decoded from
should be independent of the current set of LLVM attributes and their position
in the AttrKind enum. This patch explicitly encodes attributes to fixed bitcode
values.

With this patch applied, LLVM does not silently misread attributes written by
LLVM 3.3. We also enhance the decoding slightly such that an error message is
printed if an unknown AttrKind encoding was dected.

Bonus: Dropping bitcode attributes from AttrKind is now easy, as old AttrKinds
       do not need to be kept to support the Bitcode reader.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187186 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 04:16:55 +00:00
Craig Topper
b3053c528a Take advantage of the register enums being in order to remove a couple static tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187182 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 02:02:47 +00:00
Bill Schmidt
f38cc38fa6 [PowerPC] Support powerpc64le as a syntax-checking target.
This patch provides basic support for powerpc64le as an LLVM target.
However, use of this target will not actually generate little-endian
code.  Instead, use of the target will cause the correct little-endian
built-in defines to be generated, so that code that tests for
__LITTLE_ENDIAN__, for example, will be correctly parsed for
syntax-only testing.  Code generation will otherwise be the same as
powerpc64 (big-endian), for now.

The patch leaves open the possibility of creating a little-endian
PowerPC64 back end, but there is no immediate intent to create such a
thing.

The LLVM portions of this patch simply add ppc64le coverage everywhere
that ppc64 coverage currently exists.  There is nothing of any import
worth testing until such time as little-endian code generation is
implemented.  In the corresponding Clang patch, there is a new test
case variant to ensure that correct built-in defines for little-endian
code are generated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187179 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 01:35:43 +00:00
Roman Divacky
6ebf55d811 PPC32 va_list is an actual structure so va_copy needs to copy the whole
structure not just a pointer. This implements that and thus fixes va_copy
on PPC32. Fixes #15286. Both bug and patch by Florian Zeitz!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187158 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 21:36:47 +00:00
Manman Ren
3367ed3220 Debug Info: update comments and add a FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187157 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 21:19:31 +00:00
Manman Ren
cb420a4bc0 Debug Info: improve the verifier to check field types.
Make sure the context field of DIType is MDNode.
Fix testing cases to make them pass the verifier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187150 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 19:33:30 +00:00
Rafael Espindola
6fccaafd8b Remove the mblaze backend from llvm.
Approval in here http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-July/064169.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187145 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 18:55:05 +00:00
Andrew Trick
bef4c3e069 RegAllocGreedy comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187141 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 18:35:22 +00:00
Andrew Trick
8adae96fd9 Evict local live ranges if they can be reassigned.
The previous change to local live range allocation also suppressed
eviction of local ranges. In rare cases, this could result in more
expensive register choices. This commit actually revives a feature
that I added long ago: check if live ranges can be reassigned before
eviction. But now it only happens in rare cases of evicting a local
live range because another local live range wants a cheaper register.

The benefit is improved code size for some benchmarks on x86 and armv7.

I measured no significant compile time increase and performance
changes are noise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187140 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 18:35:19 +00:00
Andrew Trick
6ea2b9608a Allocate local registers in order for optimal coloring.
Also avoid locals evicting locals just because they want a cheaper register.

Problem: MI Sched knows exactly how many registers we have and assumes
they can be colored. In cases where we have large blocks, usually from
unrolled loops, greedy coloring fails. This is a source of
"regressions" from the MI Scheduler on x86. I noticed this issue on
x86 where we have long chains of two-address defs in the same live
range. It's easy to see this in matrix multiplication benchmarks like
IRSmk and even the unit test misched-matmul.ll.

A fundamental difference between the LLVM register allocator and
conventional graph coloring is that in our model a live range can't
discover its neighbors, it can only verify its neighbors. That's why
we initially went for greedy coloring and added eviction to deal with
the hard cases. However, for singly defined and two-address live
ranges, we can optimally color without visiting neighbors simply by
processing the live ranges in instruction order.

Other beneficial side effects:

It is much easier to understand and debug regalloc for large blocks
when the live ranges are allocated in order. Yes, global allocation is
still very confusing, but it's nice to be able to comprehend what
happened locally.

Heuristics could be added to bias register assignment based on
instruction locality (think late register pairing, banks...).

Intuituvely this will make some test cases that are on the threshold
of register pressure more stable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187139 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 18:35:14 +00:00
Bill Wendling
9e2ef7780b Add a way to add a kind-value string pair to an attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187138 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 18:34:24 +00:00
Adrian Prantl
4c9d299d80 typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187135 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 17:52:30 +00:00
Tim Northover
4632e31f51 AArch64: fix even more JIT failures
The last patch corrected some issues, but constant-pool entries had actual
codegen bugs in the large memory model (which MCJIT uses).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187126 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 16:03:54 +00:00
Rafael Espindola
268f400c57 Don't end a file name with a dot. It looks odd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187124 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 15:00:17 +00:00
Tim Northover
107b2f26aa AArch64: don't mask off shift bits when processing JIT relocations.
This should actually make the MCJIT tests pass again on AArch64. I don't know
how I missed their failure before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187120 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 12:42:52 +00:00
Richard Sandiford
ea14085be5 [SystemZ] Rework compare and branch support
Before the patch we took advantage of the fact that the compare and
branch are glued together in the selection DAG and fused them together
(where possible) while emitting them.  This seemed to work well in practice.
However, fusing the compare so early makes it harder to remove redundant
compares in cases where CC already has a suitable value.  This patch
therefore uses the peephole analyzeCompare/optimizeCompareInstr pair of
functions instead.

No behavioral change intended, but it paves the way for a later patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187116 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 09:34:38 +00:00
Richard Sandiford
bf99364f81 [SystemZ] Add LOCR and LOCGR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187113 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 09:11:15 +00:00
Richard Sandiford
cf20e45cc4 [SystemZ] Add LOC and LOCG
As with the stores, these instructions can trap when the condition is false,
so they are only used for things like (cond ? x : *ptr).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187112 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 09:04:52 +00:00
Richard Sandiford
b284e1bf08 [SystemZ] Add STOC and STOCG
These instructions are allowed to trap even if the condition is false,
so for now they are only used for "*ptr = (cond ? x : *ptr)"-style
constructs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187111 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 08:57:02 +00:00
Andrew Trick
13372886a6 MI Sched: Register pressure heuristics.
Consider which set is being increased or decreased before comparing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187110 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 07:26:35 +00:00
Andrew Trick
4b43ed53b6 MI Sched: track register pressure by importance of the set, not weight of the units.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187109 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 07:26:32 +00:00
Andrew Trick
5dca613978 Dump LIS before regalloc. MI sched changes them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187107 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 07:26:26 +00:00
Manman Ren
27ce44d3b4 Debug Info: improve the verifier to check field types.
Make sure the context and type fields are MDNodes. We will generate
verification errors if those fields are non-empty strings.
Fix testing cases to make them pass the verifier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187106 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 06:43:01 +00:00
Rafael Espindola
4ef7eafa3f Respect llvm.used in Internalize.
The language reference says that:

"If a symbol appears in the @llvm.used list, then the compiler,
assembler, and linker are required to treat the symbol as if there is
a reference to the symbol that it cannot see"

Since even the linker cannot see the reference, we must assume that
the reference can be using the symbol table. For example, a user can add
__attribute__((used)) to a debug helper function like dump and use it from
a debugger.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187103 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 03:23:25 +00:00
Nick Lewycky
b97b162731 Check that TD isn't NULL before dereferencing it down this path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187099 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 02:55:14 +00:00
Rafael Espindola
2d680824e3 Make these methods const correct.
Thanks to Nick Lewycky for noticing it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187098 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 02:50:08 +00:00
Bill Wendling
f245ae5a4a Replace the "NoFramePointerElimNonLeaf" target option with a function attribute.
There's no need to specify a flag to omit frame pointer elimination on non-leaf
nodes...(Honestly, I can't parse that option out.) Use the function attribute
stuff instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187093 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-25 00:34:29 +00:00
Quentin Colombet
e644b7743b Fix a bug in IfConverter with nested predicates.
Prior to this patch, IfConverter may widen the cases where a sequence of
instructions were executed because of the way it uses nested predicates. This
result in incorrect execution.

For instance, Let A be a basic block that flows conditionally into B and B be a
predicated block.
B can be predicated with A.BrToBPredicate into A iff B.Predicate is less
"permissive" than A.BrToBPredicate, i.e., iff A.BrToBPredicate subsumes
B.Predicate.

The IfConverter was checking the opposite: B.Predicate subsumes
A.BrToBPredicate.

<rdar://problem/14379453>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187071 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 20:20:37 +00:00
Akira Hatanaka
94ce6dadd1 [mips] Make MipsAsmParser::parseCCRRegs return NoMatch instead of ParseFail
when there wasn't a match. This behavior is consistent with other register
parsing methods.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187063 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 18:43:52 +00:00
Manman Ren
504a7fb8f9 Debug Info: improve the Finder.
Improve the Finder to handle context of a DIVariable used by DbgValueInst.
Fix testing cases to make them pass the verifier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 17:10:09 +00:00
Benjamin Kramer
6a565e5be6 TRE: Move class into anonymous namespace.
While there shrink a dangerously large SmallPtrSet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187050 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 16:12:08 +00:00
Rafael Espindola
1e3c0a4c77 Don't leak when expanding response files.
Before this patch we would strdup each argument. If one was a response file,
we would replace it with the response file contents, leaking the original
strdup result.

We now don't strdup the originals and let StringSaver free any memory it
allocated. This also saves a bit of malloc traffic when response files are
not used.

Leak found by the valgrind build bot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187042 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 14:32:01 +00:00
Rafael Espindola
7976842791 Delete the buffer in createObjectFile if it fails.
The Binary constructor takes ownership of the memory buffer. This is a fairly
unfortunate interface, but for now make createObjectFile consistent with it
by also deleting the buffer if it fails.

Fixes a leak in llvm-ar found by the valgrind bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187039 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 14:00:26 +00:00
Petar Jovanovic
959d2f70fb [test commit] Minor comment change.
Testing commit access credentials.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187032 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 13:02:35 +00:00
Chandler Carruth
b7f27824fb Fix a problem I introduced in r187029 where we would over-eagerly
schedule an alloca for another iteration in SROA. This only showed up
with a mixture of promotable and unpromotable selects and phis. Added
a test case for this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187031 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 12:12:17 +00:00
Elena Demikhovsky
e3809eed34 I'm starting to commit KNL backend. I'll push patches one-by-one. This patch includes support for the extended register set XMM16-31, YMM16-31, ZMM0-31.
The full ISA you can see here: http://software.intel.com/en-us/intel-isa-extensions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187030 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 11:02:47 +00:00
Chandler Carruth
9b3b286247 Fix PR16687 where we were incorrectly promoting an alloca that had
pending speculation for a phi node. The problem here is that we were
using growth of the specluation set as an indicator of whether
speculation would occur, and if the phi node is already in the set we
don't see it grow. This is a symptom of the fact that this signal is
a total hack.

Unfortunately, I couldn't really come up with a non-hacky way of
signaling that promotion remains valid *after* speculation occurs, such
that we only speculate when all else looks good for promotion. In the
end, I went with at least a much more explicit approach of doing the
work of queuing inside the phi and select processing and setting
a preposterously named flag to convey that we're in the special state of
requiring speculating before promotion.

Thanks to Richard Trieu and Nick Lewycky for the excellent work reducing
a testcase for this from a pretty giant, nasty assert in a big
application. =] The testcase was excellent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187029 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 09:47:28 +00:00
David Fang
ef540b194f allow tests to run on powerpc-darwin8 again, checking for __ppc__
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187027 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 07:52:16 +00:00
Craig Topper
f63ef914b6 Split generated asm mnemonic matching table into a separate table for each asm variant.
This removes the need to store the asm variant in each row of the single table that existed before. Shaves ~16K off the size of X86AsmParser.o.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187026 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 07:33:14 +00:00
Craig Topper
8d5a10fe60 Revert accidental commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187021 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 04:52:55 +00:00
Craig Topper
f7beb2cc1f Fix aliases for shrd/shld to handle Intel syntax properly. Also suppress them from being used by the asm printer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187020 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 04:38:13 +00:00
Akira Hatanaka
3af1c9d334 [mips] Use pristine object file while processing relocations.
Similar to ARM change r182800, dynamic linker will read bits/addends from
    the original object rather than from the object that might have been patched
    previously. For the purpose of relocations for MCJIT stubs on MIPS, we
    internally use otherwise unused MIPS relocations.
    
    The change also enables MCJIT unit tests for MIPS (EL/BE), and the following
    two tests now pass:
    
    - MCJITTest.return_global and
    - MCJITTest.multiple_functions.
    
    These issues have been tracked as Bug 16250.

    Patch by Petar Jovanovic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187019 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-24 01:58:40 +00:00