Daniel Dunbar
03d7651c36
Remove Value::{isName, getNameRef}.
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Also, change MDString to use a StringRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77098 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 23:55:21 +00:00
Daniel Dunbar
d6fd377f33
Simplify JIT target selection.
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- Instead of requiring targets to define a JIT quality match function, we just
have them specify if they support a JIT.
- Target selection for the JIT just gets the host triple and looks for the best
target which matches the triple and has a JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77060 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 10:09:50 +00:00
Daniel Dunbar
0c795d6187
Add new helpers for registering targets.
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- Less boilerplate == good.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77052 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 06:49:55 +00:00
Evan Cheng
c7423aff68
80 col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77041 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 01:55:25 +00:00
Evan Cheng
c6b54d5a33
Get rid of a couple of unnecessary getOpcode calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77035 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 01:25:08 +00:00
Evan Cheng
3c91f36a45
Another TODO.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77026 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 00:39:37 +00:00
Evan Cheng
66ac53165e
Change Thumb2 jumptable codegen to one that uses two level jumps:
...
Before:
adr r12, #LJTI3_0_0
ldr pc, [r12, +r0, lsl #2 ]
LJTI3_0_0:
.long LBB3_24
.long LBB3_30
.long LBB3_31
.long LBB3_32
After:
adr r12, #LJTI3_0_0
add pc, r12, +r0, lsl #2
LJTI3_0_0:
b.w LBB3_24
b.w LBB3_30
b.w LBB3_31
b.w LBB3_32
This has several advantages.
1. This will make it easier to optimize this to a TBB / TBH instruction +
(smaller) table.
2. This eliminate the need for ugly asm printer hack to force the address
into thumb addresses (bit 0 is one).
3. Same codegen for pic and non-pic.
4. This eliminate the need to align the table so constantpool island pass
won't have to over-estimate the size.
Based on my calculation, the later is probably slightly faster as well since
ldr pc with shifter address is very slow. That is, it should be a win as long
as the HW implementation can do a reasonable job of branch predict the second
branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77024 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 00:33:29 +00:00
Daniel Dunbar
ce63ffb52f
More migration to raw_ostream, the water has dried up around the iostream hole.
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- Some clients which used DOUT have moved to DEBUG. We are deprecating the
"magic" DOUT behavior which avoided calling printing functions when the
statement was disabled. In addition to being unnecessary magic, it had the
downside of leaving code in -Asserts builds, and of hiding potentially
unnecessary computations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77019 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 00:23:56 +00:00
Evan Cheng
90daf4d035
ARM code emitter can't handle Thumb2 instructions yet. So don't even try.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77018 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 00:13:11 +00:00
Owen Anderson
eed707b1e6
Revert the ConstantInt constructors back to their 2.5 forms where possible, thanks to contexts-on-types. More to come.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77011 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 23:12:02 +00:00
Evan Cheng
0b6afa8c71
Uh. It would be useful to actually print the operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77004 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 20:47:38 +00:00
Evan Cheng
40efc251cd
Disable my constant island pass optimization (to make use soimm more effectively). It caused infinite looping on lencod.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76995 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 19:31:03 +00:00
Evan Cheng
49f846805e
Add a workaround for Darwin assembler bug where it's not setting the thumb bit in Thumb2 jumptable entries. We now pass Olden.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 18:54:23 +00:00
Evan Cheng
789476240d
Make sure thumb2 jumptable entries are aligned.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 18:20:44 +00:00
Evan Cheng
23606e35ab
Clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76984 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 18:20:16 +00:00
Evan Cheng
c324ecb7bc
Replace use of std::set with SmallPtrSet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76983 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 18:19:46 +00:00
Eli Friedman
23ed52752b
Remove unused member functions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76960 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 07:43:59 +00:00
Chris Lattner
c440cc7f2c
use section flags more correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76944 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 04:08:17 +00:00
Chris Lattner
fb3431aec5
reduce api exposure: clients shouldn't call SectionKindForGlobal directly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76941 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 03:49:17 +00:00
Evan Cheng
865763bf80
Thumb2 should use the register scavenger.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76930 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 01:05:51 +00:00
Evan Cheng
b74bb1a7a4
FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same instructions on all sub-targets.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76925 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 00:53:56 +00:00
David Goodwin
5ff58b5c3a
Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index elimination more exactly for Thumb-2 to get better code gen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76919 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 00:16:18 +00:00
Evan Cheng
eee839dd3c
Thumb2 does not allow the use of "pc" register as part of the load / store address.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76909 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-23 23:09:51 +00:00
Evan Cheng
d3d9d66dd2
Fix up ARM constant island pass for Thumb2.
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Also fixed up code to fully use the SoImm field for ADR on ARM mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76890 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-23 18:27:47 +00:00
Evan Cheng
81c102ba66
Since we have moved unified assembly, switch to ADR instruction instead of a the difficult-to-read .set + add syntax to materialize pc-relative address.
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Turns out this also fixed a poor code selection on Thumb1. I have no idea why we were using a mov + add to do the same thing as ADR before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76889 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-23 18:26:03 +00:00
David Goodwin
b53cc014d0
Fix frame index elimination to correctly handle thumb-2 addressing modes that don't allow negative offsets. During frame elimination convert *i12 opcode to a *i8 when necessary due to a negative offset.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76883 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-23 17:06:46 +00:00
Evan Cheng
697712c7d4
80 col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76872 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-23 07:58:08 +00:00
David Goodwin
e1e52edfff
Fix typo in addrmode definition.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76806 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 22:24:31 +00:00
Evan Cheng
eadf04992a
Use getTargetConstant instead of getConstant since it's meant as an constant operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76803 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 22:03:29 +00:00
Evan Cheng
78dd9dbdfb
Eliminate a redudant check Eli pointed out.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76762 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 18:08:05 +00:00
Evan Cheng
756da12ae4
Don't forget D16 - D31 are clobbered by calls and sjlj eh.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76729 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 06:46:53 +00:00
Evan Cheng
4a8b7d030b
Add R12 to the list of registers clobbered by 16-bit Thumb calls as a pre-caution. r12 could be live once we have mixed 32-bit and 16-bit instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76728 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 06:37:28 +00:00
Evan Cheng
3b6627b944
Fix a obvious copy-n-paste bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76727 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 06:12:40 +00:00
Evan Cheng
8295d99bff
Get rid one of the getRegisterNumbering. Also add D16 - D31.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76725 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 05:55:18 +00:00
Evan Cheng
064a6eacab
Add an entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76711 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 00:58:27 +00:00
Owen Anderson
e922c02019
Get rid of the Pass+Context magic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76702 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-22 00:24:57 +00:00
Evan Cheng
5d8f1cae76
Fixing cp island pass. Step 1: Determine whether the constant pool offset can be
...
negative on an individual bases rather than basing on whether it's in thumb
mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76698 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 23:56:01 +00:00
Evan Cheng
7fdf962e5c
Fix comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76693 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 23:54:22 +00:00
Chris Lattner
354c0165e7
no really, I can spell!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76679 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 23:36:01 +00:00
Chris Lattner
cb45963643
add an API so target-independent codegen can determine if a constant
...
pool entry will require relocations against it. I implemented this
conservatively for ARM, someone who is knowledgable about it should
see if this can be improved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76678 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 23:34:23 +00:00
Evan Cheng
6762d91c05
Add fake v7 itineraries for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76612 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 18:54:14 +00:00
Chris Lattner
40bbebde9d
make AsmPrinter::doFinalization iterate over the global variables
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and call PrintGlobalVariable, allowing elimination and simplification
of various targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76604 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 18:38:57 +00:00
Evan Cheng
3ecadc816d
Do not select tSXTB / tSXTH in thumb2 mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76600 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 18:15:26 +00:00
Evan Cheng
af9e7a7c20
Fix ARM isle code that optimize multiply by constants which are power-of-2 +/- 1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76520 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-21 00:31:12 +00:00
David Goodwin
c27a4547a3
CMP and TST define CPSR, not use it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76489 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 22:13:31 +00:00
Bill Wendling
5c0ba804c0
Rename Mangler linkage enums to something less gross.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76456 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 19:41:27 +00:00
David Goodwin
31e7eba06f
Use t2LDRri12 for frame index loads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76424 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 15:55:39 +00:00
Evan Cheng
f6fe957950
Fix PR4567. Thumb1 target was using the wrong instruction to handle sp = sub fp, #c.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76401 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 06:59:32 +00:00
Evan Cheng
91449a883d
Model fpscr to prevent fcmped / fcmpezs etc from being deleted.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76390 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 02:12:31 +00:00
Bill Wendling
3d10a5a757
Add plumbing for the `linker_private' linkage type. This type is meant for
...
"private" symbols which the assember shouldn't strip, but which the linker may
remove after evaluation. This is mostly useful for Objective-C metadata.
This is plumbing, so we don't have a use of it yet. More to come, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76385 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20 01:03:30 +00:00
Evan Cheng
b46aaa3874
Fix a regression from 76124. Thumb1 instructions default to S bit being true.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76374 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 19:16:46 +00:00
Daniel Dunbar
b384c85877
Add dependencies from TargetInfo onto .td generation.
...
- Shouldn't really be necessary, but currently .inc files get included into
some main target headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76349 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 00:21:12 +00:00
Daniel Dunbar
4cb1e13769
Put Target definitions inside Target specific header, and llvm namespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76344 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-18 23:03:22 +00:00
Jeffrey Yasskin
75402822d6
r76102 added the MachineCodeEmitter::processDebugLoc call and called it from
...
the X86 Emitter. This patch extends that to the rest of the targets that can
write to a MachineCodeEmitter: ARM, Alpha, and PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76211 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 18:49:39 +00:00
Evan Cheng
a6e4322ccc
Fix tSUBspi operand definition. It reads and writes sp, which is a high register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76155 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 05:43:12 +00:00
Anton Korobeynikov
b8e9ac834a
Emit cross regclass register moves for thumb2.
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Minor code duplication cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76124 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 23:26:06 +00:00
Evan Cheng
378445303b
Let callers decide the sub-register index on the def operand of rematerialized instructions.
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Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75900 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 09:20:10 +00:00
Daniel Dunbar
64cc972123
Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLink
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variables.
- Module initialization functions supplanted the need for these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75886 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 01:55:13 +00:00
Daniel Dunbar
5d77cad60b
Lift addAssemblyEmitter into LLVMTargetMachine.
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- No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75859 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 23:34:19 +00:00
Daniel Dunbar
cfe9a605ee
Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.
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- No intended functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75848 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 22:33:19 +00:00
Daniel Dunbar
f05522974b
Remove old style hacks to register AsmPrinter into TargetMachine.
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- No intended functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75843 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 22:01:32 +00:00
Daniel Dunbar
51b198af83
Reapply TargetRegistry refactoring commits.
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--- Reverse-merging r75799 into '.':
U test/Analysis/PointerTracking
U include/llvm/Target/TargetMachineRegistry.h
U include/llvm/Target/TargetMachine.h
U include/llvm/Target/TargetRegistry.h
U include/llvm/Target/TargetSelect.h
U tools/lto/LTOCodeGenerator.cpp
U tools/lto/LTOModule.cpp
U tools/llc/llc.cpp
U lib/Target/PowerPC/PPCTargetMachine.h
U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U lib/Target/PowerPC/PPCTargetMachine.cpp
U lib/Target/PowerPC/PPC.h
U lib/Target/ARM/ARMTargetMachine.cpp
U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U lib/Target/ARM/ARMTargetMachine.h
U lib/Target/ARM/ARM.h
U lib/Target/XCore/XCoreTargetMachine.cpp
U lib/Target/XCore/XCoreTargetMachine.h
U lib/Target/PIC16/PIC16TargetMachine.cpp
U lib/Target/PIC16/PIC16TargetMachine.h
U lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U lib/Target/Alpha/AlphaTargetMachine.cpp
U lib/Target/Alpha/AlphaTargetMachine.h
U lib/Target/X86/X86TargetMachine.h
U lib/Target/X86/X86.h
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U lib/Target/X86/X86TargetMachine.cpp
U lib/Target/MSP430/MSP430TargetMachine.cpp
U lib/Target/MSP430/MSP430TargetMachine.h
U lib/Target/CppBackend/CPPTargetMachine.h
U lib/Target/CppBackend/CPPBackend.cpp
U lib/Target/CBackend/CTargetMachine.h
U lib/Target/CBackend/CBackend.cpp
U lib/Target/TargetMachine.cpp
U lib/Target/IA64/IA64TargetMachine.cpp
U lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U lib/Target/IA64/IA64TargetMachine.h
U lib/Target/IA64/IA64.h
U lib/Target/MSIL/MSILWriter.cpp
U lib/Target/CellSPU/SPUTargetMachine.h
U lib/Target/CellSPU/SPU.h
U lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U lib/Target/CellSPU/SPUTargetMachine.cpp
U lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
U lib/Target/Mips/MipsTargetMachine.cpp
U lib/Target/Mips/MipsTargetMachine.h
U lib/Target/Mips/Mips.h
U lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U lib/Target/Sparc/SparcTargetMachine.cpp
U lib/Target/Sparc/SparcTargetMachine.h
U lib/ExecutionEngine/JIT/TargetSelect.cpp
U lib/Support/TargetRegistry.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75820 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 20:24:03 +00:00
Stuart Hastings
2286f8dc4c
Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build.
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Will revert 75770 in the llvm-gcc trunk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75799 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 17:27:11 +00:00
David Goodwin
7ecc850cf1
Thumb-2 only support [base_reg + offset_reg] addressing, not [base_reg - offset_reg].
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75789 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 15:50:19 +00:00
Daniel Dunbar
f3f4715ac1
Replace large swaths of copy-n-paste code with obvious helper function...
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- Which was already present in the module!
- I skipped this xform for Alpha, since it runs an extra pass during assembly
emission, but not when emitting assembly via the DumpAsm flag.
- No functionality change.
--
ddunbar@giles:llvm$ svn diff | grep '^- ' | sort | uniq -c
18 - PM.add(AsmPrinterCtor(ferrs(), *this, true));
18 - assert(AsmPrinterCtor && "AsmPrinter was not linked in");
18 - if (AsmPrinterCtor)
18 - if (DumpAsm) {
18 - }
ddunbar@giles:llvm$ svn diff | grep '^+ ' | sort | uniq -c
18 + addAssemblyEmitter(PM, OptLevel, true, ferrs());
18 + if (DumpAsm)
--
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75782 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 12:49:15 +00:00
Daniel Dunbar
6c05796294
Kill off old (TargetMachine level, not Target level) match quality functions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75780 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 12:26:05 +00:00
Daniel Dunbar
03f4bc5d6c
Provide TargetMachine implementations with reference to Target they were created
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from.
- This commit is almost entirely propogating the reference through the
TargetMachine subclasses' constructor calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75778 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 12:11:05 +00:00
Daniel Dunbar
4246790aa8
Register Target's TargetMachine and AsmPrinter in the new registry.
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- This abuses TargetMachineRegistry's constructor for now, this will get
cleaned up in time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75762 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 09:22:31 +00:00
Daniel Dunbar
c984df8602
Add TargetInfo libraries for all targets.
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- Intended to match current TargetMachine implementations.
- No facilities for linking these in yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75751 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 06:35:19 +00:00
Chris Lattner
b1ccad3b0d
convert arm/darwin stubs to use the mangler to synthesize all the names instead of
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doing it with printSuffixedName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75741 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 04:41:01 +00:00
Chris Lattner
4fb63d088b
fix an arm codegen bug (the same as PR4482 on ppc) where available_externally
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symbols were not getting stubs. While I'm at it, add a big testcase for
stub generation to make sure I don't break anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75737 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 04:12:33 +00:00
Chris Lattner
0a2385455b
convert [Hidden]GVNonLazyPtrs to compute the global and stub names
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with the mangler (like x86 and ppc), instead of going through
printSuffixedName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75736 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-15 03:12:43 +00:00
Owen Anderson
9adc0abad3
Move EVER MORE stuff over to LLVMContext.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75703 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 23:09:55 +00:00
Bob Wilson
8718bc4497
Fix bad indentation and 80-col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75686 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 21:45:58 +00:00
David Goodwin
4cb73525a9
Check for PRE_INC and POST_INC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75683 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 21:29:29 +00:00
David Greene
71847813bc
Have asm printers use formatted_raw_ostream directly to avoid a
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dynamic_cast<>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75670 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 20:18:05 +00:00
David Goodwin
419c615087
hasThumb2() does not mean we are compiling for thumb, must also check isThumb().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75660 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 18:48:51 +00:00
Bob Wilson
3eadf00b46
Remove an extra space.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75658 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 18:44:34 +00:00
Chris Lattner
b8158acc23
Reapply my previous asmprinter changes now with more testing and two
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additional bug fixes:
1. The bug that everyone hit was a problem in the asmprinter where it
would remove $stub but keep the L prefix on a name when emitting the
indirect symbol. This is easy to fix by keeping the name of the stub
and the name of the symbol in a StringMap instead of just keeping a
StringSet and trying to reconstruct it late.
2. There was a problem printing the personality function. The current
logic to print out the personality function from the DWARF information
is a bit of a cesspool right now that duplicates a bunch of other
logic in the asm printer. The short version of it is that it depends
on emitting both the L and _ prefix for symbols (at least on darwin)
and until I can untangle it, it is best to switch the mangler back to
emitting both prefixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75646 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 18:17:16 +00:00
Torok Edwin
c23197a26f
llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
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This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 16:55:14 +00:00
Daniel Dunbar
192957d376
Revert r75615, which depended on 75610.
...
--- Reverse-merging r75615 into '.':
U lib/Target/XCore/XCoreAsmPrinter.cpp
U lib/Target/PIC16/PIC16AsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
U lib/Target/MSP430/MSP430AsmPrinter.cpp
U lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U lib/Target/MSIL/MSILWriter.cpp
U lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75637 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 16:12:13 +00:00
Chris Lattner
b09d2ccc0f
Rename getValueName -> getMangledName.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75615 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 06:18:50 +00:00
Evan Cheng
f6bc4ae4a1
1. In Thumb mode, select tBx instead of ARM variants.
...
2. BX does not "use" the link register, it defines it.
3. Fix a couple more places in thumb td file that still uses pre-UAL syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75585 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 01:49:27 +00:00
David Goodwin
c2ffd286af
Fix detection of valid BFC immediates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75576 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 00:57:56 +00:00
Bob Wilson
e622087e20
Fix an obvious copy-and-paste error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75566 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 00:23:44 +00:00
Bob Wilson
60206140a1
Revert 75309.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-14 00:01:42 +00:00
David Goodwin
ea670f1dd8
Fix FP elimination code to work for Thumb-2 addrmode AddrModeT2_so. This fixes SingleSource/Benchmarks/Stanford/Queens (among others).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75513 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-13 21:43:08 +00:00
Bob Wilson
d2559bf3f3
Fix comment typos.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75479 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-13 18:11:36 +00:00
Torok Edwin
29fd056d81
Remove extra \n from LLVM_UNREACHABLE calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75416 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-12 07:15:17 +00:00
Torok Edwin
c25e7581b9
assert(0) -> LLVM_UNREACHABLE.
...
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-11 20:10:48 +00:00
Evan Cheng
ed338e80f9
Don't put IT instruction before conditional branches.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75361 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-11 07:26:20 +00:00
Evan Cheng
2f297df02e
Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is feasible.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75360 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-11 07:08:13 +00:00
Evan Cheng
446c428bf3
Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically.
...
A side-effect of this change is asm printer is now using unified assembly. There are some minor clean ups and fixes as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75359 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-11 06:43:01 +00:00
Evan Cheng
dd6f63209c
80 col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75358 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-11 06:37:27 +00:00
Bob Wilson
1e44ed88eb
Add superclasses of ARM Neon quad registers. The Q2PR class contains pairs of
...
quad registers and the Q4PR class holds sets of 4 quad registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75309 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 23:09:06 +00:00
David Goodwin
3ca524e336
Predicate VFP instructions on HasVFP2 instead of IsARM. This allows VFP instructions with thumb-2.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75254 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 17:03:29 +00:00
David Goodwin
b1beca635f
t2LDM_RET does not fall-through.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75250 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 15:33:46 +00:00
Duncan Sands
179bef3636
Add Thumb2ITBlockPass.cpp to CMakeLists.txt, fixing
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the cmake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75246 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 08:31:50 +00:00
Evan Cheng
b6264decdb
More info about Thumb1 predication support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75220 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 02:10:17 +00:00
Evan Cheng
892837abf3
We don't need separate thumb1 instructions tADDSi3 etc. for addc and subc. The "normal" version always modify condition register CPSR so we should just use def : pat to match to the same instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75219 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 02:09:04 +00:00
Evan Cheng
06e16587eb
Add a thumb2 pass to insert IT blocks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75218 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 01:54:42 +00:00
Evan Cheng
ab33150445
Move isPredicated from .cpp to .h
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75217 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 01:38:27 +00:00
Evan Cheng
b5619f42f4
80 col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 00:45:16 +00:00
Evan Cheng
9c06178e35
Remove a bogus assertion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75206 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 00:23:48 +00:00
Bob Wilson
97354f5181
Replace TM.getRegisterInfo() calls by TRI instance variable.
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Use getAsmName() method instead of accessing AsmName field directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75205 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-10 00:14:05 +00:00
Bob Wilson
9b4b00ad43
Handle 'a' modifier on inline assembly operands.
...
This is part of the fix for pr4521.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75201 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 23:54:51 +00:00
Evan Cheng
e5564748b7
Added Thumb IT instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75198 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 23:43:36 +00:00
Evan Cheng
896fe89f55
Another todo entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75192 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 23:17:28 +00:00
Evan Cheng
45032f2801
Initial support for load / store multiple opt pass Thumb2 support (post-allocation only). It's kind of there, but not quite. I'll return to this later.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75190 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 23:11:34 +00:00
Evan Cheng
c50a1cbf5f
Fix ldm / stm unified syntax; add t2LDM_RET.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75188 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 22:58:39 +00:00
Evan Cheng
d75223d6c6
LDM_RET should be marked mayLoad.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75187 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 22:57:41 +00:00
Evan Cheng
5c874172ac
Fix ldrd / strd address mode matching code. It allows for +/- 8 bit offset. Also change the printer to make the scale 4 explicit.
...
Note, we are not yet generating these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75181 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 22:21:59 +00:00
Evan Cheng
6dded67b0d
Add a Thumb readme entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75173 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 20:50:52 +00:00
Evan Cheng
cba962dd6b
Correct comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75172 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 20:40:44 +00:00
David Goodwin
8b98b85c64
Handle Thumb-2 addressing modes during FP elimination.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75158 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 18:35:52 +00:00
Owen Anderson
d1474d09cb
Thread LLVMContext through MVT and related parts of SDISel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75153 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 17:57:24 +00:00
Evan Cheng
1945b7b5c5
Reorg includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75115 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 06:49:09 +00:00
David Goodwin
f1daf7d8ab
Use common code for both ARM and Thumb-2 instruction and register info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75067 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 23:10:31 +00:00
Evan Cheng
dda0f4cb79
- Add some NEON ld / st instruction static encoding.
...
- Make bits 25-27 for ldrh, etc. explicitly zero. Previously only the JIT uses the encoding information and it's assuming anything not specified to be zero. Making them explicit so the disassembler is happy.
Patch by Sean Callanan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 22:51:32 +00:00
Evan Cheng
e7cbe4118b
Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75048 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 21:03:57 +00:00
Torok Edwin
3046470919
Missed an exit during the conversion.
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Will convert assert(0) that don't have abort() to LLVM_UNREACHABLE in a later
commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75045 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:55:50 +00:00
Torok Edwin
dac237e182
Implement changes from Chris's feedback.
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Finish converting lib/Target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75043 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:53:28 +00:00
Bob Wilson
2ed334694f
Implement NEON vst1 instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75037 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:32:02 +00:00
David Goodwin
77521f5232
Generalize opcode selection in ARMBaseRegisterInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75036 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:28:28 +00:00
Xerxes Ranby
cecbc964e1
Fix cmake build.
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Added ARMBaseRegisterInfo.cpp to lib/Target/ARM/CMakeLists.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75035 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:13:41 +00:00
David Goodwin
db5a71a8e0
Push methods into base class in preparation for sharing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75020 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 18:31:39 +00:00
Bob Wilson
205a5ca6cf
Implement NEON vld1 instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75019 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 18:11:30 +00:00
Torok Edwin
ab7c09b6b6
Start converting to new error handling API.
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cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75018 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 18:01:40 +00:00
David Goodwin
c140c4803d
Start breaking out common base functionality for register info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75016 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 17:28:55 +00:00
David Goodwin
334c26473b
Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75010 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 16:09:28 +00:00
Nick Lewycky
7f6aa2b162
Remove the vicmp and vfcmp instructions. Because we never had a release with
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these instructions, no autoupgrade or backwards compatibility support is
provided.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 03:04:38 +00:00
Evan Cheng
34a0fa362d
Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 01:46:35 +00:00
Evan Cheng
c9a4153eef
Add a todo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74976 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 00:05:05 +00:00
Evan Cheng
0fc0ade095
Also statically set bit 25 for BR_JT instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74974 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 23:45:10 +00:00
Evan Cheng
bc8a94540a
Statically encode bit 25 to indicate immediate form of data processing instructions. Patch by Sean Callanan.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74972 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 23:40:25 +00:00
Evan Cheng
e253c951b3
Add Thumb2 movcc instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74946 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 20:39:03 +00:00
Evan Cheng
1c83eb33c3
Add BX and BXr9 encodings. Patch by Sean Callanan.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74938 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 19:16:24 +00:00
Evan Cheng
40289b041a
Add Thumb2 pkhbt / pkhtb.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74895 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 05:35:52 +00:00
Evan Cheng
5b9fcd1c8e
Add some more Thumb2 multiplication instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74889 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 01:17:28 +00:00
Evan Cheng
58541fd627
80 col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74888 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 01:16:41 +00:00
Evan Cheng
3147fb2cff
isThumb2 really should mean thumb2 only, not thumb2+.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 22:29:14 +00:00
Evan Cheng
36a0aebac2
Add bfc to armv6t2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74868 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 22:23:46 +00:00
Evan Cheng
edcbada3d0
Added ARM::mls for armv6t2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74866 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 22:05:45 +00:00
Bruno Cardoso Lopes
ac57e6e498
Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
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cleanup, removed some #includes and moved Object Code Emitter out-of-line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74813 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 05:09:34 +00:00
Tilmann Scheller
6b61cd185e
Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed arguments in a vararg call.
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With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put
into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack.
The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 06:44:53 +00:00
Evan Cheng
d27c9fc403
Add thumb2 sign / zero extend with rotate instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74755 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 01:43:10 +00:00
Evan Cheng
2889ccea62
Add Thumb2 load / store multiple instructions. Not used yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74749 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 00:18:36 +00:00
Evan Cheng
78236f8c8a
t2LDR_PRE etc are loads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74741 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 00:08:19 +00:00
Evan Cheng
6d94f11196
Added indexed stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74740 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 00:06:39 +00:00
Evan Cheng
4fbb9960ad
Sign extending pre/post indexed loads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74736 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 23:16:11 +00:00
David Goodwin
b50ea5c48f
Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74731 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 22:18:33 +00:00
Douglas Gregor
033080cf6a
CMake build fixes, from Xerxes Ranby
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74720 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 18:53:52 +00:00
Evan Cheng
e88d5cee9d
Thumb2 pre/post indexed loads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74696 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 07:28:31 +00:00
Evan Cheng
0412957764
80 col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74693 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 06:44:30 +00:00
Evan Cheng
d770d9e7d1
Change the meaning of predicate hasThumb2 to mean thumb2 ISA is available, not that it's in thumb mode and thumb2 is available. Added isThumb2 predicate to replace the old predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74692 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 06:38:40 +00:00
Evan Cheng
31926a78e3
80 col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74683 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 01:30:04 +00:00
Evan Cheng
af4550f826
Factor out ARM indexed load matching code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74681 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 01:23:32 +00:00
Bob Wilson
8b024a5eb5
Add a new addressing mode for NEON load/store instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74658 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-01 23:16:05 +00:00
Bob Wilson
b864e89fe4
Fix a comment typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74650 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-01 21:59:43 +00:00
Bob Wilson
d4d826e170
Fix up a comment: besides the >80col lines, the operation for this
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addressing mode is encoded in the second operand, not the third.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74641 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-01 21:22:45 +00:00
Bill Wendling
b4202b84d7
Update comments to make it clear that the function alignment is the Log2 of the
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bytes and not bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74624 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-01 18:50:55 +00:00
Evan Cheng
2578ba26e7
Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74580 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-01 01:59:31 +00:00
Daniel Dunbar
5bcc8bd0c6
Remove unused AsmPrinter OptLevel argument, and propogate.
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- This more or less amounts to a revert of r65379. I'm curious to know what
happened that caused this variable to become unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74579 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-01 01:48:54 +00:00
David Goodwin
d1fa120aee
Add PIC load and store patterns for Thumb-2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74577 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-01 00:01:13 +00:00
David Goodwin
6647cea111
Thumb-2 load and store double description. But nothing yet creates them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74566 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 22:50:01 +00:00
Bill Wendling
20c568f366
Add an "alignment" field to the MachineFunction object. It makes more sense to
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have the alignment be calculated up front, and have the back-ends obey whatever
alignment is decided upon.
This allows for future work that would allow for precise no-op placement and the
like.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74564 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 22:38:32 +00:00
David Goodwin
73b8f16b36
Add thumb-2 store word, halfword, and byte.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74555 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 22:11:34 +00:00
David Goodwin
c9a59b5960
Improve Thumb-2 jump table support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74549 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 19:50:22 +00:00
David Goodwin
5e47a9a6e4
Add conditional and unconditional thumb-2 branch. Add thumb-2 jump table.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74543 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 18:04:13 +00:00
Evan Cheng
f3c21b857b
A few more load instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 02:15:48 +00:00
David Goodwin
baeb911d60
Add Thumb-2 support for TEQ amd TST.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 22:49:42 +00:00
David Goodwin
c0309b48b5
Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 15:33:01 +00:00
Duncan Sands
c91e68a0c4
Include the new file ThumbRegisterInfo.cpp to CMakeLists.txt
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to make sure ThumbRegisterInfo.cpp are compiled and linked in.
Patch by Xerxes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74421 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 13:11:32 +00:00
Evan Cheng
055b0310f8
Implement Thumb2 ldr.
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After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74420 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 07:51:04 +00:00
Anton Korobeynikov
55ad1f22b4
Simplify a bit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74385 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 12:59:03 +00:00
Anton Korobeynikov
a98cbc554c
ARM refactoring. Step 2: split RegisterInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74384 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 12:16:40 +00:00
Douglas Gregor
1b573d8b20
Add ThumbInstrInfo.cpp to the CMake makefiles
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74382 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 07:44:59 +00:00
Evan Cheng
9cb9e6778c
Renaming for consistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74368 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 02:26:13 +00:00
David Goodwin
8eba8e0ca3
Remove outdated comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74357 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 23:39:02 +00:00
David Goodwin
dcdaebc592
When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a narrow version and eor(i) does not.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74355 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 23:13:13 +00:00
Anton Korobeynikov
d49ea77cbc
Split thumb-related stuff into separate classes.
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Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74329 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 21:28:53 +00:00
David Goodwin
24062ac5be
Thumb-2 has CLZ.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74322 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 20:47:43 +00:00
David Goodwin
7ce720b448
Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74321 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 20:45:56 +00:00
David Goodwin
93d95bd2c3
ADC used to implement adde should use "adcs" opcode instead of "adc".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74293 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 18:07:25 +00:00
David Goodwin
83b3593478
Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI.
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Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74288 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 16:10:07 +00:00
Evan Cheng
2b51d51bc3
Simplify predicate CarryDefIsUsed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74277 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 06:10:18 +00:00
Devang Patel
0f05d22a31
Let's ignore MDStrings also!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74255 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 02:26:12 +00:00
Evan Cheng
151b9afdee
Add a note about commuting conditional move.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74241 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 00:28:48 +00:00
Evan Cheng
b604b2c470
These are done / no longer applicable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74239 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 00:25:27 +00:00
Evan Cheng
8de898abc8
Mark a bunch of instructions commutable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74237 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 00:19:44 +00:00
Evan Cheng
e864b74e95
tst is also commutable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74236 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 00:19:07 +00:00
Evan Cheng
6267422318
Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry bit def is not used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74228 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 23:34:10 +00:00
David Goodwin
0919a916bf
Use MVN for ~t2_so_imm immediates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74223 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 23:11:21 +00:00
David Goodwin
c9ee1189c5
Add Def/Use of CPSR for Thumb-1 instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74219 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 22:49:55 +00:00
Evan Cheng
9e03cbefc5
Unbreak mingw build. Patch by Viktor Kutuzov.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 22:04:44 +00:00
Evan Cheng
1e249e3705
ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and SBCS / RSCS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74200 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 20:59:23 +00:00
David Goodwin
9a36bdbaf1
Test commit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74185 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 17:52:32 +00:00
Bob Wilson
e481f12749
Revert 74164. We'll want to use this method later.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74176 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 16:03:07 +00:00
Bob Wilson
c9028e69f1
Remove unused hasV6T2Ops method. We already have a separate feature to
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identify Thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74164 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 05:20:31 +00:00
Douglas Gregor
4b73893d82
Add missing dependencies to the CMake build system.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74161 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 05:03:06 +00:00