Commit Graph

64678 Commits

Author SHA1 Message Date
Matthias Braun
331de11a0a Rename LiveRange to LiveInterval::Segment
The Segment struct contains a single interval; multiple instances of this struct
are used to construct a live range, but the struct is not a live range by
itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192392 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 21:28:43 +00:00
Matthias Braun
4afb5f560d Rename parameter: defined regs are not incoming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192391 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 21:28:38 +00:00
Matt Arsenault
828c9e73ba Use getPointerSizeInBits() rather than 8 * getPointerSize()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192386 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 19:09:05 +00:00
Manman Ren
b8e48a636e Debug Info: In DIBuilder, the context field of subprogram is updated to use
DIScopeRef.

A paired commit at clang is required due to changes to DIBuilder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192378 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 18:40:01 +00:00
Matt Arsenault
1cc41bf63c R600: Fix trunc i64 to i32 on SI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192375 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 18:04:16 +00:00
Tom Stellard
47fbbc2dc5 R600/SI: Implement SIInstrInfo::verifyInstruction() for VOP*
The function is used by the machine verifier and checks that VOP*
instructions have legal operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192367 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 17:11:55 +00:00
Tom Stellard
0f9eaaa8aa R600/SI: Define a separate MIMG instruction for each possible output value type
During instruction selection, we rewrite the destination register
class for MIMG instructions based on their writemasks.  This creates
machine verifier errors since the new register class does not match
the register class in the MIMG instruction definition.

We can avoid this by defining different MIMG instructions for each
possible destination type and then switching to the correct instruction
when we change the register class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192365 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 17:11:24 +00:00
Tom Stellard
219e788dc6 R600/SI: Mark the EXEC register as reserved
This prevents the machine verifier from complaining about uses of
an undefined physical register.

Reviewed-by: Vincent Lejeune<vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192364 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 17:11:19 +00:00
Tom Stellard
de28bdadff R600: Use StructurizeCFGPass for non SI targets
StructurizeCFG pass allows to make complex cfg reducible ; it allows a lot of
shader from shadertoy (which exhibits complex control flow constructs) to works
correctly with respect to CFG handling (and allow us to detect potential bug in
other part of the backend).

We provide a cmd line argument to disable the pass for debug purpose.

Patch by: Vincent Lejeune

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192363 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 17:11:12 +00:00
Hao Liu
6a5a667517 Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192361 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 17:00:52 +00:00
Rafael Espindola
812ddcc50f Revert "Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). Including following 14 instructions: 4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers. ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4). 4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers. st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4)."
This reverts commit r192352. It broke the build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192354 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 15:15:17 +00:00
Hao Liu
d622bef31d Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192352 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 15:01:24 +00:00
Benjamin Kramer
8ccf2b3c9e ARM: Put isV8EligibleForIT into the llvm namespace. While there make it inline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192350 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 14:35:45 +00:00
Tim Northover
acd79ce0ad ARM: correct liveness flags during ARMLoadStoreOpt
When we had a sequence like:

    s1 = VLDRS [r0, 1], Q0<imp-def>
    s3 = VLDRS [r0, 2], Q0<imp-use,kill>, Q0<imp-def>
    s0 = VLDRS [r0, 0], Q0<imp-use,kill>, Q0<imp-def>
    s2 = VLDRS [r0, 4], Q0<imp-use,kill>, Q0<imp-def>

we were gathering the {s0, s1} loads below the s3 load. This is fine,
but confused the verifier since now the s3 load had Q0<imp-use> with
no definition above it.

This should mark such uses <undef> as well. The liveness structure at
the beginning and end of the block is unaffected, and the true sN
definitions should prevent any dodgy reorderings being introduced
elsewhere.

rdar://problem/15124449

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192344 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 09:28:20 +00:00
Craig Topper
15de63cfde Allow non-AVX form of pmovmskb to take a GR64 operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192341 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 05:33:31 +00:00
Craig Topper
369cc505e0 Remove duplicate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192340 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 05:01:22 +00:00
Akira Hatanaka
25dafa388a [mips] Do not generate INS/EXT nodes if target does not have support for
ins/ext.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192330 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 23:36:17 +00:00
Rui Ueyama
6bba6bb12f Revert "llvm-c: Make target initializer functions external functions in lib."
This reverts commit r192316. The original change introduced circular
dependencies between libTarget and backends. That would broke a build unless
link everything into one big binary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192329 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 23:15:49 +00:00
Manman Ren
b4d9c11f6c Debug Info: In DIBuilder, the context and type fields of template_type and
template_value are updated to use DIRef.

A paired commit at clang is required due to changes to DIBuilder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192320 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 19:46:28 +00:00
Anders Waldenborg
9360e64e60 llvm-c: Make target initializer functions external functions in lib.
Making them proper functions defined in the (shared)lib instead of
static inlines defined in the header files makes it possible to
actually distribute a binary compiled against the shared library
without having to worry about getting undefined symbol errors when
calling e.g LLVMInitializeAllTargetInfos because the shared library on
the other system was compiled with different targets.

Differential Revision: http://llvm-reviews.chandlerc.com/D1714



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192316 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 19:02:09 +00:00
Manman Ren
5e5d494ce0 Debug Info: In DIBuilder, the context field of a forward decl is updated
to use DIScopeRef.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192309 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 18:10:55 +00:00
Benjamin Kramer
3353c592de Flip the ownership of MCStreamer and MCTargetStreamer.
MCStreamer now owns the target streamer. This prevents leaking the target
streamer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192303 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 17:23:41 +00:00
Shuxin Yang
e0409098ae Fix a bug in Dead Argument Elimination.
If a function seen at compile time is not necessarily the one linked to
the binary being built, it is illegal to change the actual arguments
passing to it. 

  e.g. 
   --------------------------
   void foo(int lol) {
     // foo() has linkage satisifying isWeakForLinker()
     // "lol" is not used at all.
   }

   void bar(int lo2) {
      // xform to foo(undef) is illegal, as compiler dose not know which
      // instance of foo() will be linked to the the binary being built.
      foo(lol2); 
   }
  -----------------------------

  Such functions can be captured by isWeakForLinker(). NOTE that
mayBeOverridden() is insufficient for this purpose as it dosen't include
linkage types like AvailableExternallyLinkage and LinkOnceODRLinkage.
Take link_odr* as an example, it indicates a set of *EQUIVALENT* globals
that can be merged at link-time. However, the semantic of 
*EQUIVALENT*-functions includes parameters. Changing parameters breaks
the assumption.

  Thank John McCall for help, especially for the explanation of subtle
difference between linkage types.

  rdar://11546243


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192302 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 17:21:44 +00:00
Rafael Espindola
1a525e8c80 Add a GlobalAlias::isValidLinkage to reduce code duplication.
Thanks to Reid Kleckner for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192298 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 16:07:32 +00:00
Venkatraman Govindaraju
3b73dea538 [Sparc] Disable tail call optimization for sparc64.
This patch fixes PR17506.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192294 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 12:50:39 +00:00
Elena Demikhovsky
50dc2ad46c AVX-512: Added VRCP28 and VRSQRT28 instructions and intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192283 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 08:16:14 +00:00
Tim Northover
d29bae8bc9 AArch64: enable MISched by default.
Substantial SelectionDAG scheduling is going away soon, and is
interfering with Hao's attempts to implement LDn/STn instructions, so
I say we make the leap first.

There were a few reorderings (inevitably) which broke some tests. I
tried to replace them with CHECK-DAG variants mostly, but some too
complex for that to be useful and I just reordered them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192282 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 07:53:57 +00:00
Andrew Trick
036c6e877b Add missing HasAVX512 predicate.
This was only working because AVX had cheaper rules in all cases.
I'm sure there are other places in this file where predicates are missing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192276 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 05:11:10 +00:00
Craig Topper
0c73c428d9 Replace a couple instructions with patterns referring to other instructions with same encoding and operands. Mark a couple other instructions as CodeGenOnly since we have FR and VR instructions and only one of them is needed by the assembler/disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192274 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 04:54:21 +00:00
Craig Topper
28ffa8a643 Use AVX512PIi8 for the alt forms of vcmp instructions. This adds the TB prefix and keeps the mnemonic from starting with an extra 'v'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192272 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 04:24:38 +00:00
Craig Topper
442b23a817 Mark some instructions as CodeGenOnly since they aren't needed by the assembler or disassembler. Disassembler already filtered them, but asm parser still had them in its tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192271 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 03:56:16 +00:00
Craig Topper
b96a393b09 Add in64BitMode/in32BitMode to the MMX/SSE2/AVX maskmovq/dq instructions. This way the asm parser will pick the right one based on the mode. Instruction selection already did the right thing based on the pointer size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192266 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 02:18:34 +00:00
Manman Ren
456e5e5521 Debug Info: In DIBuilder, the context field of a DICompositeType is updated
to use DIScopeRef.

A paired commit at clang is required due to changes to DIBuilder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192256 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-09 00:17:04 +00:00
Manman Ren
b6f74f0668 Debug Info: In DIBuilder, the context fields of a static member and a
typedef are updated to use DIScopeRef.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192254 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 23:49:38 +00:00
Manman Ren
c1e2b2582c Debug Info: In DIBuilder, the derived-from field of DICompositeType
is updated to use DITypeRef.

A paired commit at clang is required due to changes to DIBuilder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192251 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 23:28:51 +00:00
Manman Ren
78c2f9b8cf Debug Info: In DIBuilder, the derived-from field of DIDerivedType
is updated to use DITypeRef.

A paired commit at clang is required due to changes to DIBuilder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192246 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 22:56:31 +00:00
Chad Rosier
c976500793 [AArch64] Add support for NEON scalar floating-point reciprocal estimate,
reciprocal exponent, and reciprocal square root estimate instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192242 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 22:09:04 +00:00
Chad Rosier
3dfe644f7b [AArch64] Add support for NEON scalar signed/unsigned integer to floating-point
convert instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192231 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 20:43:30 +00:00
Reid Kleckner
73f615b0bd Explicitly request unsigned enum types when desired
This fixes repeated -Wmicrosoft warnings when self-hosting clang on
Windows, and gets us real unsigned enum types with MSVC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192227 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 20:15:11 +00:00
Reed Kotler
78f8339f35 Add fabsf to the list of inlined functions; otherwise
Mips16 will try and create a stub for it and this will
result in a link error because that function does not exist in libc.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192223 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 19:55:01 +00:00
Manman Ren
8199f0bc77 Add DbgVariable::resolve per Eric's suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192218 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 19:07:44 +00:00
Manman Ren
43251008c2 Debug Info: rename getOriginalTypeSize to getBaseTypeSize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192216 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 18:46:58 +00:00
Manman Ren
017ceda040 Debug Info: take advantage of the existing CU::resolve.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192215 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 18:42:58 +00:00
Akira Hatanaka
3e6a3becd5 [mips] Simplify and optimize code.
No intended functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192213 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 18:13:24 +00:00
Reed Kotler
b359bda93d Let rotr and bswap be handled by expansion for Mips16 since we don't
have native instructions for this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192207 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 17:32:33 +00:00
Eric Christopher
2565de926b Grammar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192199 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 16:47:11 +00:00
Rafael Espindola
88fc7015ce Fix build on Solaris 11.
Patch by Vladimir Voskresensky. The erros were:

Path.inc:274:3: error: ‘Dl_info’ was not declared in this scope
...

and

usr/include/spawn.h:52:14: error: expected ‘,’ or ‘...’ before ‘argv’

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192185 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 16:12:58 +00:00
Rafael Espindola
320296a4cf Add a MCTargetStreamer interface.
This patch fixes an old FIXME by creating a MCTargetStreamer interface
and moving the target specific functions for ARM, Mips and PPC to it.

The ARM streamer is still declared in a common place because it is
used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are
completely hidden in the corresponding Target directories.

I will send an email to llvmdev with instructions on how to use this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192181 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 13:08:17 +00:00
NAKAMURA Takumi
26c46ba11c SparcJITInfo.cpp: Prune "default:" label to fix a warning. [-Wcovered-switch-default]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192179 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 10:29:09 +00:00
NAKAMURA Takumi
35741ad518 Prune trailing linefeeds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192178 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 10:29:03 +00:00
Venkatraman Govindaraju
38aceb8714 [Sparc] Implement JIT for SPARC.
No new testcases. However, this patch makes all supported JIT testcases in 
test/ExecutionEngine  pass on Sparc.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192176 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 07:15:22 +00:00
Craig Topper
d55fed16a4 Remove unneeded MMX instruction definition by moving pattern to an equivalent instruction definition and removing the filtering from the disassembler table building.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192175 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 06:30:39 +00:00
Craig Topper
b9bc43852c Remove some instructions that existed to provide aliases to the assembler. Can be done with InstAlias instead. Unfortunately, this was causing printer to use 'vmovq' or 'vmovd' based on what was parsed. To cleanup the inconsistencies convert all 'vmovd' with 64-bit registers to 'vmovq', but provide an alias so that 'vmovd' will still parse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192171 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 05:53:50 +00:00
Venkatraman Govindaraju
3bd3419e86 [Sparc] Do not hardcode nop in the delay slot of TLS_CALL. Use DelaySlotFiller to fill the delay slot instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192160 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-08 02:50:29 +00:00
David Majnemer
34e1444ebd Windows: Avoiding resizing, use uninitialized data() instead
This is ever-so faster but more importantly matches what we have elsewhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192137 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 21:57:07 +00:00
Arnold Schwaighofer
1ee3c0008b LoopVectorize: External uses must use the last value in a reduction cycle
Otherwise, we don't perform operations that would have been performed on
the scalar version.

Fixes PR17498.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192133 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 21:05:43 +00:00
Reed Kotler
42be15fcbe Add Mips16 patterns for sign extend byte and sign extend halfword.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192130 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 20:46:19 +00:00
Manman Ren
fb92f46459 Struct byval: use the correct alignment for loads generated to load
from struct byval to registers.

We used to pass 0 which means the alignment of PtrVT. Even when the alignment
of the struct is smaller than 4, the LOADs would have alignment of 4, and
further optimizations could combine the LOADs into a ldm, which would
cause crash.

The fix is to pass the alignment of the struct byval.

rdar://problem/15144402


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192126 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 19:47:53 +00:00
Akira Hatanaka
116189a997 [mips] Coding style clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192125 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 19:33:02 +00:00
Akira Hatanaka
c746503425 [mips] Disable tail merging when long branch pass is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192124 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 19:13:53 +00:00
Benjamin Kramer
51a8280fbb X86: Fix type check. Just because an integer type is illegal doesn't mean it's i64.
Fixes PR17495, where an i24 triggered this code. It's intended to
optimize i64 loads on 32 bit x86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192123 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 19:11:35 +00:00
Akira Hatanaka
96ba8cb9b2 [mips] Define method MipsSubtarget::enableLongBranchPass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192122 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 19:06:57 +00:00
Alexey Samsonov
23eb90714b Revert r191834 until we measure the effect of this benchmarks and maybe find a better way to fix it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192121 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 19:03:24 +00:00
Akira Hatanaka
243702b95a [mips] Fix definition of mfhi and mflo instructions to read from the whole
accumulator instead of its sub-registers, $hi and $lo. 

We need this change to prevent a mflo following a mtlo from reading an
unpredictable/undefined value, as shown in the following example:

mult $6, $7 // result of $6 * $7 is written to $lo and $hi.
mflo $2     // read lower 32-bit result from $lo.
mtlo $4     // write to $lo. the content of $hi becomes unpredictable.
mfhi $3     // read higher 32-bit from $hi, which has an unpredictable value.

I don't have a test case for this change that reliably reproduces the problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192119 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 18:49:46 +00:00
Richard Mitton
379f76e873 Formally added an explicit enum for DWARF TLS support. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192118 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 18:39:18 +00:00
Matt Arsenault
c4a8c07f64 Change objectsize intrinsic to accept different address spaces.
Bitcasting everything to i8* won't work. Autoupgrade the old
intrinsic declarations to use the new mangling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192117 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 18:06:48 +00:00
Amara Emerson
ca7b2d08d7 [ARM] Improve build attributes emission.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192111 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 16:55:23 +00:00
Chad Rosier
2aeb4771a6 [AArch64] Add support for NEON scalar arithmetic instructions:
SQDMULH, SQRDMULH, FMULX, FRECPS, and FRSQRTS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192107 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 16:36:15 +00:00
NAKAMURA Takumi
e11f460ee0 Windows/Process.inc: Fix for +Asserts. &Buf[0] is not guaranteed if size is zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192103 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 15:33:30 +00:00
Rafael Espindola
d0acc84b2b Remove dead code.
Support for exception handling in the legacy JIT was removed in r181354 and
this code was dead since then.

Thanks to Yaron Keren for noticing it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192101 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 13:54:50 +00:00
Rafael Espindola
ef8c4ca252 Remove getEHExceptionRegister and getEHHandlerRegister.
They haven't been used for a long time. Patch by MathOnNapkins.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192099 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 13:39:22 +00:00
Rafael Espindola
c697f8b288 Fix the documentation of getDefaultSubtargetFeatures.
Patch by David Nadlinger.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192098 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 13:34:05 +00:00
Tim Northover
cf3e4cb29a ARM: allow cortex-m0 to use hint instructions
The hint instructions ("nop", "yield", etc) are mostly Thumb2-only, but have
been ported across to the v6M architecture. Fortunately, v6M seems to sit
nicely between v6 (thumb-1 only) and v6T2, so we can add a feature for it
fairly easily.

rdar://problem/15144406

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192097 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 11:10:47 +00:00
David Majnemer
ae06a63be5 Windows: Be more explicit with Win32 APIs
This addresses several issues in a similar vein:
 - Use the Unicode APIs when possible, running nm on clang shows that we
   only use Unicode APIs except for FormatMessage, CreateSemaphore, and
   GetModuleHandle.  AFAICT, the latter two are coming from MinGW and
   not LLVM itself.
 - Make getMainExecutable more resilient.  It previously considered
   return values of zero from ::GetModuleFileNameA to be acceptable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192096 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 09:52:36 +00:00
Craig Topper
e778f82a1e Remove some instructions that seem to only exist to trick the filtering checks in the disassembler table creation. Just fix up the filter to let the real instruction through instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192090 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 07:19:47 +00:00
Craig Topper
510fb362a8 Remove FsMOVAPSrr and friends. They have no patterns and are no longer selected anywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192089 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 06:10:45 +00:00
Craig Topper
8fdba75d5b Teach X86 asm parser that VMOVAPSrr and other VEX-encoded register to register moves should be switched from using the MRMSrcReg form to the MRMDestReg form if the source register is a 64-bit extended register and the destination register is not.
This allows the instruction to be encoded using the 2-byte VEX form instead of the 3-byte VEX form. The GNU assembler has similar behavior and instruction selection already does this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192088 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 05:42:48 +00:00
Craig Topper
36a9b31b98 Add disassembler support for long encodings for INC/DEC in 32-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192086 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 04:28:06 +00:00
David Majnemer
6a971bb8f5 Revert "Revert "Windows: Add support for unicode command lines""
This reverts commit r192070 which reverted r192069, I forgot to
regenerate the configure scripts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192079 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-07 01:00:07 +00:00
Craig Topper
32e3150fab Fix some assert messages to say the correct opcode name. Looks like one assert got copy and pasted to many places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192078 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-06 22:38:19 +00:00
David Majnemer
b262556c45 Revert "Windows: Add support for unicode command lines"
This is causing MinGW bots to fail.
This reverts commit r192069.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192070 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-06 20:44:34 +00:00
David Majnemer
5a1a1856a4 Windows: Add support for unicode command lines
Summary:
The MSVCRT deliberately sends main() code-page specific characters.
This isn't too useful to LLVM as we end up converting the arguments to
UTF-16 and subsequently attempt to use the result as, for example, a
file name.  Instead, we need to have the ability to access the Unicode
command line and transform it to UTF-8.

This has the distinct advantage over using the MSVC-specific wmain()
function as our entry point because:
 - It doesn't work on cygwin.
 - It only work on MinGW with caveats and only then on certain versions.
 - We get to keep our entry point as main(). :)

N.B.  This patch includes fixes to other parts of lib/Support/Windows
s.t. we would be able to take advantage of getting the Unicode paths.
E.G.  clang spawning clang -cc1 would want to give it Unicode arguments.

Reviewers: aaron.ballman, Bigcheese, rnk, ruiu

Reviewed By: rnk

CC: llvm-commits, ygao

Differential Revision: http://llvm-reviews.chandlerc.com/D1834

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192069 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-06 20:25:49 +00:00
Rafael Espindola
2def17935c Add support for aliases with linkonce_odr.
This will be used to extend constructor aliases in clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192066 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-06 15:10:43 +00:00
Benjamin Kramer
d9f7a185e3 X86: Don't fold spills into SSE operations if the stack is unaligned.
Regalloc can emit unaligned spills nowadays, but we can't fold the
spills into SSE ops if we can't guarantee alignment. PR12250.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192064 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-06 13:48:22 +00:00
Elena Demikhovsky
714319a169 AVX-512: added scalar convert instructions and intrinsics.
Fixed load folding in VPERM2I instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192063 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-06 13:11:09 +00:00
Venkatraman Govindaraju
79c5e0c5ca [Sparc] Do not emit nop after fcmp* instruction with V9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192056 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-06 07:06:44 +00:00
Elena Demikhovsky
a6269ee5fb AVX-512: fixed shuffle lowering
in case of BLEND and added VSHUFPS patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192055 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-06 06:11:18 +00:00
Venkatraman Govindaraju
20b10abf4e [Sparc] Custom lower addc/adde/subc/sube on i64 in sparc64.
This is required because i64 is a legal type but addxcc/subxcc reads icc carry bit, which are 32 bit conditional codes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192054 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-06 03:36:18 +00:00
Venkatraman Govindaraju
bb0ec9840b [Sparc] Use addxcc/subxcc for adde/sube instead of addx/subx.
addx/subx does not modify conditional codes whereas addxcc/subxx does.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192053 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-06 02:11:10 +00:00
Craig Topper
984fbe6c65 Add TBM instructions to loading folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192046 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 20:20:51 +00:00
Nick Lewycky
e66dd40d74 Rename this feature to "cx16" to match gcc's flag name. Apparently these strings
are directly tied to the flag names in clang with no remapping in between?


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192044 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 20:11:44 +00:00
Benjamin Kramer
87855d3013 Emit a better error when running out of registers on inline asm.
The most likely case where this error happens is when the user specifies
too many register operands. Don't make it look like an internal LLVM bug
when we can see that the error is coming from an inline asm instruction.
For other instructions we keep the "ran out of registers" error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192041 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 19:33:37 +00:00
Craig Topper
617ba175da Remove underscores from TBM instruction names for consistency with other instruction naming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192040 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 19:27:26 +00:00
Craig Topper
22abf7e17f Remove unneeded TBM intrinsics. The arithmetic/logical operation patterns are sufficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192039 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 19:22:59 +00:00
Craig Topper
e2522fd06c Add an additional pattern for BLCI since opt can turn (not (add x, 1)) into (sub -2, x).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192037 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 17:17:53 +00:00
Rafael Espindola
5e195a4c8d Remove some really nasty uses of hasRawTextSupport.
When MC was first added, targets could use hasRawTextSupport to keep features
working before they were added to the MC interface.

The design goal of MC is to provide an uniform api for printing assembly and
object files. Short of relaxations and other corner cases, a object file is
just another representation of the assembly.

It was never the intention that targets would keep doing things like

if (hasRawTextSupport())
  Set flags in one way.
else
  Set flags in another way.

When they do that they create two code paths and the object file is no longer
just another representation of the assembly. This also then requires testing
with llc -filetype=obj, which is extremelly brittle.

This patch removes some of these hacks by replacing them with smaller ones.
The ARM flag setting is trivial, so I just moved it to the constructor. For
Mips, the patch adds two temporary hack directives that allow the assembly
to represent the same things as the object file was already able to.

The hope is that the mips developers will replace the hack directives with
the same ones that gas uses and drop the -print-hack-directives flag.

I will also try to implement a target streamer interface, so that we can
move this out of the common code.

In summary, for any new work, two rules of the thumb are
  * Don't use "llc -filetype=obj" in tests.
  * Don't add calls to hasRawTextSupport.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192035 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 16:42:21 +00:00
Jiangning Liu
beb6afa843 Implement aarch64 neon instruction set AdvSIMD (Across).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192028 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 08:22:10 +00:00
Craig Topper
936910d929 Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192026 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 05:38:16 +00:00
Venkatraman Govindaraju
a8147756d6 [Sparc] Use correct alignment while loading/storing fp128 values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192023 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 02:29:47 +00:00
Andrew Kaylor
9cffedbbfd Adding multiple GOT handling to RuntimeDyldELF
Patch by Ashok Thirumurthi



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192020 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 01:52:09 +00:00
Manman Ren
c664d76716 Debug Info: In DIBuilder, the derived-from field of a DW_TAG_pointer_type
is updated to use DITypeRef.

Move isUnsignedDIType and getOriginalTypeSize from DebugInfo.h to be static
helper functions in DwarfCompileUnit. We already have a static helper function
"isTypeSigned" in DwarfCompileUnit, and a pointer to DwarfDebug is added to
resolve the derived-from field. All three functions need to go across link
for derived-from fields, so we need to get hold of a type identifier map.

A pointer to DwarfDebug is also added to DbgVariable in order to resolve the
derived-from field.

Debug info verifier is updated to check a derived-from field is a TypeRef.
Verifier will not go across link for derived-from fields, in debug info finder,
we go across the link to add derived-from fields to types.

Function getDICompositeType is only used by dragonegg and since dragonegg does
not generate identifier for types, we use an empty map to resolve the
derived-from field.

When printing a derived-from field, we use DITypeRef::getName to either return
the type identifier or getName of the DIType.

A paired commit at clang is required due to changes to DIBuilder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192018 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 01:43:03 +00:00
Eric Christopher
af76b1601c Reorganize some member variables and update a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192017 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 00:39:55 +00:00
Eric Christopher
72dd4cd1dd Fix one comment and update another. Slightly reformat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192016 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 00:32:34 +00:00
Venkatraman Govindaraju
b648122c5f [Sparc] Respect hasHardQuad parameter correctly when lowering SINT_TO_FP with fp128 operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192015 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 00:31:41 +00:00
Eric Christopher
eee74fbbb6 Add a resolve method on CompileUnit that forwards to DwarfDebug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192014 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 00:27:02 +00:00
Adrian Prantl
eacbfd1d51 Debug info: Don't crash in SelectionDAGISel when a vreg that is being
pointed to by a dbg_value belonging to a function argument is eliminated
during instruction selection.
rdar://problem/15094721.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192011 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 00:08:27 +00:00
Eric Christopher
22852c76f5 Make a bunch of CompileUnit member functions private.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192009 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-05 00:05:51 +00:00
Venkatraman Govindaraju
1c9524b624 [Sparc] Correct the floating point conditional code mapping in GetOppositeBranchCondition().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192006 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 23:54:30 +00:00
David Blaikie
c4eb353c7a Minor formatting/comment rewording/etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192005 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 23:52:02 +00:00
Eric Christopher
9aa0a93f22 Remove odd use of this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192004 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 23:49:31 +00:00
Eric Christopher
c543a8849e Reformat some odd formattings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192003 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 23:49:29 +00:00
Eric Christopher
ccb6636684 Tighten up some type arguments to functions. Where we expect a
scope, pass a scope.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192002 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 23:49:26 +00:00
Hal Finkel
fc3b7bbf49 UpdatePHINodes in BasicBlockUtils should not crash on duplicate predecessors
UpdatePHINodes has an optimization to reuse an existing PHI node, where it
first deletes all of its entries and then replaces them. Unfortunately, in the
case where we had duplicate predecessors (which are allowed so long as the
associated PHI entries have the same value), the loop removing the existing PHI
entries from the to-be-reused PHI would assert (if that PHI was not the one
which had the duplicates).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192001 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 23:41:05 +00:00
David Blaikie
356ccdceed Remove some dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192000 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 23:37:30 +00:00
David Blaikie
916d49e772 Simplify setting of DIE tag for type DIEs by setting it in one* place.
* two actually due to some weird template thing... investigating that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191998 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 23:21:16 +00:00
Eric Christopher
d3b3eef49b Prune includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191994 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 22:54:28 +00:00
Jack Carter
596654bd10 forgot to remove this file as well
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191993 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 22:54:05 +00:00
Jack Carter
6d389f5eba reverting per request
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191992 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 22:52:31 +00:00
Eric Christopher
371d95851a Use addFlag to add the enum class attribute.
This has the side effect of using DW_FORM_flag_present on dwarf4 and above.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191991 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 22:40:10 +00:00
Eric Christopher
9c0c948580 Use Die->addValue and DIEIntegerOne directly when we want to add
a flag. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191990 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 22:40:05 +00:00
Hal Finkel
03c8f8fbd5 Fix DAGCombiner::visitFP_EXTEND to ignore indexed loads
DAGCombiner::visitFP_EXTEND will apply the following transformation:

  fold (fpext (load x)) -> (fpext (fptrunc (extload x)))

but the implementation does not handle indexed loads (pre/post inc.), but did
not specifically ignore them either (unlike for extending loads, which it
already ignored), causing an assert when the transformation was applied to an
indexed load. This is the minimal fix for correctness (causing the
transformation to be skipped for indexed loads).

Unfortunately, I don't have an in-tree test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191989 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 22:18:12 +00:00
Reed Kotler
5404ed811d Support tblockaddr for static compilation in Mips16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191986 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 22:01:40 +00:00
Jack Carter
8e48edcf3d [MC][AsmParser] Hook for post assembly file processing
This patch handles LLVM standalone assembler (llvm-mc) ELF flag setting based on input file
directive processing.

Mips assembly requires processing inline directives that directly and
indirectly affect the output ELF header flags. This patch handles one
".abicalls".

To process these directives we are following the model the code generator
uses by storing state in a container as we go through processing and when
we detect the end of input file processing, AsmParser is notified and we
update the ELF header flags through a MipsELFStreamer method with a call from
MCTargetAsmParser::emitEndOfAsmFile(MCStreamer &OutStreamer).

This patch will allow other targets the same functionality.

Jack


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191982 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 21:26:15 +00:00
Akira Hatanaka
60ccc3b0ec [mips] Fix a bug in MipsLongBranch::replaceBranch, which was erasing
instructions in delay slots along with the original branch instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191978 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 20:51:40 +00:00
Arnold Schwaighofer
af57bdf7d6 SLPVectorizer: Sort inputs to commutative binary operations
Sort the operands of the other entries in the current vectorization root
according to the first entry's operands opcodes.

%conv0 = uitofp ...
%load0 = load float ...

= fmul %conv0, %load0
= fmul %load0, %conv1
= fmul %load0, %conv2

Make sure that we recursively vectorize <%conv0, %conv1, %conv2> and <%load0,
%load0, %load0>.

This makes it more likely to obtain vectorizable trees. We have to be careful
when we sort that we don't destroy 'good' existing ordering implied by source
order.

radar://15080067

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191977 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 20:39:16 +00:00
Eric Christopher
e7099f6ff4 Temporarily revert r176882 as it needs to be implemented in a different
way for all platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191975 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 19:40:33 +00:00
Eric Christopher
3f045005bf Temporarily revert r191792 as it is causing some LTO debug failures
on platforms with relocations in debug info and also temporarily
revert r191800 due to conflicts with the revert of r191792.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191967 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 17:08:38 +00:00
Matthias Braun
0bb5a66b03 Fix comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191966 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 16:53:02 +00:00
Matthias Braun
b38d9877f4 Fix indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191965 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 16:53:00 +00:00
Matthias Braun
b1aa5e43a2 Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191964 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 16:52:58 +00:00
Matthias Braun
d1bd8d904c ARM: optimizeSelect has to consider the previous register class
optimizeSelect folds (predicated) copy instructions, it must not ignore
the original register class of the operand when replacing the register
with the copies dest register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191963 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 16:52:56 +00:00
Matthias Braun
4e54f41d6c ARM: do not add a regmask for TAILJUMPs
The jump doesn't really kill the registers, the following call does but
we never get back anyway.
This avoids some verify-machineinstrs problems when TAILJUMPs are
if-converted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191962 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 16:52:54 +00:00
Matthias Braun
e1bde51d63 ARM: preserve undef flag in pseudo instruction expanders
Copy over the whole register machine operand instead of creating a new one
with an incomplete set of flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191961 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 16:52:51 +00:00
Jiangning Liu
dd518bcc9d Implement aarch64 neon instruction set AdvSIMD (3V elem).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191944 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 09:20:44 +00:00
Craig Topper
596cfd045f Revert r191940 to see if it fixes the build bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191941 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 05:52:17 +00:00
Craig Topper
d356295678 Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191940 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 05:22:20 +00:00
David Blaikie
c32f2332b0 DebugInfo: Fix ordering of members after r191928
In the case (shown in the attached test) where a member function
definition was emitted into debug info the following could occur:

1) build the debug info for the member function definition
2) in (1), build the debug info for the member function declaration
3) construct and add the member function declaration DIE
4) add it to its context
5) build its context (the type it is a member of)
6) construct the members and add them to the type
7) except don't add member functions because "getOrCreateSubprogram"
adds the function to its parent anyway
8) except we're only partway through building this subprogram
declaration so it hasn't been added yet - but we returned the partially
constructed DIE (since it's already in the MDNode->DIE mapping to avoid
infinitely recursing trying to create the member function DIE)
9) once the type is constructed, add the member function to it
10) now the members are out of order (the member function being defined
is listed as the last member, even though it was declared as the first)

To avoid this, construct the context of the subprogram DIE before we
query to see if it exists. That way we never end up creating it before
creating its context and ending up in this situation.

Alternatively, the type construction that visits/builds all the members
could call something like getOrCreateSubprogram, but that doesn't ever
do the "add to context" step. Then the type building code would always
be responsible for adding members (and the subprogram "addToContextDIE"
would no-op because the context building would have added the subprogram
declaration to the type/context DIE already).

(the test cases updated were overly-sensitive to offsets or abbreviation
numbers. We don't have a nice way to make these tests more robust as yet
- multiline FileCheck matches would be required)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191939 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 01:39:59 +00:00
Andrew Kaylor
b868e9101c Adding support and tests for multiple module handling in lli
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191938 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-04 00:49:38 +00:00
Richard Mitton
7c9659a3b2 Fixed a bug with section names containing special characters.
Changed the dwarf aranges code to not use getLabelEndName, as it turns out it's not reliable to call that given user-defined section names. Section names can have characters in that aren't representable as symbol names.

The dwarf-aranges test case has been updated to include a special character, to check this.

This fixes pr17416.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191932 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 22:07:08 +00:00
Owen Anderson
03e84c9df9 Pull fptrunc's upwards through selects when one of the select's selectands was a constant. This has a number of benefits, including producing small immediates (easier to materialize, smaller constant pools) as well as being more likely to allow the fptrunc to fuse with a preceding instruction (truncating selects are unusual).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 21:08:05 +00:00
David Blaikie
e5830c4e26 DebugInfo: Avoid redundantly adding child DIEs to parents.
DIE::addChild had a shortcircuit that silently no-op'd when a child was
readded to the same parent. This hid some quirky/redundant code in
DwarfDebug/CompileUnit. By removing that functionality and replacing it
with an assert I was able to find and cleanup those cases, mostly
centering around adding members to types in various circumstances.

1) The original oddity I noticed while working on type units (which
actually was helping me in the short term, by accident) was the
addToContextOwner call in constructTypeDIE. This call was completely
bogus (why was it only done for non-virtual types? what relevance does
that have at all) and redundant with the more uniform addToContextOwner
made in getOrCreateTypeDIE.

2) If a member function definition was visited (createSubprogramDIE), it
would attempt to build the member function declaration. The declaration
DIE would then be added to its context, but in building the context (the
type for which this function is a member) the members of the type would
be added to the type automatically, so by the time the context was
constructed, the member function was already associated with it.

3) The same as (2) but without the member function being constructed
first. Whenever a type was constructed, the members would be created and
member functions would be created by getOrCreateSubprogramDIE - this
would lead to the subprogram being added to the (incomplete) type
already, then the general member-construction code would add it again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191928 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 20:07:20 +00:00
Matt Arsenault
cee51c4803 Rename DataLayout variables TD -> DL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191927 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 19:50:01 +00:00
Rafael Espindola
438900938c Optimize linkonce_odr unnamed_addr functions during LTO.
Generalize the API so we can distinguish symbols that are needed just for a DSO
symbol table from those that are used from some native .o.

The symbols that are only wanted for the dso symbol table can be dropped if
llvm can prove every other dso has a copy (linkonce_odr) and the address is not
important (unnamed_addr).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191922 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 18:29:09 +00:00
Matt Arsenault
1df59ef1aa Make gep i8* X, -(ptrtoint Y) transform work with address spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191920 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 18:15:57 +00:00
Tom Roeder
d6370ad87d Test commit. Fixed a copy-paste error in the Makefile for lib/LTO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191918 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 18:05:12 +00:00
Quentin Colombet
4b3685de23 [llvm-c][Disassembler] When printing latency information, fall back to the
itinerary model in case the target does not supply a scheduling model.

By doing this, targets like cortex-a8 can benefit from the latency printing
feature added in r191859.

This part of <rdar://problem/14687488>. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191916 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 17:51:49 +00:00
Eric Christopher
45fae28db7 Make sure we emit a section for pubnames even if that section is
going to be empty. This is particularly important for the gnu
pubnames case since we're emitting a relocation to the section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191915 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 17:41:20 +00:00
Eric Christopher
7c9fc90c75 Fix cut and paste typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191914 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 17:41:16 +00:00
Benjamin Kramer
63fac20ec5 raw_fd_ostream: Be more verbose about the reason when opening a file fails.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191911 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 16:59:14 +00:00
Jin-Gu Kang
b70a05a871 Added checking code whehter target supports specific dag combining about rotate
or not. The corresponding dag patterns are as following:

"DAGCombier::MatchRotate" function in DAGCombiner.cpp
Pattern1
// fold (or (shl (*ext x), (*ext y)),
//          (srl (*ext x), (*ext (sub 32, y)))) ->
//   (*ext (rotl x, y))
// fold (or (shl (*ext x), (*ext y)),
//          (srl (*ext x), (*ext (sub 32, y)))) ->
//   (*ext (rotr x, (sub 32, y)))

pattern2
// fold (or (shl (*ext x), (*ext (sub 32, y))),
//          (srl (*ext x), (*ext y))) ->
//   (*ext (rotl x, y))
// fold (or (shl (*ext x), (*ext (sub 32, y))),
//          (srl (*ext x), (*ext y))) ->
//   (*ext (rotr x, (sub 32, y)))


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191905 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-03 15:58:48 +00:00