Commit Graph

102437 Commits

Author SHA1 Message Date
Saleem Abdulrasool
c09746dc9c COFF: fix an off by one error
Adjust the tests to validate the number of auxiliary entries used to store the
filename.

Thanks to majnemer's sharp eye for catching the missing - 1 in the round up
calculation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206359 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-16 06:22:53 +00:00
Craig Topper
5422dfb5b0 Convert SelectionDAG::getVTList to use ArrayRef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206357 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-16 06:10:51 +00:00
Craig Topper
695aa80f07 [C++11] More 'nullptr' conversion. In some cases just using a boolean check instead of comparing to nullptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206356 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-16 04:21:27 +00:00
Saleem Abdulrasool
73a7844c65 COFF: add support for .file symbols
Add support for emitting .file records.  This is mostly a quality of
implementation change (more complete support for COFF file emission) that was
noticed while working on COFF file emission for Windows on ARM.

A .file record is emitted as a symbol with storage class FILE (103) and the name
".file".  A series of auxiliary format 4 records follow which contain the file
name.  The filename is stored as an ANSI string and is padded with NULL if the
length is not a multiple of COFF::SymbolSize (18).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206355 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-16 04:15:32 +00:00
Saleem Abdulrasool
30e7a0ae04 tools: fix invalid printing, buffer overrun in llvm-readobj
All auxiliary records are consumed when accessing a File record.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206354 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-16 04:15:29 +00:00
Saleem Abdulrasool
eb0eb5dbec Target: whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206353 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-16 04:15:25 +00:00
Matt Arsenault
9fde950b1b R600: Extend r600 sign_extend_inreg tests for EG
Patch by: Jan Vesely <jan.vesely@rutgers.edu>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206349 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-16 01:41:34 +00:00
Matt Arsenault
ff8d7fb136 R600: Expand sign extension of vectors.
Setting vector types to expand will result in scalarization on pre SI hw,
as those gpus don't have vector shifts either.
Expand also i32 vectors, this helps llvm make the correct decision
about scalarizing the vector ops.

v2: move setOperation() calls to R600ISelLowering.cpp.
    cleanup the SI code to make it obvious that this patch does is nop for SI

Patch by: Jan Vesely <jan.vesely@rutgers.edu>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206348 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-16 01:41:30 +00:00
Jim Grosbach
ac261d9585 [ARM64,C++11] Tidy up branch relaxation a bit w/ c++11.
No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206344 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-16 00:42:46 +00:00
Jim Grosbach
e35b6d2695 ARM64: Nuke some dead code.
Missed in previous commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206343 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-16 00:42:43 +00:00
Jim Grosbach
09256c5bb5 [ARM64,C++11] Clean up the ARM64 LOH collection pass.
Range'ify a bunch of loops, mainly. As a result, we have a variety
of objects via reference rather than by pointer, so propogate that
through the various helper functions where it makes sense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206337 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 22:57:02 +00:00
Matt Arsenault
d66d570796 R600/SI: Print code size along with used registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206336 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 22:40:47 +00:00
Matt Arsenault
bec5c611e1 R600/SI: Print more immediates in hex format
Print in decimal for inline immediates, and hex otherwise. Use hex
always for offsets in addressing offsets.

This approximately matches what the shader compiler does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206335 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 22:32:49 +00:00
Matt Arsenault
dd368a8755 R600/SI: Cleanup parsing of register names.
Try to figure out the class and number of subregisters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206334 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 22:32:42 +00:00
Nick Lewycky
569e5a5b1c Make this test not match its own filename, when being run from a path that includes the string 'add'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206331 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 22:29:32 +00:00
Matt Arsenault
f8ea0352e0 R600/SI: Fix loads of i1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206330 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 22:28:39 +00:00
Tobias Grosser
d4955a007b RegionInfo: Do not access a value that was just moved away
This fixes a regression introduced in r206310.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206328 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 22:09:36 +00:00
Chandler Carruth
d24010f61a [Allocator] Fold the two templated overloads into a single one with
a default argument. The allocator interface we're modeling doesn't
distinguish between array and non-array allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206327 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 21:51:14 +00:00
Chandler Carruth
00e4a827f5 [Allocator] Remove a really problematic overload. This is very confusing
because there is another (size_t, size_t) overload of Allocator, and the
only distinguishing factor is that one is a tempalte and the other
isn't. There was only one usage of this and that one was easily
converted to carry the alignment constraint in the type itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206325 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 21:36:02 +00:00
Akira Hatanaka
f3930395f5 Make FastISel::SelectInstruction return before target specific fast-isel code
handles Intrinsic::trap if TargetOptions::TrapFuncName is set.

This fixes a bug in which the trap function was not taken into consideration
when a program was compiled without optimization (at -O0).

<rdar://problem/16291933>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206323 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 21:30:06 +00:00
Andrea Di Biagio
749e8fee34 [X86] Improve the lowering of packed shifts by constant build_vector.
This patch teaches the backend how to efficiently lower logical and
arithmetic packed shifts on both SSE and AVX/AVX2 machines.

When possible, instead of scalarizing a vector shift, the backend should try
to expand the shift into a sequence of two packed shifts by immedate count
followed by a MOVSS/MOVSD.

Example
  (v4i32 (srl A, (build_vector < X, Y, Y, Y>)))

Can be rewritten as:
  (v4i32 (MOVSS (srl A, <Y,Y,Y,Y>), (srl A, <X,X,X,X>)))

[with X and Y ConstantInt]

The advantage is that the two new shifts from the example would be lowered into
X86ISD::VSRLI nodes. This is always cheaper than scalarizing the vector into
four scalar shifts plus four pairs of vector insert/extract.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206316 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 19:30:48 +00:00
Quentin Colombet
49ad5d5dd5 [ARM64] Set default CPU to generic instead of cyclone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206313 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 19:08:46 +00:00
Robert Lougher
4634a9ba1e Revert r191049/r191059 as it can produce wrong code (see PR17975).
It has already been reverted on the 3.4 branch in r196521.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206311 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 18:34:24 +00:00
David Blaikie
2bbc5a7e2c Use unique_ptr to manage ownership of child Regions within llvm::Region
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206310 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 18:32:43 +00:00
Julien Lerouge
894b7f642c Add lifetime markers for allocas created to hold byval arguments, make them
appear in the InlineFunctionInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206308 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 18:06:46 +00:00
Julien Lerouge
031f5c1a82 Split byval argument initialization so the memcpy(s) are injected at the
beginning of the first new block after inlining.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206307 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 18:01:54 +00:00
Duncan P. N. Exon Smith
f5d9a1512c LTO: Add more loop simplification passes to LTO
Similar to r202051, add missing loop simplification passes to the LTO
optimization pipeline.

Patch by Rafael Espindola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206306 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 17:48:15 +00:00
Duncan P. N. Exon Smith
950c7b25bb verify-di: Add back braces for MSVC compatability
Fixup after r206300.

<rdar://problem/15500563>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206305 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 17:28:26 +00:00
Duncan P. N. Exon Smith
32791b02fa verify-di: Implement DebugInfoVerifier
Implement DebugInfoVerifier, which steals verification relying on
DebugInfoFinder from Verifier.

  - Adds LegacyDebugInfoVerifierPassPass, a ModulePass which wraps
    DebugInfoVerifier.  Uses -verify-di command-line flag.

  - Change verifyModule() to invoke DebugInfoVerifier as well as
    Verifier.

  - Add a call to createDebugInfoVerifierPass() wherever there was a
    call to createVerifierPass().

This implementation as a module pass should sidestep efficiency issues,
allowing us to turn debug info verification back on.

<rdar://problem/15500563>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206300 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 16:27:38 +00:00
Duncan P. N. Exon Smith
abf483ba52 verify-di: split out VerifierSupport
Split out assertion and output helpers from Verifier in preparation for
writing the DebugInfoVerifier.

<rdar://problem/15500563>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206299 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 16:27:32 +00:00
David Blaikie
3549f3cf19 Use unique_ptr to manage PassInfo instances in the PassRegistry
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206297 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 15:17:14 +00:00
NAKAMURA Takumi
9bc7c0707d MipsAsmParser.cpp: Fix vg_leak in MipsOperand::CreateMem(). Mem.Base is managed by k_Memory itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206293 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 14:13:21 +00:00
NAKAMURA Takumi
9bf9a794df MipsAsmParser::ParseRegister(): Be responsible to delete an Operand on a temporary Operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206292 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 14:06:27 +00:00
Tim Northover
1e3f66afe8 AArch64/ARM64: enable more AArch64 tests on ARM64.
No code changes for this bunch, just some test rejigs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206291 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 14:00:29 +00:00
Tim Northover
5f8234943d AArch64/ARM64: add missing pattern for extending load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206290 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 14:00:19 +00:00
Tim Northover
2a83cb71ad AArch64/ARM64: only mangle MOVZ/MOVN during encoding when needed
Sometimes we need emit the bits that would actually be a MOVN when producing a
relocated MOVZ instruction (don't ask). But not always, a check which ARM64 got
wrong until now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206289 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 14:00:15 +00:00
Tim Northover
5080ae2e21 AArch64/ARM64: add support for large code-model jump tables.
I've left the MachO CodeGen as it is, there's a reasonable chance it should use
the GOT like ConstPools, but I'm not certain.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206288 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 14:00:11 +00:00
Tim Northover
e9cae9b79f AArch64/ARM64: add patterns for various commutations of FNMADD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206287 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 14:00:06 +00:00
Tim Northover
e8bc8a7d58 AArch64/ARM64: add half as a storage type on ARM64.
This brings it into line with the AArch64 behaviour and should open the way for
certain OpenCL features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206286 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 14:00:03 +00:00
Tim Northover
380fa65d5d AArch64/ARM64: copy patterns for fixed-point conversions
Code is mostly copied directly across, with a slight extension of the
ISelDAGToDAG function so that it can cope with the floating-point constants
being behind a litpool.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206285 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 13:59:57 +00:00
Tim Northover
1291807e03 ARM64: add constraints to various FastISel operations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206284 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 13:59:53 +00:00
Tim Northover
03eecdccff FastISel: constrain the RegClass of operands when emitting instructions.
ARM64 suffered multiple -verify-machineinstr failures (principally over the
xsp/xzr issue) because FastISel was completely ignoring which subset of the
general-purpose registers each instruction required.

More fixes are coming in ARM64 specific FastISel, but this should cover the
generic problems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206283 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 13:59:49 +00:00
Tim Northover
f90c8c7063 AArch64/ARM64: add more arm64 lines to AArch64 regression tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206282 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 13:59:44 +00:00
Tim Northover
3f2d713f4d AArch64/ARM64: add dp tests from AArch64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206281 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 13:59:40 +00:00
NAKAMURA Takumi
86a70cd2f5 ARM64AsmParser.cpp: Fix vg_leak in MC/ARM64/fp-encoding.s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206279 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 13:22:11 +00:00
Stepan Dyatkovskiy
5fba9d3b5e Optional hash symbol feature support for ARM64
http://reviews.llvm.org/D3328



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206276 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 11:43:09 +00:00
Vladimir Medic
09a79dc1a0 Current definition of subtract with immediate instruction aliases uses CodeGenOnly defined instructions and post matcher expansion methods to emit real instructions add with immediate. However, they can directly alias add with immediate instruction and remove unnecessary definitions and code in MipsAsmParser.cpp. This patch makes no change in functionality, just removes unnecessary definitions and code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206272 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 10:14:49 +00:00
NAKAMURA Takumi
bc4e3c024c vect.omp.persistence.ll REQUIRES asserts due to -debug-only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206271 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 10:12:47 +00:00
Chandler Carruth
b9a99d4593 [Allocator] Finally, finish nuking the redundant code that led me here
by removing the MallocSlabAllocator entirely and just using
MallocAllocator directly. This makes all off these allocators expose and
utilize the same core interface.

The only ugly part of this is that it exposes the fact that the JIT
allocator has no real handling of alignment, any more than the malloc
allocator does. =/ It would be nice to fix both of these to support
alignments, and then to leverage that in the BumpPtrAllocator to do less
over allocation in order to manually align pointers. But, that's another
patch for another day. This patch has no functional impact, it just
removes the somewhat meaningless wrapper around MallocAllocator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206267 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 09:44:09 +00:00
Alexey Bataev
15cbb64eb4 D3348 - [BUG] "Rotate Loop" pass kills "llvm.vectorizer.enable" metadata
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206266 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 09:37:30 +00:00