1decd56b8d
[cleanup] Re-sort all the includes with utils/sort_includes.py.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202811 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-04 10:07:28 +00:00
7f15e90281
[mips] Implement %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions
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Patch implements %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions for MIPS
by creating target expression class MipsMCExpr.
Patch by Sasa Stankovic.
Differential Revision: http://llvm-reviews.chandlerc.com/D2592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200783 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-04 18:41:57 +00:00
d194a4ae67
Distinguish and choose 16 or 32 bit forms of save/restore for Mips16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196999 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-11 03:32:44 +00:00
c9ea75ee5b
Cleaning up of prologue/epilogue code for Mips16. First step
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here is to make save/restore into variable number of argument instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196726 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-08 16:51:52 +00:00
c8a1fa77a7
[mips][msa] Added support for matching splati from normal IR (i.e. not intrinsics)
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Updated some of the vshf since they (correctly) emit splati's now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191511 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-27 11:48:57 +00:00
93d995719e
[mips][msa] Added support for matching shf from normal IR (i.e. not intrinsics)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191302 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-24 14:20:00 +00:00
d65d2fde4e
[mips] Place parentheses around && to silence warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190234 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-07 00:26:26 +00:00
1d04ca7987
[mips] Make "b" (unconditional branch) a pseudo. "b" is an assembly idiom, which is
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equivalent to "beq $zero, $zero, offset".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190220 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-06 23:40:15 +00:00
d22b327b3d
[micromips] Print instruction alias "not" if the last operand of a nor is zero.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188851 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 01:18:46 +00:00
014096e4d5
[mips] Delete unnecessary InstAliases. Also, clear some of the InstAlias'
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EmitAlias flag and have MipsInstPrinter::printAlias print the aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187824 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 22:35:29 +00:00
a1fe9ef62e
[mips] Replace usages of register classes with register operands. Also, remove
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unnecessary jalr InstAliases in Mips64InstrInfo.td and add the code to print
jalr InstAliases in MipsInstPrinter::printAlias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187821 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 22:20:40 +00:00
8838da6587
[mips] Define "bal" as a pseudo instruction. Also, fix bug in the InstAlias that
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turns "bal" into "bgezal".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187440 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-30 20:24:24 +00:00
c0fa31d51b
[mips] Add comment and simplify function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187371 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-29 19:08:34 +00:00
83d8ef133b
[mips] Fix FP branch instructions to have explicit FP condition code register
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operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187238 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 20:13:47 +00:00
d6a7ea2736
[mips] Delete register print method MipsInstPrinter::printCPURegs that is not
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needed. The generic method printOperand will do.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187231 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 18:50:42 +00:00
9b06dd6ca2
[mips] Print instructions "beq", "bne" and "or" using assembler pseudo
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instructions "beqz", "bnez" and "move", when possible.
beq $2, $zero, $L1 => beqz $2, $L1
bne $2, $zero, $L1 => bnez $2, $L1
or $2, $3, $zero => move $2, $3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187229 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 18:34:25 +00:00
37ef65b9c1
This patch that sets the EmitAlias flag in td files
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and enables the instruction printer to print aliased
instructions.
Due to usage of RegisterOperands a change in common
code (utils/TableGen/AsmWriterEmitter.cpp) is required
to get the correct register value if it is a RegisterOperand.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174358 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-05 08:32:10 +00:00
ec3199f675
This patch tackles the problem of parsing Mips
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register names in the standalone assembler llvm-mc.
Registers such as $A1 can represent either a 32 or
64 bit register based on the instruction using it.
In addition, based on the abi, $T0 can represent different
32 bit registers.
The problem is resolved by the Mips specific AsmParser
td definitions changing to work together. Many cases of
RegisterClass parameters are now RegisterOperand.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172284 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-12 01:03:14 +00:00
f09a03776d
[mips] Generate big GOT code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168460 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-21 20:40:38 +00:00
b22c9289b0
Add HIGHER and HIGHEST relocations to Mips backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160599 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-21 03:09:04 +00:00
a7e4558ec8
Enclose instruction rdhwr with directives, which are needed when target is
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mips32 rev1 (the directives are emitted when target is mips32r2 too).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159770 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-05 19:26:38 +00:00
c97ef618d2
Move getOpcodeName from the various target InstPrinters into the superclass MCInstPrinter.
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All implementations used the same code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153866 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-02 08:32:38 +00:00
7c0b3c1fb6
Remove getInstructionName from MCInstPrinter implementations in favor of using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153863 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-02 07:01:04 +00:00
bb481f8820
remove blanks, and some code format
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151625 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28 07:46:26 +00:00
c5707112e7
remove Emacs-tag form .cpp files in Mips Backend, and fix some typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150805 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-17 08:55:11 +00:00
8f5e8c1cd6
add Emacs tag and fix some comment error in file headers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150775 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-17 01:23:50 +00:00
bc2198133a
Convert assert(0) to llvm_unreachable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149961 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-07 02:50:20 +00:00
8209968306
Tidy up. Simplify logic. No functional change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146896 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19 19:52:25 +00:00
3faac0a78c
Add support for local dynamic TLS model in LowerGlobalTLSAddress. Direct object
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emission is not supported yet, but a patch that adds the support should follow
soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146572 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 18:26:41 +00:00
e3d3572e28
Add a few moreLocal/Global R_MIPS_GOT related fixups and
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make the addend fixup code a bit more generic
Patch by Jack Carter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145998 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 00:28:57 +00:00
d5cf5a631f
Fix printing of MCSymbolRegExpr. Needs three closing parentheses for
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VK_Mips_GPOFF_HI/LO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144366 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 03:58:36 +00:00
ce1a538ab5
Properly handle Mips MC relocations and lower cpload and cprestore macros to MCInsts.
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Patch by Jack Carter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144139 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-08 22:26:47 +00:00
5908536673
Replace (Lower|Upper)caseString in favor of StringRef's newest methods.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-06 20:37:06 +00:00
519020adf1
These do not need to be conditional on the presence of CommentStream, as they have a fallback path now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140267 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 17:58:45 +00:00
317eaf1993
In the disassembler C API, be careful not to confuse the comment streamer that the disassembler outputs annotations on with the streamer that the InstPrinter will print them on.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140217 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 00:25:23 +00:00
98c5ddabca
Don't attach annotations to MCInst's. Instead, have the disassembler return, and the printer accept, an annotation string which can be passed through if the client cares about annotations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139876 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 23:38:46 +00:00
404507e7d8
80 columns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-09 00:13:35 +00:00
70629abe31
Silence compiler warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134730 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08 20:18:13 +00:00
794bf17cbe
Lower MachineInstr to MC Inst and print to .s files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134661 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 23:56:50 +00:00
