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1137 Commits

Author SHA1 Message Date
Johnny Chen
8d668a8605 Add disassembly test cases for: 
A8.6.292 VCMPE


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128120 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-22 23:08:56 +00:00
Johnny Chen
27c6baeca2 LDRT and LDRBT was incorrectly tagged as IndexModeNone during the refactorings (r119821). 
We now tag them as IndexModePost.

This fixed http://llvm.org/bugs/show_bug.cgi?id=9530.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128113 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-22 22:28:49 +00:00
Johnny Chen
83cf2ffdcd Add one more test case for VFP Load/Store Multiple (vpop). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128106 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-22 20:21:08 +00:00
Johnny Chen
758df29741 A8.6.399 VSTM: 
VFP Load/Store Multiple Instructions used to embed the IA/DB addressing mode within the
MC instruction; that has been changed so that now, for example, VSTMDDB_UPD and VSTMDIA_UPD
are two instructions.  Update the ARMDisassemblerCore.cpp's DisassembleVFPLdStMulFrm()
to reflect the change.

Also add a test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128103 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-22 20:00:10 +00:00
Rafael Espindola
7c18fa87a4 Write the section table and the section data in the same order that 
gun as does. This makes it a lot easier to compare the output of both
as the addresses are now a lot closer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127972 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-20 18:44:20 +00:00
Johnny Chen
94dad03a96 Fixed an assert by the ARM disassembler for LDRD_PRE/POST. 
The relevant instruction table entries were changed sometime ago to no longer take
<Rt2> as an operand.  Modify ARMDisassemblerCore.cpp to accomodate the change and
add a test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127935 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-19 01:16:20 +00:00
Owen Anderson
0082830cb2 Add support to the ARM asm parser for the register-shifted-register forms of basic instructions like ADD. More work left to be done to support other instances of shifter ops in the ISA. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127917 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-18 22:50:18 +00:00
Joerg Sonnenberger
96622aa063 Support explicit argument forms for the X86 string instructions. 
For now, only the default segments are supported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127875 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-18 11:59:40 +00:00
Johnny Chen
5e5a40867a The disassembler for Thumb was wrongly adding 4 to the computed imm32 offset. 
Remove the offending logic and update the test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127843 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-18 00:38:03 +00:00
Johnny Chen
e68d8ec252 It used to be that t_addrmode_s4 was used for both: 
o A8.6.195 STR (register) -- Encoding T1
o A8.6.193 STR (immediate, Thumb) -- Encoding T1

It has been changed so that now they use different addressing modes
and thus different MC representation (Operand Infos).  Modify the
disassembler to reflect the change, and add relevant tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127833 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 22:04:05 +00:00
Daniel Dunbar
8d06ffca9b MC/Mach-O: Fix regression introduced in r126127, this assignment shouldn't have 
been removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127812 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 16:25:24 +00:00
Joerg Sonnenberger
d02c8b6cc1 Fix handling of @IDNTPOFF relocations, they need to get STT_TLS. 
While here, add VK_ARM_TPOFF and VK_ARM_GOTTPOFF, too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127780 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 00:35:10 +00:00
Johnny Chen
276f6f9cf9 There were two issues fixed: 
1. The ARM Darwin *r9 call instructions were pseudo-ized recently.
   Modify the ARMDisassemblerCore.cpp file to accomodate the change.

2. The disassembler was unnecessarily adding 8 to the sign-extended imm24:

   imm32 = SignExtend(imm24:'00', 32); // A8.6.23 BL, BLX (immediate)
                                       // Encoding A1

   It has no business doing such.  Removed the offending logic.

Add test cases to arm-tests.txt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127707 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 22:27:33 +00:00
Sean Callanan
9a9d8b9732 Basic sanity checks to ensure that 2- and 3-byte 
VEX prefixes are working for triadic AVX
instructions.  This concludes the patch set to
enable AVX support for the X86 disassebler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127647 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 01:32:46 +00:00
Johnny Chen
085ea1b633 Fixed an ARM disassembler bug where it does not handle STRi12 correctly because an extra 
register operand was erroneously added.  Remove an incorrect assert which triggers the bug.

rdar://problem/9131529


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127642 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 01:13:17 +00:00
Cameron Zwarich
899eaa3569 Roll r127459 back in: 
Optimize trivial branches in CodeGenPrepare, which often get created from the
lowering of objectsize intrinsics. Unfortunately, a number of tests were relying
on llc not optimizing trivial branches, so I had to add an option to allow them
to continue to test what they originally tested.

This fixes <rdar://problem/8785296> and <rdar://problem/9112893>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127498 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 21:52:04 +00:00
Daniel Dunbar
950d3db5f4 Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often get 
created from the", it broke some GCC test suite tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127477 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 19:30:30 +00:00
Cameron Zwarich
592ca3fda9 Optimize trivial branches in CodeGenPrepare, which often get created from the 
lowering of objectsize intrinsics. Unfortunately, a number of tests were relying
on llc not optimizing trivial branches, so I had to add an option to allow them
to continue to test what they originally tested.

This fixes <rdar://problem/8785296> and <rdar://problem/9112893>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127459 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 04:54:27 +00:00
Johnny Chen
18b475f954 LLVM combines the offset mode of A8.6.199 A1 & A2 into STRBT. 
The insufficient encoding information of the combined instruction confuses the decoder wrt
UQADD16.  Add extra logic to recover from that.

Fixed an assert reported by Sean Callanan


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127354 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-09 20:01:14 +00:00
Bill Wendling
620d0cc7ac * Correct encoding for VSRI. 
* Add tests for VSRI and VSLI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127297 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-09 00:33:17 +00:00
Bill Wendling
c04a9dea78 Correct the encoding for VRSRA and VSRA instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127294 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-09 00:00:35 +00:00
Bill Wendling
7c6b608a7c * Fix VRSHR and VSHR to have the correct encoding for the immediate. 
* Update the NEON shift instruction test to expect what 'as' produces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127293 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-08 23:48:09 +00:00
Bill Wendling
591432136c A few more tests for instruction encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127209 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-08 02:51:48 +00:00
Bill Wendling
3116dce338 Rename the narrow shift right immediate operands to "shr_imm*" operands. Also 
expand the testing of the narrowing shift right instructions.

No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127193 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-07 23:38:41 +00:00
Joerg Sonnenberger
89e0f386f3 Be nice to Xcore and the XMOS assembler and avoid quoting section names 
that contain only letters, digits and the characters "_" and ".".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127028 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-04 20:03:14 +00:00
Eli Friedman
86d822df6d Followup to r126970: add 64-bit encoding tests for str with reg operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126987 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-04 04:06:47 +00:00
Eli Friedman
ac39bd534b PR9377: Handle x86 str with register operand in a way consistent with gas. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126970 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-04 00:10:17 +00:00
Joerg Sonnenberger
ea83b13350 Bug#9033: For the ELF assembler output, always quote the section name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126963 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-03 22:31:08 +00:00
Eli Friedman
78c1e1781c PR9352: Always emit a relocation for weak symbols. Not emitting relocations 
for calls to weak symbols with a definition has the appearance of working
with LLVM-generated code because weak symbol definitions are put in their
own sections.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126933 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-03 07:24:36 +00:00
Bob Wilson
1473f35c47 TableGen should not ignore BX instructions for the ARM disassembler. pr9368. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126931 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-03 07:19:52 +00:00
Bob Wilson
181d3fe727 pr9367: Add missing predicated BLX instructions. 
Patch by Jyun-Yan You, with some minor adjustments and a testcase from me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126915 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-03 01:41:01 +00:00
Kevin Enderby
d39647d913 Fixes an assertion failure while disassembling ARM rsbs reg/reg form. 
Patch by Ted Kremenek!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126895 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-02 23:08:33 +00:00
Bill Wendling
a656b63ee4 Narrow right shifts need to encode their immediates differently from a normal 
shift.

   16-bit: imm6<5:3> = '001', 8 - <imm> is encded in imm6<2:0>
   32-bit: imm6<5:4> = '01',16 - <imm> is encded in imm6<3:0>
   64-bit: imm6<5> = '1', 32 - <imm> is encded in imm6<4:0>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126723 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-01 01:00:59 +00:00
Kevin Enderby
d436d5b1c9 Fix the arm's disassembler for blx that was building an MCInst without the 
needed two predicate operands before the imm operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126662 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-28 18:46:31 +00:00
Chris Lattner
98ea4ce516 split this test into arch specific pieces, so the ARM 
test isn't run when the arm backend isn't built.  This
fixes PR9327


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126500 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-25 19:06:35 +00:00
Joerg Sonnenberger
93c65e6e66 Restore r125595 (reverted in r126336) with modifications: 
Introduce a variable in the AsmParserExtension whether [] is valid in an
expression. If it is true, parse them like (). Enable this for ELF only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126443 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-24 21:59:22 +00:00
Devang Patel
3fe3424a21 Move arch specific tests in arch specific directories. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126401 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-24 19:06:27 +00:00
Jim Grosbach
f956183643 Remove file. Previous commit deleted content, but left the file around. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126337 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-23 21:43:31 +00:00
Jim Grosbach
33b7bebca4 Revert r125595, which is an X86-only undocumented assembly syntax extension 
enabled for all targets. Non-X86 targets should not have this behavior
enabled by default.

Joerg, if you would like to resubmit with the behavior conditionalized to be
X86-ELF only, that's fine.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126336 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-23 21:26:51 +00:00
Rafael Espindola
21451e533f Put in the symbol table symbols only used in a .globl statement. 
Fixes PR9292.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126330 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-23 20:22:07 +00:00
Sean Callanan
8fbc00b5ba Fixed a bug in the enhanced disassembler that caused 
it to ignore valid uses of FS and GS as additional
base registers in address computations.  Added a test
case for this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126302 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-23 03:31:28 +00:00
Joerg Sonnenberger
00743c2218 Use the same (%dx) hack for in[bwl] as for out[bwl]. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126244 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-22 20:40:09 +00:00
Sean Callanan
ec243ae2b8 Added a testcase for the enhanced disassembly bug 
fixed in r126147, where a field in the X86 decode
structure was being read as bits, not bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126182 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-22 02:19:18 +00:00
Joerg Sonnenberger
d86f482e4a Recognize loopz and loopnz as aliases for loope and loopne. 
From Dimitry Andric.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126168 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-22 00:43:07 +00:00
Rafael Espindola
87ca0e077d Implement xgetbv and xsetbv. 
Patch by Jai Menon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126165 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-22 00:35:18 +00:00
Joerg Sonnenberger
d45e8bf93b Handle FK_PCRel_1 and add a test case for this and FK_PCRel_4. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126157 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-21 23:25:41 +00:00
Rafael Espindola
f7ad048f1e Add some limited support for labels in org directives. Hopefully enough to fix 
PR9245.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126091 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-20 20:20:07 +00:00
Chris Lattner
824a9076ea implement PR9264: disambiguating 'bt mem, imm' as a btl. 
This is reasonable to do since all bt-mem forms do the
same thing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126047 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-19 21:06:36 +00:00
Bruno Cardoso Lopes
584bf7bb03 Add assembly parsing support for "msr" and also fix its encoding. Also add 
testcases for the disassembler to make sure it still works for "msr".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125948 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-18 19:45:59 +00:00
Joerg Sonnenberger
5ad596f9d2 Recognize monitor/mwait with explicit register arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125805 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-18 00:48:11 +00:00
Joerg Sonnenberger
97755a063e Recognize leavel and leaveq aliases for leave. 
Validate encoding of leave in 64bit mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125795 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-17 23:36:39 +00:00
Rafael Espindola
908159b46a Gas is very inconsistent about when a relaxation/relocation is needed. Do 
the right thing and stop trying to copy it. Fixes PR8944.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125648 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-16 03:25:55 +00:00
Rafael Espindola
7768a9dce1 Add support for pushsection and popsection. Patch by Joerg Sonnenberger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125629 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-16 01:08:29 +00:00
Roman Divacky
738a00eb86 Add support for parsing [expr]. 
This is submitted by Joerg Sonnenberger and fixes his PR8685.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125595 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-15 20:43:39 +00:00
Bruno Cardoso Lopes
a2b6e4151b Fix encoding and add parsing support for the arm/thumb CPS instruction: 
- Add custom operand matching for imod and iflags.
- Rename SplitMnemonicAndCC to SplitMnemonic since it splits more than CC
  from mnemonic.
- While adding ".w" as an operand, don't change "Head" to avoid passing the
  wrong mnemonic to ParseOperand.
- Add asm parser tests.
- Add disassembler tests just to make sure it can catch all cps versions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125489 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-14 13:09:44 +00:00
Reid Kleckner
26f23100ac Add encodings and mnemonics for FXSAVE64 and FXRSTOR64. 
These are just FXSAVE and FXRSTOR with REX.W prefixes.  These versions use
64-bit pointer values instead of 32-bit pointer values in the memory map they
dump and restore.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125446 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-12 23:24:13 +00:00
Jim Grosbach
b9db0c50d8 Do AsmMatcher operand classification per-opcode. 
When matching operands for a candidate opcode match in the auto-generated
AsmMatcher, check each operand against the expected operand match class.
Previously, operands were classified independently of the opcode being
handled, which led to difficulties when operand match classes were
more complicated than simple subclass relationships.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125245 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-10 00:08:28 +00:00
Owen Anderson
971b83b67a Revert both r121082 (which broke a bunch of constant pool stuff) and r125074 (which worked around it). This should get us back to the old, correct behavior, though it will make the integrated assembler unhappy for the time being. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125127 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-08 22:39:40 +00:00
Benjamin Kramer
0fd90bc12f Support for .ifdef / .ifndef in the assembler parser. Patch by Joerg Sonnenberger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125120 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-08 22:29:56 +00:00
Bruno Cardoso Lopes
706d946cfe Add support for parsing dmb/dsb instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125055 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-07 22:09:15 +00:00
Jason W Kim
953a2a3dee Teach ARM/MC/ELF about gcc compatible reloc output to get past odd linkage 
failures with relocations.

The code committed is a first cut at compatibility for emitted relocations in
ELF .o.

Why do this? because existing ARM tools like emitting relocs symbols as
explicit relocations, not as section-offset relocs.

Result is that with these changes,
1) relocs are now substantially identical what to gcc outputs.
2) larger apps (including many spec2k tests) compile, cross-link, and pass

Added reminder fixme to tests for future conversion to .s form.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124996 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-07 01:11:15 +00:00
Jason W Kim
2d7a53aec2 Teach ARM/MC/ELF about EF_ARM_EABI_VERSION. The magic number is set to 
5 to match the current doc.
Added FIXME reminder Make it really configurable later.





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124899 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-04 21:41:11 +00:00
Jason W Kim
685c350ae7 Teach ARM/MC/ELF to handle R_ARM_JUMP24 relocation type for conditional jumps. 
(yes, this is different from R_ARM_CALL)

- Adds a new method getARMBranchTargetOpValue() which handles the
  necessary distinction between the conditional and unconditional br/bl
  needed for ARM/ELF

At least for ARM mode, the needed fixup for conditional versus unconditional
br/bl is identical, but the ARM docs and existing ARM tools expect this
reloc type...

Added a few FIXME's for future naming fixups in ARMInstrInfo.td




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 2011-02-04 19:47:15 +00:00
Evan Cheng
4d98ee5234 Fix test for non-darwin targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124640 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-01 01:16:18 +00:00
Bob Wilson
d11c57a937 PR9030: Fix disassembly of ARM "mov pc, lr" instruction. 
Patch by Jyun-Yan You.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124492 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-28 17:50:30 +00:00
Roman Divacky
14e66553d5 Add support for parsing .float 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124485 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-28 14:20:32 +00:00
Nico Weber
4c4c732960 PR8951: Support for .equiv in integrated assembler, patch by Jörg Sonnenberger! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124467 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-28 03:04:41 +00:00
Evan Cheng
c3a20bab75 Fix PLD encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124458 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-27 23:48:34 +00:00
Roman Divacky
54b0f4f2a4 Add support for specifying register name in cfi-register/offset/def 
as well as register number.



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 2011-01-27 17:16:37 +00:00
Bruno Cardoso Lopes
106df6da36 Add encoding testcases for ARM vcvtr variations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124289 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-26 13:53:38 +00:00
Bruno Cardoso Lopes
1b10d5be40 fix the encoding and add testcases for ARM nop, yield, wfe and wfi instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124288 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-26 13:28:14 +00:00
Rafael Espindola
59b8cf4512 Jörg Sonnenberger noticed that we were missing this test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124139 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-24 19:40:38 +00:00
Rafael Espindola
184640e96e Handle strings in section names the same way as gas: 
* If the name is a single string, we remove the quotes
* If the name starts without a quote, we include any quotes in the name

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 2011-01-24 18:02:54 +00:00
Rafael Espindola
96aa78c8c5 Add support for the --noexecstack option. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124077 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-23 17:55:27 +00:00
Rafael Espindola
54104db434 Add support for lowercase variants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124071 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-23 16:11:25 +00:00
Rafael Espindola
0cf5e3d51d Delay the creation of eh_frame so that the user can change the defaults. 
Add support for SHT_X86_64_UNWIND.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124059 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-23 05:43:40 +00:00
Bruno Cardoso Lopes
030160073d Fix the encoding of QADD/SUB, QDADD/SUB. While qadd16, qadd8 use "rd, rn, rm", 
qadd and qdadd uses "rd, rm, rn", the same applies to the 'sub' variants. This
is described in ARM manuals and matches the encoding used by the gnu assembler.



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 2011-01-21 14:07:40 +00:00
Bruno Cardoso Lopes
1115c47203 Add testcases for clz encoding 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123937 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-20 19:27:16 +00:00
Bruno Cardoso Lopes
e47f3751d7 Fix the encoding and parsing of clrex instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123936 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-20 19:18:32 +00:00
Bruno Cardoso Lopes
8dd37f7b7d Add cdp/cdp2 instructions for thumb/thumb2 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123929 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-20 18:32:09 +00:00
Bruno Cardoso Lopes
b32f7a5f4b - Use a more appropriate name for Owen's ARM Parser isMCR hack since the same operands can be present 
in cdp/cdp2 instructions. Also increase the hack with cdp/cdp2 instructions.
- Fix the encoding of cdp/cdp2 instructions for ARM (no thumb and thumb2 yet) and add testcases for t
hem.



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 2011-01-20 18:06:58 +00:00
Bruno Cardoso Lopes
6b3a999f22 Add mcr*2 and mr*c2 support to thumb2 targets 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123919 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-20 16:58:48 +00:00
Bruno Cardoso Lopes
fa5bd27fbe Add mcr* and mr*c support to thumb targets 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123917 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-20 16:35:57 +00:00
Bruno Cardoso Lopes
3abd75bf1d Fix the encoding of mrrc and mcrr family of instructions. Also add testcases for mcr and mrc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123837 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-19 16:56:52 +00:00
Owen Anderson
6cd0b17ba7 When matching asm operands, always try to match the most restricted type first. 
Unfortunately, while this is the "right" thing to do, it breaks some ARM
asm parsing tests because MemMode5 and ThumbMemModeReg are ambiguous.  This
is tricky to resolve since neither is a subset of the other.

XFAIL the test for now.  The old way was broken in other ways, just ways
we didn't happen to be testing, and our ARM asm parsing is going to require
significant revisiting at a later point anyways.


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 2011-01-18 23:01:21 +00:00
Bruno Cardoso Lopes
61505907f5 Create two new generic classes to represent the following VMRS/VMSR variations: 
vmrs  reg, fpexc
vmrs  reg, fpsid
vmsr  fpexc, reg
vmsr  fpsid, reg



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123783 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 21:58:20 +00:00
Bruno Cardoso Lopes
e7255a80e3 Fix MRS encoding for arm and thumb. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123778 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 21:31:35 +00:00
Bruno Cardoso Lopes
892fc6d7b6 Fix the encoding of t2ISB by using the right class and also parse it correctly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123776 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 21:17:09 +00:00
Bruno Cardoso Lopes
fdcee77887 Follow the current hack set and enable the correct parsing of bkpt while in thumb mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123772 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 20:55:11 +00:00
Bruno Cardoso Lopes
a461d42228 Add support for parsing and encoding ARM's official syntax for the BFI instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123770 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 20:45:56 +00:00
Daniel Dunbar
2e3cea3153 McARM: Start marking T2 address operands as such, for the benefit of the parser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123722 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-18 03:06:03 +00:00
Rafael Espindola
1c10db3da9 Update tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123591 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-16 18:02:57 +00:00
Evan Cheng
f3eb3bba16 Completed :lower16: / :upper16: support for movw / movt pairs on Darwin. 
- Fixed :upper16: fix up routine. It should be shifting down the top 16 bits first.
- Added support for Thumb2 :lower16: and :upper16: fix up.
- Added :upper16: and :lower16: relocation support to mach-o object writer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123424 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-14 02:38:49 +00:00
Owen Anderson
0fba714359 As far as I can tell, unified syntax uses c0-c15 instead of cr0-cr15 for mcr and friends. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123407 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 22:38:16 +00:00
Evan Cheng
7597212abc Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a step 
in the right direction. It eliminated some hacks and will unblock codegen
work. But it's far from being done. It doesn't reject illegal expressions,
e.g. (FOO - :lower16:BAR). It also doesn't work in Thumb2 mode at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123369 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 07:58:56 +00:00
Bill Wendling
7caebff83d Sort the register list based on the *actual* register numbers rather than the 
enum values we give to them. <rdar://problem/8823730>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123321 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-12 21:20:59 +00:00
Jason W Kim
86a97f2e4d 1. Support ELF pcrel relocations for movw/movt: 
R_ARM_MOVT_PREL and R_ARM_MOVW_PREL_NC.
2. Fix minor bug in ARMAsmPrinter - treat bitfield flag as a bitfield, not an enum.
3. Add support for 3 new elf section types (no-ops)




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123294 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-12 00:19:25 +00:00
Jason W Kim
9081b4b4cf Workaround for bug 8721. 
.s Test added.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123292 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-11 23:53:41 +00:00
Chris Lattner
3a5004dc3e Fix PR8946, a missing reg/reg form of movdqu. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123242 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-11 17:04:55 +00:00
Daniel Dunbar
352e148cbe McARM: Add more hard coded logic to SplitMnemonicAndCC to also split out the 
carry setting flag from the mnemonic.

Note that this currently involves me disabling a number of working cases in
arm_instructions.s, this is a hopefully short term evil which will be rapidly
fixed (and greatly surpassed), assuming my current approach flies.

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 2011-01-11 15:59:50 +00:00
Daniel Dunbar
8ab1112bdc McARM: Flush out hard coded known non-predicated mnemonic list. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123189 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-10 21:01:03 +00:00
Rafael Espindola
2f867a63da Correctly disassemble truncated asm. 
Patch by Richard Simth.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122962 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-06 16:48:42 +00:00
Evan Cheng
bbdcd44361 Convert MC tests to .s so codegen changes won't break them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122786 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-03 23:47:14 +00:00
Rafael Espindola
7a54997d67 Fix PR8878. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122658 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-01 19:05:35 +00:00
Nick Lewycky
c00210cef2 Add another non-commutable instruction that gas accepts commuted forms for. 
Fixes PR8861.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122641 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-30 22:10:49 +00:00
Daniel Dunbar
b2624eda5a MC/Mach-O/Thumb: Set the thumb bit in the symbol table. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122630 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-29 14:14:06 +00:00
Rafael Espindola
caf1158b0f Correctly encode pcrel|indirect. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122624 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-29 04:31:26 +00:00
Rafael Espindola
a7e450574c Fix bug when trying to output uint16_t or uint32_t. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122615 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-29 02:30:49 +00:00
Rafael Espindola
b40a71fda1 Implement cfi_def_cfa. Also don't convert to dwarf reg numbers twice. Looks 
like 6 is a fixed point of that and so the previous tests were OK :-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122614 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-29 01:42:56 +00:00
Rafael Espindola
b4601bd2ff Implement cfi_def_cfa_register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122612 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-29 00:26:06 +00:00
Rafael Espindola
b790a17efb Initial .cfi_offset implementation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122611 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-29 00:09:59 +00:00
Rafael Espindola
3b78cdc57a Don't produce a "DW_CFA_advance_loc 0". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122609 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-28 23:38:03 +00:00
Rafael Espindola
fe024d0a62 Implement .cfi_remember_state and .cfi_restore_state. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122602 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-28 18:36:23 +00:00
Rafael Espindola
245a1e2041 Relax address updates in the eh_frame section. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122591 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-28 05:39:27 +00:00
Rafael Espindola
5bba084253 Start adding basic support for emitting the call frame instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122590 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-28 04:15:37 +00:00
Rafael Espindola
bdc3167c08 Add support for .cfi_lsda. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122584 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-27 15:56:22 +00:00
Daniel Dunbar
e862453806 MC/Mach-O/Thumb: Select appropriate relocation types for Thumb. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122583 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-27 14:49:49 +00:00
Rafael Espindola
c3a561cb8e Handle reloc_riprel_4byte_movq_load. Should make the bots happy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122579 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-27 02:03:24 +00:00
Rafael Espindola
3a83c40ab6 Add support for the same encodings of the personality function that gnu as 
supports.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122577 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-27 00:36:05 +00:00
Rafael Espindola
98976610d2 Add support for @note. Patch by Jörg Sonnenberger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122568 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-26 21:30:59 +00:00
Rafael Espindola
d7c8ccae8e Add basic support for .cfi_personality. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122566 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-26 20:20:31 +00:00
Chris Lattner
7ab3cc32d6 Generalize a previous change, fixing PR8855 - an valid large immediate 
rejected by the mc assembler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122557 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-25 21:36:35 +00:00
Daniel Dunbar
4010dd72b8 MC/Mach-O/ARM: Start handling some Thumb branches. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122547 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-24 16:41:46 +00:00
Kevin Enderby
d82ed5b734 In llvm-mc parse a Hash token as a full line comment. Allows handling of 
preprocessed .s files and matches darwin gas.  rdar://8798690
Also fix a comment on the next line of AsmParser.cpp after this new code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122531 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-24 00:12:02 +00:00
Daniel Dunbar
72123334ad MC/Mach-O/ARM: Don't try to use scattered relocs for BR24 fixups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122441 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 21:26:43 +00:00
Rafael Espindola
ecbbf40d5c Add reduced test from 8845. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122438 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 21:15:13 +00:00
Daniel Dunbar
df561e0234 MC/Mach-O/ARM: We always use the SECTDIFF reloc type on ARM, which is 
esp. important given that the LOCAL_SECTDIFF enumeration got redefined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122412 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:52:19 +00:00
Daniel Dunbar
294e67861c MC/Mach-O/ARM: Add enough relocation logic to get BR24 relocations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122407 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:19:24 +00:00
Rafael Espindola
f01212489b Simplify the handling of .size expressions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122404 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-22 16:03:00 +00:00
Wesley Peck
d66a32c35f Teach the MBlaze disassembler to disassemble special purpose registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122269 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-20 21:18:04 +00:00
Roman Divacky
d149186e15 Set the value of absolute symbols. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122268 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-20 21:14:39 +00:00
Roman Divacky
1ae3c165f7 Print all 64bits for st_value and st_size. Adjust tests accordingly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122263 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-20 20:49:43 +00:00
Wesley Peck
9c0068f0a3 Teach the MBlaze asm parser how to parse special purpose register names. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122261 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-20 20:43:24 +00:00
Roman Divacky
7529b16410 Add support for lexing single quotes like 'c'. 
This fixed 8615.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122150 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-18 08:56:37 +00:00
Rafael Espindola
54f08852f6 Add a test that shows that we produce no fixups when computing the difference 
of two symbols in the same fragment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122145 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-18 05:07:45 +00:00
Rafael Espindola
a5ff979c11 Test for push being relaxed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122124 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-18 01:16:59 +00:00
Daniel Dunbar
17304b3489 MC/Expr: Implemnt more aggressive folding during symbol evaluation using 
IsSymbolRefDifferenceFullyResolved(). For example, we will now fold away
something like:
--
_a:
...
L0:
...
L1:
...
.long (L1 - L0) / 2
--

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122043 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-17 05:50:33 +00:00
Rafael Espindola
dfe125cc9c "Fix" FDE alignment to match what gas does. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122006 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-17 00:28:02 +00:00
Rafael Espindola
3ee33aa6f9 Make pushq produce signed relocations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122005 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-16 22:50:01 +00:00
Bob Wilson
0406356cd4 Add Neon VCVT instructions for f32 <-> f16 conversions. 
Clang is now providing intrinsics for these and so we need to support them
in the backend.  Radar 8068427.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121902 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 22:14:12 +00:00
Bob Wilson
8d1b7e57e5 Fix misspelled target triples in MC/ARM test commands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121901 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 22:14:01 +00:00
Rafael Espindola
2bf6afc277 Relax alignment fragments. 
With this we don't need the EffectiveSize field anymore. Without that field
LayoutFragment only updates offsets and we don't need to invalidate the
current fragment when it is relaxed (only the ones following it).

This is also a very small improvement in the accuracy of the layout info as
we now use the after relaxation size immediately.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121857 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 08:45:53 +00:00
Rafael Espindola
f9a4476173 Patch by David Meyer to avoid a O(N^2) behaviour when relaxing fragments. 
Since we now don't update addresses so early, we might relax a bit more than
we need to. This is simillar to the issue in PR8467.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121856 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 07:39:29 +00:00
Kevin Enderby
53ef11884f Add some more MC tests for ARM arithmetic instructions that update or don't 
update the condition codes.  These come from my test generator and are just
the ones that MC currently assembles correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121830 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 01:24:36 +00:00
Daniel Dunbar
abfbac52df MC/ARM: Fix-up fixup offset for fixup_arm_branch target specific fixup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121772 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 17:37:16 +00:00
Rafael Espindola
89b9372605 Fixed version of 121434 with no new memory leaks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121471 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 07:39:47 +00:00
Rafael Espindola
f7fd4aa261 Revert my previous patch to make the valgrind bots happy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121461 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 04:01:09 +00:00
Rafael Espindola
1c952b9cc9 Initial support for the cfi directives. This is just enough to get 
f:
        .cfi_startproc
        nop
        .cfi_endproc

assembled (on ELF).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121434 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-09 23:48:29 +00:00
Kevin Enderby
193c3acbe5 Add support for parsing ARM arithmetic instructions that update or don't update 
the condition codes.  Where the ones that do have an 's' suffix and the ones
that don't don't have the suffix.  The trick is if MatchInstructionImpl() fails
we try again after adding a CCOut operand with the correct value and removing
the 's' if present.  Four simple test cases added for now, lots more to come.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121401 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-09 19:19:43 +00:00
Kevin Enderby
76331754d4 Allow a slash, '/', as a prefix separator for X86. rdar://8741045 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121320 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-08 23:57:59 +00:00
Rafael Espindola
545b77ef50 Fix absolute recording of differences of symbols in two sections. Reduced from ctor_dtor_count-2.cpp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121152 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-07 17:12:32 +00:00
Rafael Espindola
3b3148f864 Fix relocations with weak definitions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121114 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-07 05:57:28 +00:00
Rafael Espindola
bf60dad984 Fix pcrel relocations that cross sections. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121107 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-07 03:50:14 +00:00
Rafael Espindola
f10d2be573 Fix a crash reduced from gcc produced assembly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121085 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-07 01:09:54 +00:00
Owen Anderson
eb6779c5b9 Second attempt at converting Thumb2's LDRpci, including updating the gazillion places that need to know about it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121082 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-07 00:45:21 +00:00
Rafael Espindola
0bbe0b440e Second try at making direct object emission produce the same results 
as llc + llvm-mc. This time ELF is not changed and I tested that llvm-gcc
bootstrap on darwin10 using darwin9's assembler and linker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121006 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-06 17:27:56 +00:00
Rafael Espindola
340a7a1c8f Don't use PadSectionToAlignment on windows. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120978 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-06 03:03:44 +00:00
Rafael Espindola
5d4918dbd1 There are two reasons why we might want to use 
foo = a - b
.long foo
instead of just
.long a - b

First, on darwin9 64 bits the assembler produces the wrong result. Second,
if "a" is the end of the section all darwin assemblers (9, 10 and mc) will not
consider a - b to be a constant but will if the dummy foo is created.

Split how we handle these cases. The first one is something MC should take care
of. The second one has to be handled by the caller.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120889 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-04 03:21:47 +00:00
Rafael Espindola
767b1be390 Next step: Only pad debug_line when the target is darwin. Add a FIXME to avoid 
doing that if the target is darwin10 or newer.

This fixes
*) Direct object emission was producing objects without the workaround on
   darwin9.
*) Assembly printing was producing objects with the workaround on linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120866 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-04 00:31:13 +00:00
Jim Grosbach
d91f4e40e6 Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order 
halfword being emitted to the stream first. rdar://8728174

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120848 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-03 22:31:40 +00:00
Jim Grosbach
41ad0c4c73 When using the 'push' mnemonic for Thumb2 stmdb, be explicit when it's the 
32-bit wide version by adding the .w suffix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120838 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-03 20:33:01 +00:00
Rafael Espindola
9f44724be0 Rename temporary symbols if they conflict with artificial symbols created 
by the assembler. This was blocking parsing any large .s produced by clang for
example.

Fixes PR8596.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120603 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-01 20:46:11 +00:00
Owen Anderson
9d63d90de5 Add correct encodings for STRD and LDRD, including fixup support. Additionally, update these to unified syntax. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120589 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-01 19:18:46 +00:00
Owen Anderson
7f2abbf268 Add tests for more forms of Thumb2 loads and stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120436 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 18:15:21 +00:00
Bill Wendling
ef4a68badb Add parsing for the Thumb t_addrmode_s4 addressing mode. This can almost 
certainly be made more generic. But it does allow us to parse something like:

          ldr     r3, [r2, r4]

correctly in Thumb mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120408 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 07:44:32 +00:00
Owen Anderson
6af50f7dd1 Correct Thumb2 encodings for a much wider range of loads and stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120364 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 00:14:31 +00:00
Owen Anderson
75579f739f Provide Thumb2 encodings for basic loads and stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120340 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 22:44:32 +00:00
Benjamin Kramer
8ad87ab166 Fix some broken CHECK lines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120332 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 22:34:55 +00:00
Bill Wendling
2f17bf2a44 Add more Thumb encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120279 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 01:07:48 +00:00
Bill Wendling
5cbbf68e35 More Thumb encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120278 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 01:00:43 +00:00
Bill Wendling
d19ac0c75a Add Thumb encodings for REV instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120277 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 00:42:50 +00:00
Bill Wendling
849f2e381e Add more Thumb encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120272 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-29 00:18:15 +00:00
Chris Lattner
d8f717911d fix PR8686, accepting a 'b' suffix at the end of all the setcc 
instructions.  I choose to handle this with an asmparser hack,
though it could be handled by changing all the instruction definitions
to allow be "setneb" instead of "setne".  The asm parser hack is
better in this case, because we want the disassembler to produce
setne, not setneb.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120260 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-28 20:23:50 +00:00
Rafael Espindola
bfd2d26159 Implement the data16 prefix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120224 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 20:29:45 +00:00
Daniel Dunbar
44fa0473ae macho-dump: Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120185 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 04:00:06 +00:00
Rafael Espindola
2ace1b68ac Use multiple 0x66 prefixes so that all nops up to 15 bytes are a single instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120147 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-25 17:14:16 +00:00
Rafael Espindola
6b8e4357ec Factor some code to parseSectionFlags and fix the default type of a section. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120145 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-25 15:32:56 +00:00
Rafael Espindola
25958730df Behave a bit more like gnu as and use the symbol (instead of the section) 
for any relocation to a symbol defined in a tls section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120121 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-24 21:57:39 +00:00
Rafael Espindola
1683fcc823 Relocate with the symbol if the relocation is of kind NTPOFF. 
Patch by David Meyer, I added the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120104 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-24 19:23:50 +00:00
Rafael Espindola
bf8209daf8 Fix and add tests for all cases in x86 and x86_64 where gnu as implicitly 
sets the type of a symbol to STT_TLS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120100 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-24 18:51:21 +00:00
Rafael Espindola
5c7106b2e3 Testcase for r120017. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120099 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-24 18:03:57 +00:00
Rafael Espindola
97551276c5 If a symbol is used as tls, mark it as tls even if not declare as so. Probably 
fixes PR8659.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120076 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-24 02:19:40 +00:00
Rafael Espindola
d93ceeb125 Produce a relocation for pcrel absolute values. Based on a patch by David Meyer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120006 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-23 07:20:12 +00:00
Bill Wendling
af2b573614 Add encoding for ARM "trap" instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119938 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 11:05:29 +00:00
Chris Lattner
cbf5d74e6a implement PR8524, apparently mainline gas accepts movq as an alias for movd 
when transfering between i64 gprs and mmx regs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119931 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 08:18:57 +00:00
Rafael Espindola
12203cc7c3 Handle PCRel relocations with absolute values. Fixes PR8656. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119917 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-21 00:48:25 +00:00
Kevin Enderby
e8e98d7f2e Added support for the Mach-O .symbol_resolver directive. rdar://8673046 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119816 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-19 18:39:33 +00:00
Bill Wendling
602890dd8e Add MC encodings for some Thumb instructions. Test for a few of them. The "bx 
lr" instruction cannot be tested just yet. It requires matching a "condition
code", but adding one of those makes things go south quickly...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119774 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-19 01:33:10 +00:00
Bill Wendling
50d0f58944 Add support for parsing the writeback ("!") token. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119761 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-18 23:43:05 +00:00
Owen Anderson
d2f76ce159 More tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119756 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-18 23:30:10 +00:00
Owen Anderson
71c11825bf Fix encodings for pkhbt, and fix some tests where I accidentally tested ARM mode instead of Thumb2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119755 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-18 23:29:56 +00:00
Owen Anderson
612fb5b9a6 More Thumb2 encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119737 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-18 21:15:19 +00:00
Owen Anderson
821752e2e6 Fill out the set of Thumb2 multiplication operator encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119733 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-18 20:32:18 +00:00
Owen Anderson
35141a9ba3 Try again at providing Thumb2 encodings for basic multiplication operators. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119601 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-18 01:08:42 +00:00
Owen Anderson
424216453f Revert r119593 while I figure out my testing disagrees with the buildbot. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119597 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-18 00:42:51 +00:00
Owen Anderson
18333616cd Provide correct Thumb2 encodings for basic multiplication operators. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119593 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-18 00:19:10 +00:00
Wesley Peck
e7c682b543 Now that the MBlaze backend is in its own directory, split the test cases into multiple files for different types of instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119580 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-17 22:54:43 +00:00
Owen Anderson
2f7aed39a3 Second attempt at correct encodings for Thumb2 bitfield instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119575 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-17 22:16:31 +00:00
Owen Anderson
5aba9f694f Revert r119551, which broke buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119555 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-17 20:48:51 +00:00
Owen Anderson
23465a06f4 Provide Thumb2 encodings for bitfield instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119551 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-17 20:35:29 +00:00