Chris Lattner
d998938459
Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps
...
into i16/i32 load/stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29089 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 20:56:58 +00:00
Chris Lattner
5c5f4ca6f1
Mark internal function static
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29085 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 19:53:12 +00:00
Rafael Espindola
aefe14299a
create the raddr addressing mode that matches any register and the frame index
...
use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29079 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 01:41:35 +00:00
Evan Cheng
206ee9d86c
X86 target specific DAG combine: turn build_vector (load x), (load x+4),
...
(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).
e.g.
__m128 test(float a, float b, float c, float d) {
return _mm_set_ps(d, c, b, a);
}
_test:
movups 4(%esp), %xmm0
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29042 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-07 08:33:52 +00:00
Chris Lattner
90ac1c0775
Undisable ppc64 jit
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29011 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-06 17:10:42 +00:00
Evan Cheng
152ed05353
Added option -code-model to set code model (only used in 64-bit) mode. Valid
...
values include small, kernel, medium, large, and default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29009 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-06 01:53:36 +00:00
Evan Cheng
60c07e1aea
Reorg. No functionality change.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28999 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-05 22:17:51 +00:00
Evan Cheng
507b0aa062
Fix JIT on non MacOS X i386 systems.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28992 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-05 07:09:13 +00:00
Andrew Lenharth
441a57041d
These are already implemented
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28990 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-03 18:00:29 +00:00
Andrew Lenharth
78c252c93d
0 offsets for memory operands
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28989 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-03 17:57:34 +00:00
Evan Cheng
775ff18257
Should just use xorps to clear XMM registers for all data types. pxor is also one byte longer.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28984 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29 18:04:54 +00:00
Evan Cheng
be33dd95d8
Let X86CompilationCallback pass previous frame and return address to X86CompilationCallback2. Remove alloca hack.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28982 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29 01:48:36 +00:00
Evan Cheng
09c545790d
Add shift and rotate by 1 instructions / patterns.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28980 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29 00:36:51 +00:00
Evan Cheng
a8e83ec8c3
Always use xorps to clear XMM registers.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28979 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29 00:34:23 +00:00
Evan Cheng
d3f6981174
Move .literal4 and .literal8 support into AsmPrinter.cpp
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28978 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29 00:33:06 +00:00
Chris Lattner
2c79de8018
Hide x86 symbols
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28976 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28 23:27:49 +00:00
Chris Lattner
9525528a7d
Use hidden visibility to make symbols in an anonymous namespace get
...
dropped. This shrinks libllvmgcc.dylib another 67K
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28975 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28 23:17:24 +00:00
Chris Lattner
2a41a98fb7
shrink libllvmgcc.dylib another 25K
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28971 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28 22:00:36 +00:00
Evan Cheng
33c36f306a
Doh.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28963 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28 17:56:43 +00:00
Evan Cheng
ee12e8f28d
Oops. Need to keep CP index.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28958 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28 07:55:24 +00:00
Evan Cheng
07103d312a
Darwin puts float and double literal constants into literal4 and literal8 sections.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28957 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-28 07:35:41 +00:00
Andrew Lenharth
7794bd3f94
this case isn't handled
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28948 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 23:19:14 +00:00
Rafael Espindola
49e4415587
handle the "mov reg1, reg2" case in isMoveInstr
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 21:52:45 +00:00
Chris Lattner
cccef1c6ff
Don't match 64-bit bitfield inserts into rlwimi's. todo add rldimi. :)
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28944 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 21:08:52 +00:00
Chris Lattner
6b76b96c69
Fix ppc64 jump tables
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28941 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 20:46:17 +00:00
Evan Cheng
4df24f2caf
Remove dead code.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28938 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 20:34:14 +00:00
Chris Lattner
9f029a61e9
Print stubs for external globals right.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28936 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 20:20:53 +00:00
Chris Lattner
f89437d049
Implement 64-bit select, bswap, etc.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28935 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 20:14:52 +00:00
Chris Lattner
e4172be920
Add a pattern for i64 sra. Print 8-byte units with a space between the .quad
...
and the data
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28934 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 20:07:26 +00:00
Chris Lattner
7ffa9abdad
Fix rewriting frame offsets with ixaddr instructions, which implicitly shift
...
the offset two bits to the left.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28933 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 18:55:49 +00:00
Chris Lattner
5f9faeaa78
PPC doesn't have bit converts to/from i64
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28932 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 18:40:08 +00:00
Chris Lattner
2e6b77d803
Add 64-bit MTCTR so that indirect calls work.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28931 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 18:36:44 +00:00
Chris Lattner
1fd81107f3
Fix an incorrect store pattern. This fixes em3d.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28930 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 18:22:50 +00:00
Chris Lattner
563ecfbf82
Implement 64-bit undef, sub, shl/shr, srem/urem
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28929 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 18:18:41 +00:00
Chris Lattner
7b0c58cd25
Use i32 for shift amounts instead of i64. This gets bisort working.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28927 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 17:34:57 +00:00
Chris Lattner
00659b1781
Add zextload from i32 -> i64, with this, perimeter works.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28926 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 17:30:08 +00:00
Chris Lattner
7e097e4633
Print darwin stub stuff correctly in 64-bit mode. With this, treeadd works in
...
ppc64 mode!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28923 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 01:02:25 +00:00
Chris Lattner
529c233498
Fix variable shadowing issue
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28922 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 00:10:13 +00:00
Chris Lattner
c08f902bb7
Implement a bunch of 64-bit cleanliness work. With this, treeadd builds (but
...
doesn't work right).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28921 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 00:04:13 +00:00
Chris Lattner
041e9d345f
Rearrange compares, add ADDI8, add sext from 32-to-64 bit register
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28920 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-26 23:53:10 +00:00
Chris Lattner
c91a4757b6
Improve PPC64 calling convention support
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28919 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-26 22:48:35 +00:00
Chris Lattner
924c576e9f
Remove two more definitions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28918 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-26 22:47:37 +00:00
Chris Lattner
7b4e478768
remove two unused instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28917 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-26 22:44:13 +00:00
Evan Cheng
da08d2c39a
Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28910 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-24 08:36:10 +00:00
Jim Laskey
89d67faf30
Add and sort "sections" in debug lines. This always stepping through
...
code in sections other than ".text", including weak sections like ctors and
dtors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28909 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-23 12:51:53 +00:00
Evan Cheng
74cb064a35
Eliminate unneeded parameter.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28907 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-22 00:02:55 +00:00
Evan Cheng
22f71315df
variable_ops instructions such as call can have any number of operands.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28906 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21 23:37:07 +00:00
Andrew Lenharth
df97cc67a6
Add memory operand and int regs
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28896 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21 15:42:36 +00:00
Andrew Lenharth
1725599574
inline asm, at least for floats
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28895 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21 13:37:27 +00:00
Andrew Lenharth
d1aab35d1a
fix argument problem
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28893 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21 01:00:43 +00:00
Chris Lattner
ef95710583
Correct returns of 64-bit values, though they seemed to work before...
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28892 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-21 00:34:03 +00:00
Chris Lattner
7f7b346e3d
Make these predicates correct in 64-bit mode too.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28890 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:21:20 +00:00
Chris Lattner
b410dc9977
Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28889 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:18:58 +00:00
Chris Lattner
96dc5e5f6d
remove unused flag
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28888 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:15:07 +00:00
Chris Lattner
f2c5bca165
add some logical ops
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28887 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:11:59 +00:00
Chris Lattner
4b25b40486
remove some unused patterns
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28886 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:11:36 +00:00
Chris Lattner
3ae5eef027
Add some more immediate patterns. This allows us to compile:
...
void test6() {
Y = 0xABCD0123BCDE4567;
}
into:
_test6:
lis r2, -21555
lis r3, ha16(_Y)
ori r2, r2, 291
rldicr r2, r2, 32, 31
oris r2, r2, 48350
ori r2, r2, 17767
std r2, lo16(_Y)(r3)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28885 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:03:01 +00:00
Chris Lattner
eded521a17
Instead of li/xoris use li/oris. Note that this doesn't work if bit 15 is
...
set, so disable the pattern in that case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28884 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 22:38:59 +00:00
Chris Lattner
0ea70b219a
Add some 64-bit logical ops.
...
Split imm16Shifted into a sext/zext form for 64-bit support.
Add some patterns for immediate formation. For example, we now compile this:
static unsigned long long Y;
void test3() {
Y = 0xF0F00F00;
}
into:
_test3:
li r2, 3840
lis r3, ha16(_Y)
xoris r2, r2, 61680
std r2, lo16(_Y)(r3)
blr
GCC produces:
_test3:
li r0,0
lis r2,ha16(_Y)
ori r0,r0,61680
sldi r0,r0,16
ori r0,r0,3840
std r0,lo16(_Y)(r2)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28883 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 22:34:10 +00:00
Evan Cheng
e3db4daa16
__i386__, __i386, etc. are not defined for x86-64. Use __x86_64__.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28881 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 22:11:12 +00:00
Chris Lattner
dd58343857
64-bit bugfix: 0xFFFF0000 cannot be formed with a single lis.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28880 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 21:39:30 +00:00
Chris Lattner
f27bb6de10
Add some patterns for globals, so we can now compile this:
...
static unsigned long long X, Y;
void test1() {
X = Y;
}
into:
_test1:
lis r2, ha16(_Y)
lis r3, ha16(_X)
ld r2, lo16(_Y)(r2)
std r2, lo16(_X)(r3)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28879 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 21:23:06 +00:00
Chris Lattner
4e85e64007
Remove some now-unneeded casts from instruction patterns. With the casts
...
removed, tblgen produces identical output to with them in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28867 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:39:56 +00:00
Chris Lattner
047854f2b7
Add some patterns for ppc64
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28866 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:38:36 +00:00
Chris Lattner
30da68acce
Remove some ugly now-redundant casts.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28864 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:25:29 +00:00
Chris Lattner
a973993c0c
Fix some mismatched type constraints
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28862 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:12:37 +00:00
Evan Cheng
b21495043e
Minor clean up.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28860 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-19 19:25:30 +00:00
Rafael Espindola
58421d7d08
initial implementation of ARMRegisterInfo::eliminateFrameIndex
...
fixes test/Regression/CodeGen/ARM/ret_arg5.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28854 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-18 00:08:07 +00:00
Evan Cheng
357edf8a4f
A new entry.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28848 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-17 00:45:49 +00:00
Chris Lattner
b1d26f6665
Implement the getPointerRegClass method, which is required for the ptr_rc
...
magic to work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28847 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-17 00:01:04 +00:00
Evan Cheng
54edc84000
Later models likely to have Yonah like attributes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28843 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 21:58:49 +00:00
Chris Lattner
a24b7618f8
Upgrade some load/store instructions to use the proper addressing mode stuff.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28841 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 21:29:41 +00:00
Chris Lattner
66d7ebb777
In 64-bit mode, addr mode operands use G8RC instead of GPRC.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28840 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 21:29:03 +00:00
Chris Lattner
059ca0f5b7
fix some assumptions that pointers can only be 32-bits. With this, we can
...
now compile:
static unsigned long X;
void test1() {
X = 0;
}
into:
_test1:
lis r2, ha16(_X)
li r3, 0
stw r3, lo16(_X)(r2)
blr
Totally amazing :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28839 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 21:01:35 +00:00
Chris Lattner
956f43c310
Split 64-bit instructions out into a separate .td file
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28838 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 20:22:01 +00:00
Chris Lattner
8fa05dac39
Force 64-bit register availability in 64-bit mode. For real.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28837 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 20:05:06 +00:00
Chris Lattner
af89fa609b
Remove the -darwin and -aix llc options, inferring darwinism and aixism from
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the target triple & subtarget info. woo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28835 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 18:50:48 +00:00
Chris Lattner
1790d44d0d
Don't pass target name into TargetData anymore, it is never used or needed.
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Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28830 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 18:22:52 +00:00
Chris Lattner
acbc07aa22
Remove ctor with each piece specifyable (which causes overload ambiguities),
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add a new init method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28828 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 18:11:26 +00:00
Chris Lattner
7c1fb5f08c
Document the subtarget features better, make sure that 64-bit mode, 64-bit
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support, and 64-bit register use are all consistent with each other.
Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently. This not makes ppc64 blow up on lots
of stuff :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28825 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 17:50:12 +00:00
Chris Lattner
a7a5854f1c
Rename some subtarget features. A CPU now can *have* 64-bit instructions,
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can in 32-bit mode we can choose to optionally *use* 64-bit registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28824 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 17:34:12 +00:00
Chris Lattner
94de9a8951
First baby step towards ppc64 support. This adds a new -march=ppc64 backend
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that is currently just like ppc32 :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28813 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-16 01:37:27 +00:00
Chris Lattner
8e173de059
Add a note that Nate noticed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28808 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 21:33:31 +00:00
Jim Laskey
f8a01a9661
1. Support standard dwarf format (was bootstrapping in Apple format.)
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2. Add vector support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28807 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 20:51:43 +00:00
Evan Cheng
31f7be9fb7
Vector extract / insert index operand should have ptr type.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28798 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 08:19:05 +00:00
Evan Cheng
a7dc4a59cb
Type of extract_element index operand should be iPTR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28797 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 08:18:06 +00:00
Evan Cheng
015188ffbc
Type of vector extract / insert index operand should be iPTR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28796 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 08:14:54 +00:00
Evan Cheng
fae2994302
X86 call instructions can take variable number of operands. Parameters of
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vector types are passed via XMM registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28789 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 22:24:55 +00:00
Chris Lattner
4b5a352f25
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28787 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 21:26:18 +00:00
Evan Cheng
b69d113201
Add argument registers to the end of call operand list (partial fix).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28783 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 18:17:40 +00:00
Jim Laskey
014f98c7e5
Place dwarf headers at earliest possible point. Well behaved when skipping
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functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28781 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 11:35:03 +00:00
Andrew Lenharth
c8aba85e1c
I am sure I had commited this workaround before. Perhaps soon I should sort it all out
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28772 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-13 20:34:47 +00:00
Andrew Lenharth
0e4dd01ffc
It really helps to be returning to the correct place
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28769 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-13 18:27:39 +00:00
Evan Cheng
004fb92615
Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28764 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-13 05:14:44 +00:00
Chris Lattner
e67304fb78
Gaar! Don't use r11 for CR save/restore, use R0. R11 can be register
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allocated, thus live across the save/reload. This fixes
llc-beta /MultiSource/Applications/spiff/spiff
llc-beta /MultiSource/Benchmarks/sim/sim:
llc-beta /MultiSource/Benchmarks/Ptrdist/bc/bc
llc-beta /MultiSource/Benchmarks/McCat/12-IOtest/iotest:
llc-beta /MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow
llc-beta /MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawdaudio/rawdaudio
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawcaudio/rawcaudio
llc-beta /MultiSource/Benchmarks/mediabench/g721/g721encode/encode
llc-beta /MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/cjpeg
and probably others, with -regalloc=local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28761 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-12 23:59:16 +00:00
Chris Lattner
b47e0897a0
Fix spilling and reloading of CR regs to reload the right values. This fixes
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Olden/power (and probably others) with -regalloc=local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28760 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-12 21:50:57 +00:00
Andrew Lenharth
f2b806a1aa
Let the alpha breakage begin. First Formals and RET. next Calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28753 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-12 18:09:24 +00:00
Rafael Espindola
337c4ad6e7
lower more then 4 formal arguments. The offset is currently hard coded.
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implement SelectFrameIndex
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28751 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-12 12:28:08 +00:00
Chris Lattner
cf00631719
Work around a nasty tblgen bug where it doesn't add operands for varargs
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nodes correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28745 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-10 01:15:02 +00:00
Chris Lattner
4a45abf66e
Fix a problem exposed by the local allocator. CALL instructions are not marked
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as using incoming argument registers, so the local allocator would clobber them
between their set and use. To fix this, we give the call instructions a variable
number of uses in the CALL MachineInstr itself, so live variables understands
the live ranges of these register arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28744 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-10 01:14:28 +00:00