Akira Hatanaka
dc2f792740
[mips] Split SelectAddr, which was used to match address patterns, into two
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functions. Set AddedComplexity to determine the order in which patterns are
matched.
This simplifies selection of floating point loads/stores.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175300 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-15 21:20:45 +00:00
Akira Hatanaka
d2047c6001
[mips] Set flag neverHasSideEffects flag on some of the floating point instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173401 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-25 00:20:39 +00:00
Jack Carter
ec3199f675
This patch tackles the problem of parsing Mips
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register names in the standalone assembler llvm-mc.
Registers such as $A1 can represent either a 32 or
64 bit register based on the instruction using it.
In addition, based on the abi, $T0 can represent different
32 bit registers.
The problem is resolved by the Mips specific AsmParser
td definitions changing to work together. Many cases of
RegisterClass parameters are now RegisterOperand.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172284 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-12 01:03:14 +00:00
Akira Hatanaka
1e7739f614
[mips] Remove asm string parameter from pseudo instructions. Add InstrItinClass
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parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170661 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20 04:20:09 +00:00
Akira Hatanaka
c567b1cd0d
[mips] Delete all floating point instruction classes that are no longer used.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170084 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 02:05:02 +00:00
Akira Hatanaka
b573539c6b
[mips] Modify definitions of floating point comparison instructions.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170077 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 01:34:09 +00:00
Akira Hatanaka
89828a6a56
[mips] Modify definitions of floating point branch instructions.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170076 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 01:32:36 +00:00
Akira Hatanaka
2b1a50cfdb
[mips] Modify definitions of floating point indexed load and store instructions.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170075 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 01:30:49 +00:00
Akira Hatanaka
b2c68ddaab
[mips] Modify definitions of floating point multiply-add/sub instructions.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170073 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 01:27:48 +00:00
Akira Hatanaka
6f94eb3512
[mips] Modify definitions of floating point load and store instructions.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170072 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 01:24:00 +00:00
Akira Hatanaka
be9f72d2d8
[mips] Modify definitions of move from/to coprocessor instructions.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170071 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 01:16:49 +00:00
Akira Hatanaka
4b921416b4
[mips] Modify definitions of two register operand floating point instructions.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170069 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 01:14:07 +00:00
Akira Hatanaka
82fdad75f7
[mips] Modify definitions of three register operand floating point instructions
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and separate encoding information from the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170066 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 01:07:37 +00:00
Akira Hatanaka
10bd726459
[mips] Move classes that do not belong in MipsInstrFormats.td into
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MipsInstrFPU.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170061 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 00:49:23 +00:00
Akira Hatanaka
2f3e06399a
[mips] Set isCommutable flag in a more explicit way.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170060 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 00:46:23 +00:00
Akira Hatanaka
1c88a8d978
[mips] Remove fmt from the parameter list of classes FMADDSUB and FNMADDSUB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170057 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 00:38:59 +00:00
Akira Hatanaka
625cb5ac72
[mips] Remove single-precision floating point instruction from multiclass
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FFR2P_M.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170055 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 00:35:54 +00:00
Akira Hatanaka
6085780a91
[mips] Remove single-precision floating point instructions from multiclasses
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FFR1_W_M and FFR1P_M. The new instruction definitions have one-to-one
correspondence with the instructions in the ISA manual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170053 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 00:29:29 +00:00
Akira Hatanaka
249330eadb
[mips] Shorten predicate name.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169579 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07 03:06:09 +00:00
Akira Hatanaka
0301bc54ad
[mips] Add predicate HasFPIdx for floating-point indexed load instruction
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support and use it in place of HasMips32r2Or64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168089 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-15 21:17:13 +00:00
Akira Hatanaka
3c77033a90
[mips] Set flag neverHasSideEffects flag on floating point conversion
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instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167348 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-03 00:53:12 +00:00
Akira Hatanaka
5a7dd43f04
Remove aligned/unaligned load/store fragments defined in MipsInstrInfo.td and
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use load/store fragments defined in TargetSelectionDAG.td in place of them.
Unaligned loads/stores are either expanded or lowered to target-specific nodes,
so instruction selection should see only aligned load/store nodes.
No changes in functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163960 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15 01:52:08 +00:00
Akira Hatanaka
72e9b6aeb4
Add stub methods for mips assembly matcher.
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Patch by Vladimir Medic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 20:16:42 +00:00
Akira Hatanaka
603f69dc2c
Define ADJCALLSTACKDOWN/UP nodes. These nodes are emitted regardless of whether
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or not it is in mips16 mode. Define MipsPseudo (mode-independant pseudo) and
PseudoSE (mips32/64 pseudo) classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161071 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 19:13:07 +00:00
Akira Hatanaka
36bcc11236
Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as
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single-precision load and store.
Also avoid selecting LUXC1 and SUXC1 instructions during isel. It is incorrect
to map unaligned floating point load/store nodes to these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161063 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 18:16:49 +00:00
Akira Hatanaka
1418045472
1. introduce MipsPat in place of Pat in order to exclude those from
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being used by Mips16 or Micro Mips
2. clean up a few lines too long encountered
Patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158470 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 21:03:23 +00:00
Akira Hatanaka
18f3c78092
This patch adds a predicate to existing mips32 and mips64 so that those
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instruction encodings can be excluded during mips16 processing.
This revision fixes the issue raised by Jim Grosbach.
bool hasStandardEncoding() const { return !inMips16Mode(); }
When micromips is added it will be
bool StandardEncoding() const { return !inMips16Mode()&& !inMicroMipsMode(); }
No additional testing is needed other than to assure that there is no regression
from this patch.
Patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157234 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-22 03:10:09 +00:00
Akira Hatanaka
ecdc9d5bb2
Add disassembler to MIPS.
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Patch by Vladimir Medic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154935 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 18:03:21 +00:00
Akira Hatanaka
1cc6333161
Emit neg.s or neg.d only if -enable-no-nans-fp-math is supplied by user,
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otherwise expand FNEG during legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154546 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 22:59:08 +00:00
Akira Hatanaka
c12a6e6b53
Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user.
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Invalid operation is signaled if the operand of these instructions is NaN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154545 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-11 22:49:04 +00:00
Akira Hatanaka
02365945a6
Revert r153924. There were buildbot failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153925 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 02:51:09 +00:00
Akira Hatanaka
885020a7a7
MIPS disassembler support.
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Patch by Vladimir Medic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153924 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 02:20:58 +00:00
Akira Hatanaka
dfa27aea12
Fix bugs which were introduced when support for base+index floating point loads
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and stores was added.
- SelectAddr should return false if Parent is an unaligned f32 load or store.
- Only aligned load and store nodes should be matched to select reg+imm
floating point instructions.
- MIPS does not have support for f64 unaligned load or store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151843 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-01 22:12:30 +00:00
Jia Liu
bb481f8820
remove blanks, and some code format
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151625 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28 07:46:26 +00:00
Akira Hatanaka
44b6c715ac
Add support for floating point base register + offset register addressing mode
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load and store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151611 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28 02:55:02 +00:00
Akira Hatanaka
3d14b9e28d
Remove unnecessary template parameters.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151540 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-27 19:17:53 +00:00
Akira Hatanaka
b90113a23e
Fix instruction predicates that were not set correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151538 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-27 19:09:08 +00:00
Akira Hatanaka
e4ea241853
Add definitions of floating point multiply add/sub and negative multiply
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add/sub instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151415 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-25 00:21:52 +00:00
Akira Hatanaka
e3186774f3
Remove trailing whitespace. Add newline.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150706 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-16 17:48:20 +00:00
Akira Hatanaka
e6e4b3a002
Pattern for f32 to i64 conversion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148869 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-24 22:05:25 +00:00
Akira Hatanaka
4cae74bd74
Various Mips64 floating point instruction patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144019 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 21:38:58 +00:00
Akira Hatanaka
c370619bac
Add definition of the base class for floating point comparison instructions
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and add Mips64's version too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144018 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 21:37:33 +00:00
Akira Hatanaka
e7126ebd54
Add definitions of 64-bit instructions which move data between integer and
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floating pointer registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144016 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07 21:32:58 +00:00
Bruno Cardoso Lopes
c3f16b316a
Final patch that completes old JIT support for Mips:
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-Fix binary codes and rename operands in .td files so that automatically
generated function MipsCodeEmitter::getBinaryCodeForInstr gives correct
encoding for instructions.
-Define new class FMem for instructions that access memory.
-Define new class FFRGPR for instructions that move data between GPR and
FPU general and control registers.
-Define custom encoder methods for memory operands, and also for size
operands of ext and ins instructions.
-Only static relocation model is currently implemented.
Patch by Sasa Stankovic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142378 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 17:50:36 +00:00
Akira Hatanaka
8f3af87e99
Move class and instruction definitions for conditional moves to a seperate file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142220 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17 18:43:19 +00:00
Akira Hatanaka
1acb7df498
Make changes necessary for supporting floating point load and store instructions
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that have 64-bit pointers or access the 32 x 64-bit floating pointer register
file. Update functions in MipsInstrInfo.cpp too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 01:12:52 +00:00
Akira Hatanaka
4391bb75ec
Simplify definition of FP move instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141476 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 03:50:18 +00:00
Akira Hatanaka
c9289f6a71
Define classes and multiclasses for FP binary instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141475 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 03:38:41 +00:00
Akira Hatanaka
bfca0798cf
Define multiclasses for FP-to-FP instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141474 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 03:29:22 +00:00
Akira Hatanaka
a8de1c1be0
Define classes for FP unary instructions and multiclasses for FP-to-fixed point
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conversion instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141473 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-08 03:19:38 +00:00