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llvm-6502/test/CodeGen/ARM
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Evan Cheng 0104d9de04 - Assign load / store with shifter op address modes the right itinerary classes. 
- For now, loads of [r, r] addressing mode is the same as the
  [r, r lsl/lsr/asr #] variants. ARMBaseInstrInfo::getOperandLatency() should
  identify the former case and reduce the output latency by 1.
- Also identify [r, r << 2] case. This special form of shifter addressing mode
  is "free".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117519 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 01:49:06 +00:00
..
2006-11-10-CycleInDAG.ll
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2007-01-19-InfiniteLoop.ll
Teach the (non-MC) instruction printer to use the cannonical names for push/pop,
2010-09-17 22:36:38 +00:00
2007-03-07-CombinerCrash.ll
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2007-03-13-InstrSched.ll
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2007-03-21-JoinIntervalsCrash.ll
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2007-03-26-RegScavengerAssert.ll
Correct bogus module triple specifications.
2010-08-30 10:48:29 +00:00
2007-03-27-RegScavengerAssert.ll
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2007-03-30-RegScavengerAssert.ll
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2007-04-02-RegScavengerAssert.ll
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2007-04-03-PEIBug.ll
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2007-04-03-UndefinedSymbol.ll
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2007-04-30-CombinerCrash.ll
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2007-05-03-BadPostIndexedLd.ll
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2007-05-07-jumptoentry.ll
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2007-05-07-tailmerge-1.ll
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2007-05-09-tailmerge-2.ll
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2007-05-14-InlineAsmCstCrash.ll
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2007-05-14-RegScavengerAssert.ll
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2007-05-22-tailmerge-3.ll
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2007-05-23-BadPreIndexedStore.ll
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2007-05-31-RegScavengerInfiniteLoop.ll
Correct bogus module triple specifications.
2010-08-30 10:48:29 +00:00
2007-08-15-ReuseBug.ll
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2008-02-04-LocalRegAllocBug.ll
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2008-02-29-RegAllocLocal.ll
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2008-03-05-SxtInRegBug.ll
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2008-03-07-RegScavengerAssert.ll
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2008-04-04-ScavengerAssert.ll
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2008-04-10-ScavengerAssert.ll
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2008-04-11-PHIofImpDef.ll
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2008-05-19-LiveIntervalsBug.ll
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2008-05-19-ScavengerAssert.ll
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2008-07-17-Fdiv.ll
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2008-07-24-CodeGenPrepCrash.ll
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2008-08-07-AsmPrintBug.ll
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2008-09-14-CoalescerBug.ll
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2008-09-17-CoalescerBug.ll
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2008-11-18-ScavengerAssert.ll
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2009-02-16-SpillerBug.ll
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2009-02-22-SoftenFloatVaArg.ll
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2009-02-27-SpillerBug.ll
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2009-03-07-SpillerBug.ll
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2009-03-09-AddrModeBug.ll
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2009-04-06-AsmModifier.ll
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2009-04-08-AggregateAddr.ll
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2009-04-08-FloatUndef.ll
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2009-04-08-FREM.ll
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2009-04-09-RegScavengerAsm.ll
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2009-05-05-DAGCombineBug.ll
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2009-05-07-RegAllocLocal.ll
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2009-05-11-CodePlacementCrash.ll
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2009-05-18-InlineAsmMem.ll
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2009-06-02-ISelCrash.ll
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2009-06-04-MissingLiveIn.ll
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2009-06-12-RegScavengerAssert.ll
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2009-06-15-RegScavengerAssert.ll
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2009-06-19-RegScavengerAssert.ll
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2009-06-22-CoalescerBug.ll
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2009-06-30-RegScavengerAssert2.ll
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2009-06-30-RegScavengerAssert3.ll
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2009-06-30-RegScavengerAssert4.ll
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2009-06-30-RegScavengerAssert5.ll
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2009-06-30-RegScavengerAssert.ll
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2009-07-01-CommuteBug.ll
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2009-07-09-asm-p-constraint.ll
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2009-07-18-RewriterBug.ll
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2009-07-22-ScavengerAssert.ll
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2009-07-22-SchedulerAssert.ll
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2009-07-29-VFP3Registers.ll
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2009-08-02-RegScavengerAssert-Neon.ll
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2009-08-04-RegScavengerAssert-2.ll
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2009-08-04-RegScavengerAssert.ll
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2009-08-15-RegScavenger-EarlyClobber.ll
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2009-08-15-RegScavengerAssert.ll
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2009-08-21-PostRAKill2.ll
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2009-08-21-PostRAKill3.ll
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2009-08-21-PostRAKill.ll
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2009-08-23-linkerprivate.ll
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2009-08-26-ScalarToVector.ll
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2009-08-27-ScalarToVector.ll
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2009-08-29-ExtractEltf32.ll
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2009-08-29-TooLongSplat.ll
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2009-08-31-LSDA-Name.ll
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2009-08-31-TwoRegShuffle.ll
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2009-09-09-AllOnes.ll
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2009-09-09-fpcmp-ole.ll
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2009-09-10-postdec.ll
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2009-09-13-InvalidSubreg.ll
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2009-09-13-InvalidSuperReg.ll
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2009-09-20-LiveIntervalsBug.ll
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2009-09-21-LiveVariablesBug.ll
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2009-09-22-LiveVariablesBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-09-24-spill-align.ll
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2009-09-27-CoalescerBug.ll
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2009-09-28-LdStOptiBug.ll
User proper libcall names & condcodes while compiling for ARM EABI.
2010-09-28 21:39:26 +00:00
2009-10-02-NEONSubregsBug.ll
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2009-10-21-InvalidFNeg.ll
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2009-10-27-double-align.ll
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2009-10-30.ll
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2009-11-01-NeonMoves.ll
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2009-11-02-NegativeLane.ll
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2009-11-07-SubRegAsmPrinting.ll
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2009-11-13-CoalescerCrash.ll
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2009-11-13-ScavengerAssert2.ll
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2009-11-13-ScavengerAssert.ll
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2009-11-13-VRRewriterCrash.ll
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2009-11-30-LiveVariablesBug.ll
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2009-12-02-vtrn-undef.ll
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2010-03-04-eabi-fp-spill.ll
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2010-03-04-stm-undef-addr.ll
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2010-03-18-ldm-rtrn.ll
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2010-04-07-DbgValueOtherTargets.ll
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2010-04-09-NeonSelect.ll
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2010-04-13-v2f64SplitArg.ll
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2010-04-14-SplitVector.ll
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2010-04-15-ScavengerDebugValue.ll
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2010-05-14-IllegalType.ll
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2010-05-17-DAGCombineAssert.ll
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2010-05-17-FastAllocCrash.ll
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2010-05-18-LocalAllocCrash.ll
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2010-05-18-PostIndexBug.ll
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2010-05-19-Shuffles.ll
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2010-05-20-NEONSpillCrash.ll
Add alignment arguments to all the NEON load/store intrinsics.
2010-08-27 17:13:24 +00:00
2010-05-21-BuildVector.ll
Add alignment arguments to all the NEON load/store intrinsics.
2010-08-27 17:13:24 +00:00
2010-06-11-vmovdrr-bitcast.ll
Add alignment arguments to all the NEON load/store intrinsics.
2010-08-27 17:13:24 +00:00
2010-06-21-LdStMultipleBug.ll
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2010-06-21-nondarwin-tc.ll
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2010-06-25-Thumb2ITInvalidIterator.ll
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2010-06-28-DAGCombineUndef.ll
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2010-06-29-PartialRedefFastAlloc.ll
Change register allocation order for ARM VFP and NEON registers to put the
2010-10-08 06:15:13 +00:00
2010-06-29-SubregImpDefs.ll
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2010-07-26-GlobalMerge.ll
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2010-08-04-EHCrash.ll
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2010-09-17-vmovrrd-combine.ll
Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64
2010-09-17 22:59:05 +00:00
2010-09-21-OptCmpBug.ll
OptimizeCompareInstr should avoid iterating pass the beginning of the MBB when the 'and' instruction is after the comparison.
2010-09-21 23:49:07 +00:00
2010-09-29-mc-asm-header-test.ll
Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile()
2010-09-30 02:45:56 +00:00
2010-10-19-mc-elf-objheader.ll
Add support for emitting ARM file attributes.
2010-10-25 17:50:35 +00:00
2010-10-25-ifcvt-ldm.ll
When the "true" and "false" blocks of a diamond if-conversion are the same,
2010-10-26 00:02:24 +00:00
addrmode.ll
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aliases.ll
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align.ll
Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits.
2010-09-29 17:54:10 +00:00
alloca.ll
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argaddr.ll
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arguments2.ll
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arguments3.ll
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arguments4.ll
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arguments5.ll
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arguments6.ll
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arguments7.ll
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arguments8.ll
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arguments_f64_backfill.ll
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arguments-nosplit-double.ll
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arguments-nosplit-i64.ll
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arguments.ll
- Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This
2010-10-06 06:27:31 +00:00
arm-and-tst-peephole.ll
ARM instructions that are both predicated and set the condition codes
2010-10-15 03:23:44 +00:00
arm-asm.ll
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arm-frameaddr.ll
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arm-negative-stride.ll
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arm-returnaddr.ll
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armv4.ll
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bfc.ll
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bfi.ll
Update tests to handle MC-inst instruction printing of shift operations. The
2010-09-17 21:58:46 +00:00
bfx.ll
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bic.ll
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bits.ll
FileCheck-ize
2010-09-17 21:46:16 +00:00
bx_fold.ll
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call_nolink.ll
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call-tc.ll
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call.ll
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carry.ll
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clz.ll
FileCheck-ize a few tests.
2010-10-22 21:55:03 +00:00
code-placement.ll
Explicitly disable CGP critical edge splitting for this test so it won't break
2010-09-27 18:43:43 +00:00
compare-call.ll
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constants.ll
tidy up
2010-10-22 23:46:04 +00:00
crash-O0.ll
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crash.ll
Simplify test and move into a generic "crash" ll file.
2010-10-09 00:29:04 +00:00
cse-libcalls.ll
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ctors_dtors.ll
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ctz.ll
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dg.exp
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div.ll
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dyn-stackalloc.ll
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extloadi1.ll
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fabss.ll
- Assign load / store with shifter op address modes the right itinerary classes.
2010-10-28 01:49:06 +00:00
fadds.ll
- Assign load / store with shifter op address modes the right itinerary classes.
2010-10-28 01:49:06 +00:00
fast-isel.ll
Revert r116220 - thus turning arm fast isel back on by default.
2010-10-18 22:53:53 +00:00
fcopysign.ll
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fdivs.ll
- Assign load / store with shifter op address modes the right itinerary classes.
2010-10-28 01:49:06 +00:00
fixunsdfdi.ll
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flag-crash.ll
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fmacs.ll
- Assign load / store with shifter op address modes the right itinerary classes.
2010-10-28 01:49:06 +00:00
fmdrr-fmrrd.ll
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fmscs.ll
- Assign load / store with shifter op address modes the right itinerary classes.
2010-10-28 01:49:06 +00:00
fmuls.ll
- Assign load / store with shifter op address modes the right itinerary classes.
2010-10-28 01:49:06 +00:00
fnegs.ll
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fnmacs.ll
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fnmscs.ll
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fnmul.ll
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fnmuls.ll
Fix an unnecessary XFAIL
2010-09-02 20:19:24 +00:00
formal.ll
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fp16.ll
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fp_convert.ll
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fp.ll
tweak test to check instructions rather than relying on the comment string
2010-09-17 20:21:03 +00:00
fparith.ll
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fpcmp_ueq.ll
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fpcmp-opt.ll
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fpcmp.ll
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fpconsts.ll
Change register allocation order for ARM VFP and NEON registers to put the
2010-10-08 06:15:13 +00:00
fpconv.ll
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fpmem.ll
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fpow.ll
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fpowi.ll
Correct bogus module triple specifications.
2010-08-30 10:48:29 +00:00
fptoint.ll
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fsubs.ll
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globals.ll
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hardfloat_neon.ll
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hello.ll
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hidden-vis-2.ll
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hidden-vis-3.ll
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hidden-vis.ll
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iabs.ll
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ifcvt1.ll
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ifcvt2.ll
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ifcvt3.ll
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ifcvt4.ll
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ifcvt5.ll
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ifcvt6.ll
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ifcvt7.ll
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ifcvt8.ll
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ifcvt9.ll
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ifcvt10.ll
Add a subtarget hook for reporting the misprediction penalty. Use this to provide more precise
2010-09-28 21:57:50 +00:00
illegal-vector-bitcast.ll
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imm.ll
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indirectbr.ll
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inlineasm2.ll
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inlineasm3.ll
Change register allocation order for ARM VFP and NEON registers to put the
2010-10-08 06:15:13 +00:00
inlineasm-imm-arm.ll
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inlineasm.ll
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insn-sched1.ll
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ispositive.ll
Update tests to handle MC-inst instruction printing of shift operations. The
2010-09-17 21:58:46 +00:00
large-stack.ll
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ldm.ll
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ldr_ext.ll
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ldr_frame.ll
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ldr_post.ll
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ldr_pre.ll
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ldr.ll
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ldrd.ll
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load.ll
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long_shift.ll
Refactor the MOVsr[al]_flag and RRX pseudo-instructions to really be pseudos
2010-10-14 22:57:13 +00:00
long-setcc.ll
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long.ll
tweak test to check instructions rather than relying on the comment string
2010-09-17 20:27:26 +00:00
lsr-code-insertion.ll
Simplify ARM callee-saved register handling by removing the distinction
2010-09-20 19:32:20 +00:00
lsr-on-unrolled-loops.ll
Try again to disable critical edge splitting in CodeGenPrepare.
2010-09-30 20:51:52 +00:00
lsr-scale-addr-mode.ll
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machine-cse-cmp.ll
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mem.ll
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memcpy-inline.ll
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memfunc.ll
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mls.ll
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movt-movw-global.ll
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movt.ll
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mul_const.ll
Update tests to handle MC-inst instruction printing of shift operations. The
2010-09-17 21:58:46 +00:00
mul.ll
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mulhi.ll
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mvn.ll
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neon_arith1.ll
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neon_ld1.ll
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neon_ld2.ll
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neon_minmax.ll
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pack.ll
Remove duplicate test.
2010-10-22 22:04:28 +00:00
pr3502.ll
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private.ll
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reg_sequence.ll
putback r116983 and fix simple-fp-encoding.ll tests
2010-10-21 03:40:16 +00:00
ret0.ll
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ret_arg1.ll
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ret_arg2.ll
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ret_arg3.ll
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ret_arg4.ll
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ret_arg5.ll
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ret_f32_arg2.ll
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ret_f32_arg5.ll
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ret_f64_arg2.ll
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ret_f64_arg_reg_split.ll
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ret_f64_arg_split.ll
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ret_f64_arg_stack.ll
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ret_i64_arg2.ll
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ret_i64_arg3.ll
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ret_i64_arg_split.ll
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ret_i128_arg2.ll
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ret_void.ll
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rev.ll
FileCheck-ize a few tests.
2010-10-22 21:55:03 +00:00
sbfx.ll
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section.ll
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select_xform.ll
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select-imm.ll
Allow use of the 16-bit literal move instruction in CMOVs for ARM mode.
2010-10-07 00:42:42 +00:00
select.ll
- Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This
2010-10-06 06:27:31 +00:00
shifter_operand.ll
- Assign load / store with shifter op address modes the right itinerary classes.
2010-10-28 01:49:06 +00:00
smul.ll
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spill-q.ll
Change register allocation order for ARM VFP and NEON registers to put the
2010-10-08 06:15:13 +00:00
stack-frame.ll
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stm.ll
Teach the (non-MC) instruction printer to use the cannonical names for push/pop,
2010-09-17 22:36:38 +00:00
str_post.ll
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str_pre-2.ll
FileCheck'ize
2010-10-26 21:26:47 +00:00
str_pre.ll
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str_trunc.ll
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sub.ll
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sxt_rot.ll
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t2-imm.ll
Fix borken test
2010-08-30 23:41:49 +00:00
tail-opts.ll
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thread_pointer.ll
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tls1.ll
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tls2.ll
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tls3.ll
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trap.ll
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trunc_ldr.ll
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truncstore-dag-combine.ll
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tst_teq.ll
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uint64tof64.ll
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unaligned_load_store.ll
Add a command line option "-arm-strict-align" to disallow unaligned memory
2010-09-28 04:09:35 +00:00
unord.ll
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uxt_rot.ll
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uxtb.ll
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va_arg.ll
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vaba.ll
Replace NEON vabdl, vaba, and vabal intrinsics with combinations of the
2010-09-03 01:35:08 +00:00
vabd.ll
Replace NEON vabdl, vaba, and vabal intrinsics with combinations of the
2010-09-03 01:35:08 +00:00
vabs.ll
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vadd.ll
Remove NEON vaddl, vaddw, vsubl, and vsubw intrinsics. Instead, use llvm
2010-08-29 05:57:34 +00:00
vargs_align.ll
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vargs.ll
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vbits.ll
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vbsl.ll
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vceq.ll
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vcge.ll
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vcgt.ll
Change register allocation order for ARM VFP and NEON registers to put the
2010-10-08 06:15:13 +00:00
vcnt.ll
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vcombine.ll
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vcvt.ll
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vdup.ll
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vext.ll
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vfcmp.ll
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vfp.ll
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vget_lane.ll
Change register allocation order for ARM VFP and NEON registers to put the
2010-10-08 06:15:13 +00:00
vhadd.ll
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vhsub.ll
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vicmp.ll
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vld1.ll
Change register allocation order for ARM VFP and NEON registers to put the
2010-10-08 06:15:13 +00:00
vld2.ll
Change register allocation order for ARM VFP and NEON registers to put the
2010-10-08 06:15:13 +00:00
vld3.ll
Change register allocation order for ARM VFP and NEON registers to put the
2010-10-08 06:15:13 +00:00
vld4.ll
Change register allocation order for ARM VFP and NEON registers to put the
2010-10-08 06:15:13 +00:00
vldlane.ll
Support alignment for NEON vld-lane and vst-lane instructions.
2010-10-19 00:16:32 +00:00
vminmax.ll
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vmla.ll
Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply,
2010-09-01 23:50:19 +00:00
vmls.ll
Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply,
2010-09-01 23:50:19 +00:00
vmov.ll
Change register allocation order for ARM VFP and NEON registers to put the
2010-10-08 06:15:13 +00:00
vmul.ll
Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply,
2010-09-01 23:50:19 +00:00
vneg.ll
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vpadal.ll
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vpadd.ll
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vpminmax.ll
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vqadd.ll
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vqdmul.ll
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vqshl.ll
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vqshrn.ll
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vqsub.ll
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vrec.ll
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vrev.ll
SelectionDAG shuffle nodes do not allow operands with different numbers of
2010-10-27 20:38:28 +00:00
vshift.ll
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vshiftins.ll
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vshl.ll
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vshll.ll
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vshrn.ll
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vsra.ll
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vst1.ll
Change register allocation order for ARM VFP and NEON registers to put the
2010-10-08 06:15:13 +00:00
vst2.ll
Change register allocation order for ARM VFP and NEON registers to put the
2010-10-08 06:15:13 +00:00
vst3.ll
Set alignment operand for NEON VST instructions.
2010-09-23 23:42:37 +00:00
vst4.ll
Change register allocation order for ARM VFP and NEON registers to put the
2010-10-08 06:15:13 +00:00
vstlane.ll
Support alignment for NEON vld-lane and vst-lane instructions.
2010-10-19 00:16:32 +00:00
vsub.ll
Remove NEON vaddl, vaddw, vsubl, and vsubw intrinsics. Instead, use llvm
2010-08-29 05:57:34 +00:00
vtbl.ll
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vtrn.ll
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vuzp.ll
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vzip.ll
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weak2.ll
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weak.ll
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