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llvm-6502/test/CodeGen/ARM
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Chad Rosier 2a2e9d54e9 [fast-isel] Cleaner fix for when we're unable to handle a non-double multi-reg 
retval.  Hoists check before emitting the call to avoid unnecessary work.
rdar://11430407
PR12796


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156628 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-11 18:51:55 +00:00
..
2006-11-10-CycleInDAG.ll
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2007-01-19-InfiniteLoop.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
2007-03-07-CombinerCrash.ll
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2007-03-13-InstrSched.ll
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2007-03-21-JoinIntervalsCrash.ll
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2007-03-27-RegScavengerAssert.ll
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2007-03-30-RegScavengerAssert.ll
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2007-04-02-RegScavengerAssert.ll
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2007-04-03-PEIBug.ll
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2007-04-03-UndefinedSymbol.ll
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2007-04-30-CombinerCrash.ll
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2007-05-03-BadPostIndexedLd.ll
manually upgrade a bunch of tests to modern syntax, and remove some that
2011-06-17 03:14:27 +00:00
2007-05-07-tailmerge-1.ll
Remove support for using "foo" as symbols instead of %"foo". This is ancient
2011-06-17 06:36:20 +00:00
2007-05-09-tailmerge-2.ll
Remove support for using "foo" as symbols instead of %"foo". This is ancient
2011-06-17 06:36:20 +00:00
2007-05-14-InlineAsmCstCrash.ll
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2007-05-14-RegScavengerAssert.ll
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2007-05-22-tailmerge-3.ll
Remove support for using "foo" as symbols instead of %"foo". This is ancient
2011-06-17 06:36:20 +00:00
2007-05-23-BadPreIndexedStore.ll
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2007-08-15-ReuseBug.ll
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2008-02-04-LocalRegAllocBug.ll
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2008-02-29-RegAllocLocal.ll
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2008-03-05-SxtInRegBug.ll
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2008-03-07-RegScavengerAssert.ll
Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.
2011-11-27 06:54:59 +00:00
2008-04-04-ScavengerAssert.ll
manually upgrade a bunch of tests to modern syntax, and remove some that
2011-06-17 03:14:27 +00:00
2008-04-10-ScavengerAssert.ll
make the asmparser reject function and type redefinitions. 'Merging' hasn't been
2011-06-17 07:06:44 +00:00
2008-04-11-PHIofImpDef.ll
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2008-05-19-LiveIntervalsBug.ll
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2008-05-19-ScavengerAssert.ll
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2008-07-17-Fdiv.ll
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2008-07-24-CodeGenPrepCrash.ll
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2008-08-07-AsmPrintBug.ll
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2008-09-17-CoalescerBug.ll
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2008-11-18-ScavengerAssert.ll
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2009-02-16-SpillerBug.ll
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2009-02-22-SoftenFloatVaArg.ll
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2009-02-27-SpillerBug.ll
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2009-03-07-SpillerBug.ll
rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which is
2011-06-18 06:05:24 +00:00
2009-03-09-AddrModeBug.ll
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2009-04-06-AsmModifier.ll
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2009-04-08-AggregateAddr.ll
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2009-04-08-FloatUndef.ll
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2009-04-08-FREM.ll
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2009-04-09-RegScavengerAsm.ll
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2009-05-05-DAGCombineBug.ll
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2009-05-07-RegAllocLocal.ll
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2009-05-11-CodePlacementCrash.ll
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2009-05-18-InlineAsmMem.ll
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2009-06-02-ISelCrash.ll
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2009-06-04-MissingLiveIn.ll
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2009-06-15-RegScavengerAssert.ll
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2009-06-19-RegScavengerAssert.ll
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2009-06-22-CoalescerBug.ll
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2009-06-30-RegScavengerAssert2.ll
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2009-06-30-RegScavengerAssert3.ll
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2009-06-30-RegScavengerAssert4.ll
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2009-06-30-RegScavengerAssert5.ll
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2009-06-30-RegScavengerAssert.ll
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2009-07-01-CommuteBug.ll
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2009-07-09-asm-p-constraint.ll
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2009-07-18-RewriterBug.ll
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2009-07-22-ScavengerAssert.ll
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2009-07-22-SchedulerAssert.ll
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2009-07-29-VFP3Registers.ll
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2009-08-02-RegScavengerAssert-Neon.ll
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2009-08-04-RegScavengerAssert-2.ll
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2009-08-04-RegScavengerAssert.ll
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2009-08-15-RegScavenger-EarlyClobber.ll
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2009-08-15-RegScavengerAssert.ll
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2009-08-21-PostRAKill2.ll
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2009-08-21-PostRAKill3.ll
manually upgrade a bunch of tests to modern syntax, and remove some that
2011-06-17 03:14:27 +00:00
2009-08-21-PostRAKill.ll
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2009-08-23-linkerprivate.ll
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2009-08-26-ScalarToVector.ll
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2009-08-27-ScalarToVector.ll
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2009-08-29-ExtractEltf32.ll
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2009-08-29-TooLongSplat.ll
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2009-08-31-LSDA-Name.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2009-08-31-TwoRegShuffle.ll
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2009-09-09-AllOnes.ll
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2009-09-09-fpcmp-ole.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2009-09-10-postdec.ll
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2009-09-13-InvalidSubreg.ll
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2009-09-13-InvalidSuperReg.ll
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2009-09-20-LiveIntervalsBug.ll
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2009-09-21-LiveVariablesBug.ll
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2009-09-22-LiveVariablesBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-09-24-spill-align.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2009-09-27-CoalescerBug.ll
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2009-09-28-LdStOptiBug.ll
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2009-10-02-NEONSubregsBug.ll
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2009-10-16-Scope.ll
Add a new wrapper node for a DILexicalBlock that encapsulates it and a
2011-10-11 22:59:11 +00:00
2009-10-21-InvalidFNeg.ll
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2009-10-27-double-align.ll
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2009-10-30.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
2009-11-01-NeonMoves.ll
Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues to simplify the path towards an auto-generated disassembler.
2011-07-15 18:46:47 +00:00
2009-11-02-NegativeLane.ll
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2009-11-07-SubRegAsmPrinting.ll
Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints on
2012-03-15 18:49:02 +00:00
2009-11-13-CoalescerCrash.ll
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2009-11-13-ScavengerAssert2.ll
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2009-11-13-ScavengerAssert.ll
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2009-11-13-VRRewriterCrash.ll
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2009-11-30-LiveVariablesBug.ll
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2009-12-02-vtrn-undef.ll
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2010-03-04-eabi-fp-spill.ll
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2010-03-04-stm-undef-addr.ll
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2010-03-18-ldm-rtrn.ll
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2010-04-07-DbgValueOtherTargets.ll
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2010-04-09-NeonSelect.ll
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2010-04-13-v2f64SplitArg.ll
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2010-04-14-SplitVector.ll
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2010-04-15-ScavengerDebugValue.ll
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2010-05-14-IllegalType.ll
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2010-05-17-FastAllocCrash.ll
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2010-05-18-LocalAllocCrash.ll
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2010-05-18-PostIndexBug.ll
Tighten physical register invariants: Allocatable physical registers can
2012-02-14 18:51:53 +00:00
2010-05-19-Shuffles.ll
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2010-05-20-NEONSpillCrash.ll
RegAlloc superpass: includes phi elimination, coalescing, and scheduling.
2012-02-10 04:10:36 +00:00
2010-05-21-BuildVector.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2010-06-11-vmovdrr-bitcast.ll
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2010-06-21-LdStMultipleBug.ll
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2010-06-21-nondarwin-tc.ll
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2010-06-25-Thumb2ITInvalidIterator.ll
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2010-06-29-PartialRedefFastAlloc.ll
Set correct <def,undef> flags when lowering REG_SEQUENCE.
2012-01-24 23:28:42 +00:00
2010-06-29-SubregImpDefs.ll
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2010-07-26-GlobalMerge.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2010-08-04-EHCrash.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2010-08-04-StackVariable.ll
manually upgrade a bunch of tests to modern syntax, and remove some that
2011-06-17 03:14:27 +00:00
2010-09-21-OptCmpBug.ll
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2010-09-29-mc-asm-header-test.ll
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2010-10-19-mc-elf-objheader.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
2010-10-25-ifcvt-ldm.ll
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2010-11-15-SpillEarlyClobber.ll
Delete the 'standard' spiller with used the old spilling framework.
2011-11-12 23:29:02 +00:00
2010-11-29-PrologueBug.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
2010-11-30-reloc-movt.ll
Print r_sym with the correct number of bits.
2011-08-04 14:48:27 +00:00
2010-12-07-PEIBug.ll
Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints on
2012-03-15 18:49:02 +00:00
2010-12-08-tpsoft.ll
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2010-12-15-elf-lcomm.ll
Don't drop alignment info on local common symbols.
2011-09-01 23:04:27 +00:00
2010-12-17-LocalStackSlotCrash.ll
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2011-01-19-MergedGlobalDbg.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
2011-02-04-AntidepMultidef.ll
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2011-02-07-AntidepClobber.ll
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2011-03-10-DAGCombineCrash.ll
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2011-03-15-LdStMultipleBug.ll
Do trivial CSE of dead BBs during codegen preparation.
2012-03-04 10:46:01 +00:00
2011-03-23-PeepholeBug.ll
Flip the new block-placement pass to be on by default.
2012-04-16 13:49:17 +00:00
2011-04-07-schediv.ll
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2011-04-11-MachineLICMBug.ll
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2011-04-12-AlignBug.ll
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2011-04-12-FastRegAlloc.ll
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2011-04-15-AndVFlagPeepholeBug.ll
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2011-04-15-RegisterCmpPeephole.ll
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2011-04-26-SchedTweak.ll
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2011-04-27-IfCvtBug.ll
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2011-05-04-MultipleLandingPadSuccs.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
2011-06-09-TailCallByVal.ll
PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval
2011-09-26 06:13:20 +00:00
2011-06-16-TailCallByVal.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
2011-06-29-MergeGlobalsAlign.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
2011-07-10-GlobalMergeBug.ll
Add a missing test for r134882.
2011-07-11 08:35:17 +00:00
2011-08-02-MergedGlobalDbg.ll
Always use the string pool, even when it makes the .o larger. This may help
2011-10-28 05:29:47 +00:00
2011-08-12-vmovqqqq-pseudo.ll
With the fix in r138164: "Add <imp-def> operands to QQ and QQQQ stack loads."
2011-08-20 00:34:45 +00:00
2011-08-25-ldmia_ret.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
2011-08-29-ldr_pre_imm.ll
Add testcase for r138746.
2011-08-29 18:02:40 +00:00
2011-08-29-SchedCycle.ll
Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical
2011-08-30 01:34:54 +00:00
2011-09-09-OddVectorDivision.ll
Fix mistake in test runline.
2011-09-12 17:32:58 +00:00
2011-09-19-cpsr.ll
ARM isel bug fix for adds/subs operands.
2011-09-20 03:17:40 +00:00
2011-09-28-CMovCombineBug.ll
Tighten a ARM dag combine condition to avoid an identity transformation, which
2011-09-28 23:16:31 +00:00
2011-10-26-ExpandUnalignedLoadCrash.ll
Don't try to form pre/post-indexed loads/stores until after LegalizeDAG runs. Fixes PR11029.
2011-11-12 00:35:34 +00:00
2011-10-26-memset-inline.ll
Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.
2011-11-08 18:56:23 +00:00
2011-10-26-memset-with-neon.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
2011-11-07-PromoteVectorLoadStore.ll
Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3.
2011-11-11 03:16:38 +00:00
2011-11-09-BitcastVectorDouble.ll
Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.
2011-11-09 22:25:12 +00:00
2011-11-09-IllegalVectorFPIntConvert.ll
Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM.
2011-11-09 23:36:02 +00:00
2011-11-14-EarlyClobber.ll
Fix early-clobber handling in shrinkToUses.
2011-11-14 18:45:38 +00:00
2011-11-28-DAGCombineBug.ll
DAG combine should not increase alignment of loads / stores with alignment less
2011-11-28 20:42:56 +00:00
2011-11-29-128bitArithmetics.ll
Make sure DAGCombiner doesn't introduce multiple loads from the same memory location. PR10747, part 2.
2011-12-26 22:49:32 +00:00
2011-11-30-MergeAlignment.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
2011-12-14-machine-sink.ll
Do not sink instruction, if it is not profitable.
2011-12-14 23:20:38 +00:00
2011-12-19-sjlj-clobber.ll
Mark ARM eh_sjlj_dispatchsetup as clobbering all registers. Radar 10567930.
2011-12-20 01:29:27 +00:00
2012-01-23-PostRA-LICM.ll
Fix PR11829. PostRA LICM was too aggressive.
2012-01-23 21:01:15 +00:00
2012-01-24-RegSequenceLiveRange.ll
Improve sub-register def handling in ProcessImplicitDefs.
2012-01-25 23:36:27 +00:00
2012-01-26-CoalescerBug.ll
Rewrite instruction operands in AdjustCopiesBackFrom. Fixes PR11861.
2012-01-27 00:05:42 +00:00
2012-01-26-CopyPropKills.ll
Clear kill flags before propagating a copy.
2012-01-26 17:52:15 +00:00
2012-02-01-CoalescerBug.ll
Move test/CodeGen/Generic/2012-02-01-CoalescerBug.ll to CodeGen/ARM, for now. It requires TARGETS=arm.
2012-02-02 11:44:58 +00:00
2012-03-05-FPSCR-bug.ll
Split fpscr into two registers: FPSCR and FPSCR_NZCV.
2012-03-06 00:19:55 +00:00
2012-03-13-DAGCombineBug.ll
When performing a truncating store, it's possible to rearrange the data
2012-04-09 20:32:02 +00:00
2012-03-26-FoldImmBug.ll
ARM has a peephole optimization which looks for a def / use pair. The def
2012-03-26 23:31:00 +00:00
2012-04-02-TwoAddrInstrCrash.ll
During two-address lowering, rescheduling an instruction does not untie
2012-04-02 19:58:43 +00:00
2012-04-10-DAGCombine.ll
Transform div to mul with reciprocal only when fp imm is legal.
2012-04-10 13:22:49 +00:00
2012-04-24-SplitEHCriticalEdge.ll
MachineBasicBlock::SplitCriticalEdge() should follow LLVM IR variant and refuse to break edge to EH landing pad. rdar://11300144
2012-04-24 19:06:55 +00:00
addrmode.ll
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aliases.ll
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align.ll
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alloca.ll
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argaddr.ll
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arguments2.ll
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arguments3.ll
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arguments4.ll
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arguments5.ll
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arguments6.ll
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arguments7.ll
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arguments8.ll
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arguments_f64_backfill.ll
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arguments-nosplit-double.ll
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arguments-nosplit-i64.ll
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arguments.ll
…
arm-and-tst-peephole.ll
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arm-asm.ll
…
arm-frameaddr.ll
…
arm-modifier.ll
Allow lr in the register options here.
2011-06-27 20:31:01 +00:00
arm-negative-stride.ll
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arm-returnaddr.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
armv4.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
atomic-64bit.ll
Generic expansion for atomic load/store into cmpxchg/atomicrmw xchg; implements 64-bit atomic load/store for ARM.
2011-08-31 18:26:09 +00:00
atomic-cmp.ll
Convert more tests over to the new atomic instructions.
2011-09-26 20:27:49 +00:00
atomic-load-store.ll
Some additional tests for Thumb atomic load and store (which I somehow forgot to commit earlier).
2011-09-19 22:02:33 +00:00
atomic-op.ll
Fix a couple of copy-n-paste bugs. Noticed by George Russell!
2011-12-21 18:56:22 +00:00
available_externally.ll
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avoid-cpsr-rmw.ll
Thumb2 size reduction fix for tied operands of tMUL.
2012-02-24 00:33:36 +00:00
bfc.ll
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bfi.ll
PerformBFICombine - (bfi A, (and B, Mask1), Mask2) -> (bfi A, B, Mask2) iff
2011-06-15 01:12:31 +00:00
bfx.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
bic.ll
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bits.ll
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bswap-inline-asm.ll
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bx_fold.ll
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call_nolink.ll
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call-tc.ll
Add proper checks.
2012-04-10 03:15:42 +00:00
call.ll
Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic.
2011-11-27 06:54:59 +00:00
carry.ll
Fix fall outs from my recent change on how carry bit is modeled during isel.
2011-09-06 18:52:20 +00:00
clz.ll
Manually upgrade the test suite to specify the flag to cttz and ctlz.
2011-12-12 11:59:10 +00:00
code-placement.ll
Added a late machine instruction copy propagation pass. This catches
2012-01-07 03:02:36 +00:00
commute-movcc.ll
Pass the right sign to TLI->isLegalICmpImmediate.
2012-04-05 03:10:56 +00:00
compare-call.ll
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constants.ll
Simplify printing of ARM shifted immediates.
2011-07-11 16:48:36 +00:00
crash-greedy-v6.ll
Fix a crash when building 177.mesa for armv6.
2011-07-18 18:47:13 +00:00
crash-greedy.ll
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crash-O0.ll
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crash.ll
Transfer implicit operands in NEONMoveFixPass.
2011-07-29 00:27:35 +00:00
cse-call.ll
Handle regmasks in MachineCSE.
2012-02-28 02:08:50 +00:00
cse-libcalls.ll
Do trivial CSE of dead BBs during codegen preparation.
2012-03-04 10:46:01 +00:00
ctor_order.ll
Properly emit ctors / dtors with priorities into desired sections
2012-01-25 22:24:19 +00:00
ctors_dtors.ll
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ctz.ll
Manually upgrade the test suite to specify the flag to cttz and ctlz.
2011-12-12 11:59:10 +00:00
dagcombine-anyexttozeroext.ll
An oversight when applying the patches for r150956 and r150957 to a vanilla tree meant I forgot to svn add these testcases.
2012-04-05 10:01:12 +00:00
debug-info-arg.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
debug-info-blocks.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
debug-info-branch-folding.ll
During post RA scheduling, do not try to chase reg defs. to preserve DBG_VALUEs. This approach has several downsides, for example, it does not work when dbg value is a constant integer, it does not work if reg is defined more than once, it places end of debug value range markers in the wrong place. It even causes misleading incorrect debug info when duplicate DBG_VALUE instructions point to same reg def.
2011-06-02 20:07:12 +00:00
debug-info-d16-reg.ll
- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
2011-12-14 02:11:42 +00:00
debug-info-qreg.ll
Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer.
2011-11-05 11:52:44 +00:00
debug-info-s16-reg.ll
Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer.
2011-11-05 11:52:44 +00:00
debug-info-sreg2.ll
Make tests less sensitive to scheduling changes.
2012-02-23 17:19:34 +00:00
div.ll
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divmod.ll
change the objectsize intrinsic signature: add a 3rd parameter to denote the maximum runtime performance penalty that the user is willing to accept.
2012-05-09 15:52:43 +00:00
dyn-stackalloc.ll
rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which is
2011-06-18 06:05:24 +00:00
eh-resume-darwin.ll
Convert tests to the new EH model.
2011-11-08 00:09:27 +00:00
ehabi-unwind.ll
An option to selectively enable part of ARM EHABI support.
2012-01-24 13:05:33 +00:00
elf-lcomm-align.ll
Don't drop alignment info on local common symbols.
2011-09-01 23:04:27 +00:00
extloadi1.ll
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fabss.ll
Inflate register classes after coalescing.
2011-08-09 18:19:41 +00:00
fadds.ll
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fast-isel-binary.ll
[fast-isel] Add support for SUBs with non-legal types.
2012-02-08 02:45:44 +00:00
fast-isel-br-const.ll
To ensure that we have more accurate line information for a block
2012-04-10 18:18:10 +00:00
fast-isel-br-phi.ll
[fast-isel] HandlePHINodesInSuccessorBlocks() can promite i8 and i16 types too.
2012-02-04 00:39:19 +00:00
fast-isel-call-multi-reg-return.ll
[fast-isel] Cleaner fix for when we're unable to handle a non-double multi-reg
2012-05-11 18:51:55 +00:00
fast-isel-call.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-cmp-imm.ll
[fast-isel] Address Eli's comments for r152847. Specifically, add a test case
2012-03-15 22:54:20 +00:00
fast-isel-conversion.ll
[fast-isel] Add support for FPToUI. Also add test cases for FPToSI.
2012-02-03 20:27:51 +00:00
fast-isel-crash2.ll
And fix the test in r132194.
2011-05-27 18:14:28 +00:00
fast-isel-crash.ll
…
fast-isel-deadcode.ll
Reapply r146997, "Heed spill slot alignment on ARM."
2012-01-05 00:26:57 +00:00
fast-isel-fold.ll
Add support for emitting both signed- and zero-extend loads. Fix
2011-11-13 02:23:59 +00:00
fast-isel-GEP-coalesce.ll
When fast iseling a GEP, accumulate the offset rather than emitting a series of
2011-11-17 07:15:58 +00:00
fast-isel-icmp.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-indirectbr.ll
[fast-isel] Add support for indirect branches.
2012-02-07 23:56:08 +00:00
fast-isel-intrinsic.ll
Use getRegForValue() to materialize the address of ARM globals.
2012-01-07 04:07:22 +00:00
fast-isel-ldr-str-arm.ll
Add newline to end of file. Thanks, Eli.
2011-11-14 22:48:33 +00:00
fast-isel-ldr-str-thumb-neg-index.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-ldrh-strh-arm.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-mvn.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-pred.ll
…
fast-isel-redefinition.ll
RegAlloc superpass: includes phi elimination, coalescing, and scheduling.
2012-02-10 04:10:36 +00:00
fast-isel-ret.ll
[fast-isel] Add support for returning non-legal types with no sign- or zero-
2012-02-17 01:21:28 +00:00
fast-isel-select.ll
ARM target code clean up. Check for iOS, not Darwin where it makes sense.
2011-12-20 18:26:50 +00:00
fast-isel-static.ll
Be less aggressive about hinting in RAFast.
2011-06-13 03:26:46 +00:00
fast-isel.ll
[fast-isel] Fold "urem x, pow2" -> "and x, pow2-1". This should fix the 271%
2012-03-22 00:21:17 +00:00
fcopysign.ll
Move the constant-folding support for FP_ROUND in SelectionDAG from the one-operand version of getNode() to the two-operand version, since it became a two-operand node at sound point.
2012-04-10 22:46:53 +00:00
fdivs.ll
…
fixunsdfdi.ll
…
flag-crash.ll
…
fmacs.ll
…
fmdrr-fmrrd.ll
…
fmscs.ll
…
fmuls.ll
Teach DAG combine that multiplication by 1.0 can always be constant folded.
2012-05-02 21:32:35 +00:00
fnegs.ll
…
fnmacs.ll
…
fnmscs.ll
…
fnmul.ll
…
fnmuls.ll
…
fold-const.ll
Manually upgrade the test suite to specify the flag to cttz and ctlz.
2011-12-12 11:59:10 +00:00
formal.ll
…
fp16.ll
…
fp_convert.ll
Inflate register classes after coalescing.
2011-08-09 18:19:41 +00:00
fp-arg-shuffle.ll
…
fp.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
fparith.ll
…
fpcmp_ueq.ll
ARM case-insensitive checking for APSR_nzcv.
2012-03-15 21:34:14 +00:00
fpcmp-opt.ll
ARM case-insensitive checking for APSR_nzcv.
2012-03-15 21:34:14 +00:00
fpcmp.ll
…
fpconsts.ll
…
fpconv.ll
…
fpmem.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
fpow.ll
…
fpowi.ll
…
fptoint.ll
…
fsubs.ll
…
fusedMAC.ll
Teach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, just like it now knows for FMULs.
2012-05-02 22:17:40 +00:00
global-merge.ll
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
2011-11-30 21:54:15 +00:00
globals.ll
Align ARM constant pool islands via their basic block.
2011-12-06 01:43:02 +00:00
gv-stubs-crash.ll
Check the visibility of the global variable before placing it into the stubs
2011-10-24 23:05:43 +00:00
hardfloat_neon.ll
…
hello.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
hidden-vis-2.ll
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
hidden-vis-3.ll
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
hidden-vis.ll
…
iabs.ll
Reapply r141365 now that PR11107 is fixed.
2011-10-10 22:59:55 +00:00
ifcvt1.ll
Move tests to FileCheck.
2011-12-19 23:26:44 +00:00
ifcvt2.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
ifcvt3.ll
Move tests to FileCheck.
2011-12-19 23:26:44 +00:00
ifcvt4.ll
Remove underscore that's breaking linux buildbots.
2011-08-03 23:13:01 +00:00
ifcvt5.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
ifcvt6.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
ifcvt7.ll
…
ifcvt8.ll
…
ifcvt9.ll
…
ifcvt10.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
ifcvt11.ll
ARM case-insensitive checking for APSR_nzcv.
2012-03-15 21:34:14 +00:00
illegal-vector-bitcast.ll
…
imm.ll
…
indirectbr.ll
Use MachineBranchProbabilityInfo in If-Conversion instead of its own heuristics.
2011-08-03 22:34:43 +00:00
inlineasm2.ll
…
inlineasm3.ll
Implement 'e' and 'f' modifiers for Neon inline asm. <rdar://problem/10551006>
2011-12-12 21:45:15 +00:00
inlineasm4.ll
Add support for the R and Q constraints.
2011-08-10 16:26:42 +00:00
inlineasm-imm-arm.ll
…
inlineasm.ll
…
insn-sched1.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
int-to-fp.ll
…
intrinsics.ll
…
ispositive.ll
…
jumptable-label.ll
Testcase for previous commit.
2011-06-15 21:18:51 +00:00
large-stack.ll
…
ldm.ll
…
ldr_ext.ll
…
ldr_frame.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
ldr_post.ll
FileCheckize these tests.
2012-04-16 20:56:42 +00:00
ldr_pre.ll
FileCheckize these tests.
2012-04-16 20:56:42 +00:00
ldr.ll
…
ldrd-memoper.ll
Preserve MachineMemOperands in ARMLoadStoreOptimizer.
2011-11-11 22:18:09 +00:00
ldrd.ll
Implement a bastardized ABI.
2012-04-27 02:11:10 +00:00
ldst-f32-2-i32.ll
…
ldstrexd.ll
Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs
2011-05-28 04:07:29 +00:00
lit.local.cfg
Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu
2012-03-25 09:02:19 +00:00
load_i1_select.ll
When emitting a cmp with 0 for a lowered select, mask out the high
2012-02-24 00:09:36 +00:00
load-global.ll
…
load.ll
…
log2_not_readnone.ll
Revert r151816 as Jim has the appropriate fix.
2012-03-01 17:41:19 +00:00
long_shift.ll
- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
2011-12-14 02:11:42 +00:00
long-setcc.ll
…
long.ll
Simplify printing of ARM shifted immediates.
2011-07-11 16:48:36 +00:00
lsr-code-insertion.ll
…
lsr-icmp-imm.ll
Allow negative immediates in ARM and Thumb2 compares.
2012-04-06 17:45:04 +00:00
lsr-scale-addr-mode.ll
…
lsr-unfolded-offset.ll
Fix more places which should be checking for iOS, not darwin.
2012-01-04 01:55:04 +00:00
machine-cse-cmp.ll
Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr.
2012-04-04 18:23:42 +00:00
machine-licm.ll
…
mem.ll
…
memcpy-inline.ll
Delete stale comment.
2011-11-14 18:03:05 +00:00
memfunc.ll
Proper support for a bastardized darwin-eabi hybird ABI.
2012-02-21 20:46:00 +00:00
mls.ll
…
movt-movw-global.ll
Don't use movw / movt for iOS static codegen for now to workaround some tools issues. rdar://9514789
2011-05-27 20:11:27 +00:00
movt.ll
…
mul_const.ll
Perform mul combine when multiplying wiht negative constants.
2012-03-19 19:19:50 +00:00
mul.ll
…
mulhi.ll
Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does not support Thumb2 dsp instructions. rdar://10152911.
2011-09-20 21:38:18 +00:00
mult-alt-generic-arm.ll
…
mvn.ll
…
neon_arith1.ll
…
neon_div.ll
…
neon_ld1.ll
FileCheckize.
2011-11-29 23:09:16 +00:00
neon_ld2.ll
FileCheckize.
2011-11-29 23:09:16 +00:00
neon_minmax.ll
…
neon_shift.ll
…
neon_spill.ll
Add <imp-def> operands when reloading into physregs.
2012-03-06 02:48:17 +00:00
odr_comdat.ll
test commit. removing unnecessary whitespace.
2012-02-24 13:52:45 +00:00
opt-shuff-tstore.ll
When performing a truncating store, it's possible to rearrange the data
2012-04-09 20:32:02 +00:00
pack.ll
…
peephole-bitcast.ll
XFAIL test that depends on linear scan to remove dead code.
2011-11-12 22:39:30 +00:00
phi.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
pr3502.ll
…
prefetch.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
private.ll
make the asmparser reject function and type redefinitions. 'Merging' hasn't been
2011-06-17 07:06:44 +00:00
reg_asc_order.ll
Allocate virtual registers in ascending order.
2012-04-02 22:30:39 +00:00
reg_sequence.ll
This commit contains a few changes that had to go in together.
2012-04-01 19:31:22 +00:00
ret0.ll
…
ret_arg1.ll
…
ret_arg2.ll
…
ret_arg3.ll
…
ret_arg4.ll
…
ret_arg5.ll
…
ret_f32_arg2.ll
…
ret_f32_arg5.ll
…
ret_f64_arg2.ll
…
ret_f64_arg_reg_split.ll
…
ret_f64_arg_split.ll
…
ret_f64_arg_stack.ll
…
ret_i64_arg2.ll
…
ret_i64_arg3.ll
…
ret_i64_arg_split.ll
…
ret_i128_arg2.ll
…
ret_void.ll
…
rev.ll
Canonicalize (srl (bswap x), 16) to (rotr (bswap x), 16) if the high 16 bits
2012-02-23 02:58:19 +00:00
sbfx.ll
…
section.ll
FileCheck-ize and simplify RUN lines.
2011-07-02 20:43:11 +00:00
select_xform.ll
Fix test case from r153135.
2012-03-20 21:49:54 +00:00
select-imm.ll
Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr.
2012-04-04 18:23:42 +00:00
select.ll
Allocate virtual registers in ascending order.
2012-04-02 22:30:39 +00:00
shifter_operand.ll
Extend r148086 to check for [r +/- reg] address mode. This fixes queens performance regression (due to increased register pressure from overly aggressive pre-inc formation).
2012-03-06 23:33:32 +00:00
shuffle.ll
…
smul.ll
…
spill-q.ll
Enable aligned NEON spilling by default.
2012-01-06 22:19:37 +00:00
stack-frame.ll
…
stm.ll
…
str_post.ll
…
str_pre-2.ll
Linear scan is going away.
2011-11-12 22:39:34 +00:00
str_pre.ll
…
str_trunc.ll
…
sub-cmp-peephole.ll
ARM: peephole optimization to remove cmp instruction
2012-05-11 01:30:47 +00:00
sub.ll
Simplify printing of ARM shifted immediates.
2011-07-11 16:48:36 +00:00
subreg-remat.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
sxt_rot.ll
FileCheck'ize test.
2011-07-26 20:49:44 +00:00
t2-imm.ll
…
tail-dup.ll
Replace the use of isPredicable() with isPredicated() in
2012-01-26 18:24:25 +00:00
tail-opts.ll
Flip the new block-placement pass to be on by default.
2012-04-16 13:49:17 +00:00
test-sharedidx.ll
test/CodeGen/ARM/test-sharedidx.ll: Fix for -Asserts.
2012-01-13 07:03:55 +00:00
thread_pointer.ll
…
thumb1-varalloc.ll
…
thumb2-it-block.ll
Test simplification that Ana Pazos noticed.
2011-10-11 04:43:15 +00:00
tls1.ll
…
tls2.ll
…
tls3.ll
…
trap.ll
…
trunc_ldr.ll
…
truncstore-dag-combine.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
tst_teq.ll
…
uint64tof64.ll
…
umulo-32.ll
…
unaligned_load_store.ll
…
undef-sext.ll
…
unord.ll
…
unsafe-fsub.ll
Teach DAG combine to fold x-x to 0.0 when unsafe FP math is enabled.
2012-05-07 20:51:25 +00:00
uxt_rot.ll
manually upgrade a bunch of tests to modern syntax, and remove some that
2011-06-17 03:14:27 +00:00
uxtb.ll
…
va_arg.ll
Make this test less sensitive to codegen optimizations.
2011-10-05 18:13:08 +00:00
vaba.ll
…
vabd.ll
…
vabs.ll
…
vadd.ll
…
vargs_align.ll
Remove support for using "foo" as symbols instead of %"foo". This is ancient
2011-06-17 06:36:20 +00:00
vargs.ll
…
vbits.ll
…
vbsl-constant.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
vbsl.ll
…
vceq.ll
…
vcge.ll
…
vcgt.ll
…
vcnt.ll
…
vcombine.ll
…
vcvt_combine.ll
The Neon VCVT (between floating-point and fixed-point, Advanced SIMD)
2011-06-24 19:23:04 +00:00
vcvt.ll
…
vdiv_combine.ll
Convert floating point division by a constant into multiplication by the
2012-04-07 20:04:00 +00:00
vdup.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
vector-DAGCombine.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
vector-extend-narrow.ll
Use VLD1 in NEON extenting-load patterns instead of VLDR.
2012-04-26 08:46:29 +00:00
vext.ll
ARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 23:03:21 +00:00
vfcmp.ll
…
vfp.ll
…
vget_lane.ll
…
vhadd.ll
…
vhsub.ll
…
vicmp.ll
…
vld1.ll
…
vld2.ll
…
vld3.ll
…
vld4.ll
…
vlddup.ll
Also set addrmode6 alignment when align==size.
2011-10-27 22:39:16 +00:00
vldlane.ll
Also set addrmode6 alignment when align==size.
2011-10-27 22:39:16 +00:00
vminmax.ll
…
vmla.ll
…
vmls.ll
…
vmov.ll
ARM vector any_extends need to be selected to vmovl. <rdar://problem/10723651>
2012-01-20 20:59:56 +00:00
vmul.ll
Don't introduce illegal types when creating vmull operations. <rdar://11324364>
2012-04-30 16:53:34 +00:00
vneg.ll
…
vpadal.ll
…
vpadd.ll
Add an optimization that looks for a specific pair-wise add pattern and generates a vpaddl instruction instead of scalarizing the add.
2011-06-14 23:48:48 +00:00
vpminmax.ll
…
vqadd.ll
…
vqdmul.ll
make the asmparser reject function and type redefinitions. 'Merging' hasn't been
2011-06-17 07:06:44 +00:00
vqshl.ll
…
vqshrn.ll
…
vqsub.ll
…
vrec.ll
…
vrev.ll
When performing a truncating store, it's possible to rearrange the data
2012-04-09 20:32:02 +00:00
vshift.ll
…
vshiftins.ll
…
vshl.ll
…
vshll.ll
…
vshrn.ll
…
vsra.ll
…
vst1.ll
…
vst2.ll
VST2 four-register w/ update pseudos for fixed/register update.
2012-01-20 19:16:00 +00:00
vst3.ll
…
vst4.ll
…
vstlane.ll
Also set addrmode6 alignment when align==size.
2011-10-27 22:39:16 +00:00
vsub.ll
…
vtbl.ll
…
vtrn.ll
…
vuzp.ll
…
vzip.ll
…
weak2.ll
…
weak.ll
…
widen-vmovs.ll
Disable code placement for this test.
2012-04-16 20:49:06 +00:00