llvm-6502/test/CodeGen/AArch64
Jiangning Liu b20b9bf9fd [AArch64] Add pass to enable additional comparison optimizations by CSE.
Patched by Sergey Dmitrouk.

This pass tries to make consecutive compares of values use same operands to
allow CSE pass to remove duplicated instructions. For this it analyzes
branches and adjusts comparisons with immediate values by converting:

GE -> GT
GT -> GE
LT -> LE
LE -> LT

and adjusting immediate values appropriately. It basically corrects two
immediate values towards each other to make them equal.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217220 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-05 02:55:24 +00:00
..
128bit_load_store.ll
a57-csel.ll [AArch64] Add a testcase for r214957. 2014-08-06 13:31:32 +00:00
aarch64_f16_be.ll [AArch64] Fix some failures exposed by value type v4f16 and v8f16. 2014-08-29 01:31:42 +00:00
aarch64-2014-08-11-MachineCombinerCrash.ll [MachineCombiner] Fix for ICE bug 20598 2014-08-12 07:54:12 +00:00
aarch64-a57-fp-load-balancing.ll [AArch64] Add an FP load balancing pass for Cortex-A57 2014-08-08 12:33:21 +00:00
aarch64-address-type-promotion-assertion.ll AArch64: Re-enable AArch64AddressTypePromotion 2014-07-02 18:17:40 +00:00
aarch64-address-type-promotion.ll AArch64: Re-enable AArch64AddressTypePromotion 2014-07-02 18:17:40 +00:00
aarch64-be-bv.ll AArch64: fix vector-immediate BIC/ORR on big-endian devices. 2014-09-04 15:05:24 +00:00
aarch64-neon-v1i1-setcc.ll
adc.ll AArch64: remove "arm64_be" support in favour of "aarch64_be". 2014-07-23 12:58:11 +00:00
addsub_ext.ll ARM & AArch64: make use of common cmpxchg idioms after expansion 2014-05-30 10:09:59 +00:00
addsub-shifted.ll
addsub.ll
alloca.ll
analyze-branch.ll
analyzecmp.ll [AArch64] Fix a type conversion bug for anlyzing compare. 2014-08-08 14:19:29 +00:00
and-mask-removal.ll Remove spurious mask operations from AArch64 add->compares on 16 and 8 bit values 2014-08-29 21:00:22 +00:00
andandshift.ll Merge Extend and Shift into a UBFX 2014-09-02 09:33:56 +00:00
arm64-2011-03-09-CPSRSpill.ll
arm64-2011-03-17-AsmPrinterCrash.ll
arm64-2011-03-21-Unaligned-Frame-Index.ll
arm64-2011-04-21-CPSRBug.ll
arm64-2011-10-18-LdStOptBug.ll
arm64-2012-01-11-ComparisonDAGCrash.ll
arm64-2012-05-07-DAGCombineVectorExtract.ll
arm64-2012-05-07-MemcpyAlignBug.ll
arm64-2012-05-09-LOADgot-bug.ll AArch64 & ARM: remove undefined behaviour from some tests. 2014-05-30 08:59:55 +00:00
arm64-2012-05-22-LdStOptBug.ll
arm64-2012-06-06-FPToUI.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-2012-07-11-InstrEmitterBug.ll
arm64-2013-01-13-ffast-fcmp.ll
arm64-2013-01-23-frem-crash.ll
arm64-2013-01-23-sext-crash.ll
arm64-2013-02-12-shufv8i8.ll
arm64-aapcs-be.ll [AArch64] Narrow arguments passed in wrong position on the stack in 2014-08-15 14:29:57 +00:00
arm64-aapcs.ll Teach the AArch64 backend about v4f16 and v8f16 2014-08-27 16:16:04 +00:00
arm64-abi_align.ll [AArch64, fast-isel] Fall back to SelectionDAG to select tail calls. 2014-08-13 23:23:58 +00:00
arm64-abi-varargs.ll
arm64-abi.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-addp.ll
arm64-addr-mode-folding.ll
arm64-addr-type-promotion.ll
arm64-addrmode.ll
arm64-AdvSIMD-Scalar.ll [AArch64] Run a peephole pass right after AdvSIMD pass. 2014-08-21 18:10:07 +00:00
arm64-alloc-no-stack-realign.ll
arm64-alloca-frame-pointer-offset.ll
arm64-andCmpBrToTBZ.ll
arm64-ands-bad-peephole.ll ARM & AArch64: make use of common cmpxchg idioms after expansion 2014-05-30 10:09:59 +00:00
arm64-AnInfiniteLoopInDAGCombine.ll
arm64-anyregcc-crash.ll
arm64-anyregcc.ll
arm64-arith-saturating.ll
arm64-arith.ll [AArch64] When combining constant mul of power of 2 plus/minus 1, prefer shift 2014-06-09 01:25:51 +00:00
arm64-arm64-dead-def-elimination-flag.ll
arm64-atomic-128.ll CodeGen: it turns out that NAND is not the same thing as BIC. At all. 2014-07-07 09:06:35 +00:00
arm64-atomic.ll [MachineSink] Use the real post dominator tree 2014-09-01 03:47:25 +00:00
arm64-basic-pic.ll
arm64-big-endian-bitconverts.ll AArch64: remove "arm64_be" support in favour of "aarch64_be". 2014-07-23 12:58:11 +00:00
arm64-big-endian-eh.ll AArch64: remove "arm64_be" support in favour of "aarch64_be". 2014-07-23 12:58:11 +00:00
arm64-big-endian-varargs.ll AArch64: remove "arm64_be" support in favour of "aarch64_be". 2014-07-23 12:58:11 +00:00
arm64-big-endian-vector-callee.ll AArch64: remove "arm64_be" support in favour of "aarch64_be". 2014-07-23 12:58:11 +00:00
arm64-big-endian-vector-caller.ll AArch64: remove "arm64_be" support in favour of "aarch64_be". 2014-07-23 12:58:11 +00:00
arm64-big-imm-offsets.ll
arm64-big-stack.ll
arm64-bitfield-extract.ll
arm64-blockaddress.ll
arm64-build-vector.ll [AArch64]Fix an assertion failure in DAG Combiner about concating 2 build_vector. 2014-07-10 03:41:50 +00:00
arm64-call-tailcalls.ll
arm64-cast-opt.ll
arm64-ccmp-heuristics.ll
arm64-ccmp.ll
arm64-clrsb.ll
arm64-coalesce-ext.ll
arm64-code-model-large-abs.ll
arm64-collect-loh-garbage-crash.ll
arm64-collect-loh-str.ll
arm64-collect-loh.ll
arm64-complex-copy-noneon.ll
arm64-complex-ret.ll
arm64-const-addr.ll
arm64-convert-v4f64.ll Add a triple so that right syntax is choosen on mac osx systems 2014-06-18 17:20:49 +00:00
arm64-copy-tuple.ll
arm64-crc32.ll
arm64-crypto.ll
arm64-cse.ll ARM & AArch64: make use of common cmpxchg idioms after expansion 2014-05-30 10:09:59 +00:00
arm64-csel.ll
arm64-cvt.ll
arm64-dagcombiner-convergence.ll
arm64-dagcombiner-dead-indexed-load.ll Revert "Revert '[DAGCombiner] Split up an indexed load if only the base pointer value is live'" 2014-09-02 06:24:04 +00:00
arm64-dagcombiner-load-slicing.ll
arm64-dead-def-frame-index.ll
arm64-dead-register-def-bug.ll
arm64-dup.ll
arm64-early-ifcvt.ll ARM & AArch64: make use of common cmpxchg idioms after expansion 2014-05-30 10:09:59 +00:00
arm64-elf-calls.ll
arm64-elf-constpool.ll
arm64-elf-globals.ll
arm64-EXT-undef-mask.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-ext.ll
arm64-extend-int-to-fp.ll
arm64-extend.ll
arm64-extern-weak.ll
arm64-extload-knownzero.ll
arm64-extract_subvector.ll
arm64-extract.ll
arm64-fast-isel-addr-offset.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-fast-isel-alloca.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-fast-isel-br.ll [FastISel][AArch64] Add target-specific lowering for logical operations. 2014-09-04 01:29:18 +00:00
arm64-fast-isel-call.ll [FastISel][AArch64] Use the correct register class for branches. 2014-08-29 23:48:06 +00:00
arm64-fast-isel-conversion.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-fast-isel-fcmp.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-fast-isel-gv.ll [FastISel][AArch64] Add target-specific lowering for logical operations. 2014-09-04 01:29:18 +00:00
arm64-fast-isel-icmp.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-fast-isel-indirectbr.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-fast-isel-intrinsic.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-fast-isel-materialize.ll [FastISel][AArch64] Use the proper FMOV instruction to materialize a +0.0. 2014-08-20 01:10:36 +00:00
arm64-fast-isel-noconvert.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-fast-isel-rem.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-fast-isel-ret.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-fast-isel-select.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-fast-isel-store.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-fast-isel.ll [FastISel][AArch64] Use the zero register for stores. 2014-08-27 21:04:52 +00:00
arm64-fastcc-tailcall.ll
arm64-fastisel-gep-promote-before-add.ll
arm64-fcmp-opt.ll
arm64-fcopysign.ll
arm64-fixed-point-scalar-cvt-dagcombine.ll
arm64-fmadd.ll
arm64-fmax.ll
arm64-fminv.ll
arm64-fmuladd.ll
arm64-fold-address.ll
arm64-fold-lsl.ll
arm64-fp128-folding.ll
arm64-fp128.ll ARM & AArch64: make use of common cmpxchg idioms after expansion 2014-05-30 10:09:59 +00:00
arm64-fp-contract-zero.ll
arm64-fp-imm.ll
arm64-fp.ll
arm64-frame-index.ll ARM & AArch64: make use of common cmpxchg idioms after expansion 2014-05-30 10:09:59 +00:00
arm64-global-address.ll
arm64-hello.ll
arm64-i16-subreg-extract.ll
arm64-icmp-opt.ll
arm64-illegal-float-ops.ll
arm64-indexed-memory.ll [AArch64] Fix registerAllocator assigns same register for base and wback in 2014-08-11 21:39:53 +00:00
arm64-indexed-vector-ldst-2.ll
arm64-indexed-vector-ldst.ll
arm64-inline-asm-error-I.ll
arm64-inline-asm-error-J.ll
arm64-inline-asm-error-K.ll
arm64-inline-asm-error-L.ll
arm64-inline-asm-error-M.ll
arm64-inline-asm-error-N.ll
arm64-inline-asm-zero-reg-error.ll
arm64-inline-asm.ll AArch64: fix conversion of 'J' inline asm constraints. 2014-07-27 07:10:29 +00:00
arm64-join-reserved.ll
arm64-jumptable.ll
arm64-large-frame.ll
arm64-ld1.ll
arm64-ldp.ll
arm64-ldur.ll
arm64-ldxr-stxr.ll
arm64-leaf.ll
arm64-long-shift.ll
arm64-memcpy-inline.ll
arm64-memset-inline.ll
arm64-memset-to-bzero.ll
arm64-misched-basic-A53.ll Revert "Revert "MachineScheduler: better book-keeping for asserts."" 2014-07-02 16:46:08 +00:00
arm64-misched-basic-A57.ll [AArch64] Basic Sched Model for Cortex-A57. 2014-06-11 21:06:56 +00:00
arm64-misched-forwarding-A53.ll [AArch64] Fix the ordering of the accumulate operand in SchedRW list. 2014-06-09 01:54:00 +00:00
arm64-movi.ll
arm64-mul.ll
arm64-named-reg-alloc.ll
arm64-named-reg-notareg.ll
arm64-neg.ll
arm64-neon-2velem-high.ll
arm64-neon-2velem.ll
arm64-neon-3vdiff.ll
arm64-neon-aba-abd.ll
arm64-neon-across.ll
arm64-neon-add-pairwise.ll
arm64-neon-add-sub.ll
arm64-neon-compare-instructions.ll
arm64-neon-copy.ll [codegen,aarch64] Add a target hook to the code generator to control 2014-07-03 00:23:43 +00:00
arm64-neon-copyPhysReg-tuple.ll
arm64-neon-mul-div.ll Revert "r214669 - MachineCombiner Pass for selecting faster instruction" 2014-08-04 05:10:33 +00:00
arm64-neon-scalar-by-elem-mul.ll
arm64-neon-select_cc.ll [codegen,aarch64] Add a target hook to the code generator to control 2014-07-03 00:23:43 +00:00
arm64-neon-simd-ldst-one.ll
arm64-neon-simd-shift.ll
arm64-neon-simd-vget.ll
arm64-neon-v1i1-setcc.ll
arm64-neon-vector-list-spill.ll
arm64-patchpoint-scratch-regs.ll [FastISel][AArch64] Update and enable patchpoint and stackmap intrinsic tests for FastISel. 2014-07-31 04:10:43 +00:00
arm64-patchpoint-webkit_jscc.ll [FastISel][AArch64] Update and enable patchpoint and stackmap intrinsic tests for FastISel. 2014-07-31 04:10:43 +00:00
arm64-patchpoint.ll [FastISel][AArch64] Update and enable patchpoint and stackmap intrinsic tests for FastISel. 2014-07-31 04:10:43 +00:00
arm64-pic-local-symbol.ll
arm64-platform-reg.ll
arm64-popcnt.ll
arm64-prefetch.ll AArch64: Add support for instruction prefetch intrinsic 2014-08-05 12:46:47 +00:00
arm64-promote-const.ll
arm64-redzone.ll
arm64-reg-copy-noneon.ll
arm64-register-offset-addressing.ll
arm64-register-pairing.ll
arm64-regress-f128csel-flags.ll
arm64-regress-interphase-shift.ll
arm64-return-vector.ll
arm64-returnaddr.ll
arm64-rev.ll
arm64-rounding.ll
arm64-scaled_iv.ll
arm64-scvt.ll [AArch64] Disable some optimization cases for type conversion from sint to fp, because those optimization cases are micro-architecture dependent and only make sense for Cyclone. A new predicate Cyclone is introduced in .td file. 2014-07-24 01:29:59 +00:00
arm64-setcc-int-to-fp-combine.ll Use an explicit triple in testcase. 2014-07-23 20:46:32 +00:00
arm64-shifted-sext.ll
arm64-shrink-v1i64.ll
arm64-simd-scalar-to-vector.ll
arm64-simplest-elf.ll
arm64-sincos.ll
arm64-sitofp-combine-chains.ll
arm64-sli-sri-opt.ll
arm64-smaxv.ll
arm64-sminv.ll
arm64-spill-lr.ll
arm64-spill.ll
arm64-sqshl-uqshl-i64Contant.ll
arm64-st1.ll
arm64-stack-no-frame.ll
arm64-stackmap.ll [FastISel][AArch64] Update and enable patchpoint and stackmap intrinsic tests for FastISel. 2014-07-31 04:10:43 +00:00
arm64-stackpointer.ll
arm64-stacksave.ll
arm64-stp.ll
arm64-strict-align.ll
arm64-stur.ll
arm64-subsections.ll
arm64-subvector-extend.ll
arm64-swizzle-tbl-i16-layout.ll
arm64-tbl.ll
arm64-this-return.ll
arm64-tls-darwin.ll
arm64-tls-dynamic-together.ll
arm64-tls-dynamics.ll
arm64-tls-execs.ll
arm64-trap.ll
arm64-trn.ll
arm64-trunc-store.ll
arm64-umaxv.ll
arm64-uminv.ll
arm64-umov.ll
arm64-unaligned_ldst.ll
arm64-uzp.ll
arm64-vaargs.ll
arm64-vabs.ll
arm64-vadd.ll
arm64-vaddlv.ll
arm64-vaddv.ll
arm64-variadic-aapcs.ll
arm64-vbitwise.ll
arm64-vclz.ll
arm64-vcmp.ll
arm64-vcnt.ll
arm64-vcombine.ll
arm64-vcvt_f32_su32.ll
arm64-vcvt_f.ll CodeGen: extend f16 conversions to permit types > float. 2014-07-17 10:51:23 +00:00
arm64-vcvt_n.ll
arm64-vcvt_su32_f32.ll
arm64-vcvt.ll AArch64 & ARM: remove undefined behaviour from some tests. 2014-05-30 08:59:55 +00:00
arm64-vcvtxd_f32_f64.ll
arm64-vecCmpBr.ll
arm64-vecFold.ll
arm64-vector-ext.ll AArch64: More correctly constrain target vector extend lowering. 2014-08-28 22:08:28 +00:00
arm64-vector-imm.ll
arm64-vector-insertion.ll
arm64-vector-ldst.ll
arm64-vext_reverse.ll
arm64-vext.ll
arm64-vfloatintrinsics.ll
arm64-vhadd.ll
arm64-vhsub.ll
arm64-virtual_base.ll
arm64-vmax.ll
arm64-vminmaxnm.ll
arm64-vmovn.ll
arm64-vmul.ll
arm64-volatile.ll
arm64-vpopcnt.ll
arm64-vqadd.ll
arm64-vqsub.ll
arm64-vselect.ll
arm64-vsetcc_fp.ll
arm64-vshift.ll [AArch64] Fix a fencepost error in lowering for llvm.aarch64.neon.uqshl. 2014-06-16 10:39:21 +00:00
arm64-vshr.ll
arm64-vshuffle.ll
arm64-vsqrt.ll
arm64-vsra.ll
arm64-vsub.ll
arm64-weak-reference.ll
arm64-xaluo.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
arm64-zero-cycle-regmov.ll
arm64-zero-cycle-zeroing.ll
arm64-zext.ll
arm64-zextload-unscaled.ll
arm64-zip.ll
asm-large-immediate.ll
assertion-rc-mismatch.ll
atomic-ops-not-barriers.ll
atomic-ops.ll Revert r216066, "Optimize ZERO_EXTEND and SIGN_EXTEND in both SelectionDAG Builder and type". 2014-08-21 01:59:30 +00:00
basic-pic.ll
bitfield-insert-0.ll
bitfield-insert.ll
bitfield.ll
blockaddress.ll ARM & AArch64: make use of common cmpxchg idioms after expansion 2014-05-30 10:09:59 +00:00
bool-loads.ll
branch-relax-asm.ll AArch64: estimate inline asm length during branch relaxation 2014-06-17 11:31:42 +00:00
breg.ll ARM & AArch64: make use of common cmpxchg idioms after expansion 2014-05-30 10:09:59 +00:00
callee-save.ll
cmpwithshort.ll Generate CMN when comparing a short int with minus 2014-08-28 04:59:53 +00:00
cmpxchg-idioms.ll IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
code-model-large-abs.ll
combine-comparisons-by-cse.ll [AArch64] Add pass to enable additional comparison optimizations by CSE. 2014-09-05 02:55:24 +00:00
compare-branch.ll
compiler-ident.ll [AArch64] Emit .ident compiler version attribute. 2014-06-10 14:32:08 +00:00
complex-copy-noneon.ll
complex-fp-to-int.ll AArch64: improve handling & modelling of FP_TO_XINT nodes. 2014-06-15 09:27:15 +00:00
complex-int-to-fp.ll AArch64: improve vector [su]itofp handling. 2014-06-15 09:27:06 +00:00
cond-sel.ll AArch64: only try to get operand of a known node. 2014-08-29 15:34:58 +00:00
cpus.ll
directcond.ll ARM & AArch64: make use of common cmpxchg idioms after expansion 2014-05-30 10:09:59 +00:00
dont-take-over-the-world.ll AArch64: stop trying to take control of all UnknownArch triples. 2014-08-08 08:27:44 +00:00
dp1.ll
dp2.ll
dp-3source.ll Revert "r214669 - MachineCombiner Pass for selecting faster instruction" 2014-08-04 05:10:33 +00:00
eliminate-trunc.ll
extern-weak.ll
extract.ll
f16-convert.ll CodeGen: emit IR-level f16 conversion intrinsics as fptrunc/fpext 2014-07-21 09:13:56 +00:00
fast-isel-addressing-modes.ll [FastISel][AArch64] Use the target-dependent selection code for shifts first. 2014-09-02 22:33:57 +00:00
fast-isel-branch_weights.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
fast-isel-call-return.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
fast-isel-folding.ll [FastISel][AArch64] Don't fold instructions that are not in the same basic block. 2014-08-29 00:19:21 +00:00
fast-isel-logic-op.ll [FastISel][AArch64] Add target-specific lowering for logical operations. 2014-09-04 01:29:18 +00:00
fast-isel-mul.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
fast-isel-shift.ll [FastISel][AArch64] Use the target-dependent selection code for shifts first. 2014-09-02 22:33:57 +00:00
fast-isel-sqrt.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
fast-isel-switch-phi.ll [FastISel] Undo phi node updates when falling-back to SelectionDAG. 2014-08-28 02:06:55 +00:00
fast-isel-trunc.ll [FastISel][AArch64] Fix an incorrect kill flag due to a bug in SelectTrunc. 2014-08-29 17:58:16 +00:00
fastcc-reserved.ll
fastcc.ll
fcmp.ll
fcvt-fixed.ll
fcvt-int.ll
flags-multiuse.ll ARM & AArch64: make use of common cmpxchg idioms after expansion 2014-05-30 10:09:59 +00:00
floatdp_1source.ll
floatdp_2source.ll
fp16-instructions.ll Teach the AArch64 backend about v4f16 and v8f16 2014-08-27 16:16:04 +00:00
fp16-v4-instructions.ll Teach the AArch64 backend about v4f16 and v8f16 2014-08-27 16:16:04 +00:00
fp16-v8-instructions.ll Teach the AArch64 backend about v4f16 and v8f16 2014-08-27 16:16:04 +00:00
fp16-vector-bitcast.ll Teach the AArch64 backend about v4f16 and v8f16 2014-08-27 16:16:04 +00:00
fp16-vector-load-store.ll Teach the AArch64 backend about v4f16 and v8f16 2014-08-27 16:16:04 +00:00
fp16-vector-shuffle.ll Teach the AArch64 backend about v4f16 and v8f16 2014-08-27 16:16:04 +00:00
fp128-folding.ll
fp-cond-sel.ll
fp-dp3.ll
fpimm.ll
frameaddr.ll [FastISel][AArch64] Use the correct register class to make the MI verifier happy. 2014-08-21 20:57:57 +00:00
free-zext.ll
func-argpassing.ll
func-calls.ll AArch64: remove "arm64_be" support in favour of "aarch64_be". 2014-07-23 12:58:11 +00:00
funcptr_cast.ll [AArch64] Unsized types don't specify an alignment. 2014-06-30 15:03:00 +00:00
global-alignment.ll
global-merge-1.ll Move GlobalMerge from Transform to CodeGen. 2014-06-13 22:57:59 +00:00
global-merge-2.ll Move GlobalMerge from Transform to CodeGen. 2014-06-13 22:57:59 +00:00
global-merge-3.ll Move GlobalMerge from Transform to CodeGen. 2014-06-13 22:57:59 +00:00
global-merge-4.ll Move GlobalMerge from Transform to CodeGen. 2014-06-13 22:57:59 +00:00
global-merge.ll Global merge for global symbols. 2014-06-11 06:44:53 +00:00
got-abuse.ll
half.ll AArch64: implement efficient f16 bitcasts 2014-07-18 13:07:05 +00:00
hints.ll AArch64: add support for llvm.aarch64.hint intrinsic 2014-07-12 21:20:49 +00:00
i1-contents.ll
i128-align.ll
i128-fast-isel-fallback.ll Allow AArch64FastISel to degrade graceully in the presence of an MVT::i128 2014-07-07 21:37:51 +00:00
illegal-float-ops.ll
init-array.ll Replace -use-init-array with -use-ctors. 2014-09-02 13:54:53 +00:00
inline-asm-constraints-badI.ll
inline-asm-constraints-badK2.ll
inline-asm-constraints-badK.ll
inline-asm-constraints-badL.ll
inlineasm-ldr-pseudo.ll Resubmit commit r211533 2014-06-24 16:21:38 +00:00
intrinsics-memory-barrier.ll Port memory barriers intrinsics to AArch64 2014-07-17 10:50:20 +00:00
jump-table.ll ARM & AArch64: make use of common cmpxchg idioms after expansion 2014-05-30 10:09:59 +00:00
large-consts.ll
ldst-opt.ll [AArch64] Add regression tests for the load/store optimizer which cover post-index update folding with sub rather than add. 2014-06-03 16:03:00 +00:00
ldst-regoffset.ll
ldst-unscaledimm.ll
ldst-unsignedimm.ll
lit.local.cfg Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
literal_pools_float.ll
local_vars.ll
logical_shifted_reg.ll
logical-imm.ll
machine_cse.ll In Machine CSE pass, the source register of a COPY machine instruction can 2014-08-11 05:17:19 +00:00
madd-combiner.ll Reapply r216805 "[MachineCombiner][AArch64] Use the correct register class for MADD, SUB, and OR."" 2014-09-03 07:07:10 +00:00
madd-lohi.ll MachineCombiner Pass for selecting faster instruction sequence on AArch64 2014-08-07 21:40:58 +00:00
mature-mc-support.ll
memcpy-f128.ll [AArch64] Fix memset ICE when memset value is f128. 2014-06-27 21:05:09 +00:00
movw-consts.ll
movw-shift-encoding.ll
mul_pow2.ll [AArch64] Convert mul x, -(pow2 +/- 1) to shift + add/sub. 2014-06-30 14:51:14 +00:00
mul-lohi.ll MachineCombiner Pass for selecting faster instruction sequence on AArch64 2014-08-07 21:40:58 +00:00
neon-bitcast.ll
neon-bitwise-instructions.ll
neon-compare-instructions.ll
neon-diagnostics.ll
neon-extract.ll
neon-fma.ll
neon-fpround_f128.ll
neon-idiv.ll
neon-mla-mls.ll
neon-mov.ll
neon-or-combine.ll
neon-perm.ll [AArch64] Fix a bug generating incorrect instruction when building small vector. 2014-07-24 02:05:42 +00:00
neon-scalar-by-elem-fma.ll
neon-scalar-copy.ll AArch64: fall back to generic code for out of range extract/insert. 2014-07-15 10:00:26 +00:00
neon-shift-left-long.ll
neon-truncStore-extLoad.ll
nzcv-save.ll
paired-load.ll Update test to use a more modern AArch64 triple, as requested by Renato. 2014-08-02 17:15:11 +00:00
pic-eh-stubs.ll AArch64: remove "arm64_be" support in favour of "aarch64_be". 2014-07-23 12:58:11 +00:00
ragreedy-csr.ll
rbit.ll ARM: Fix codegen for rbit intrinsic 2014-08-20 10:40:20 +00:00
regress-bitcast-formals.ll
regress-f128csel-flags.ll
regress-fp128-livein.ll
regress-tail-livereg.ll AArch64: disallow x30 & x29 as the destination for indirect tail calls 2014-06-10 10:50:24 +00:00
regress-tblgen-chains.ll
regress-w29-reserved-with-fp.ll
remat.ll Implement AArch64 TTI interface isAsCheapAsAMove. 2014-07-29 02:09:26 +00:00
returnaddr.ll
sdivpow2.ll [AArch64] Lower sdiv x, pow2 using add + select + shift. 2014-07-23 14:57:52 +00:00
setcc-takes-i32.ll
sibling-call.ll
sincos-expansion.ll
sincospow-vector-expansion.ll
stack_guard_remat.ll [stack protector] Fix a potential security bug in stack protector where the 2014-07-25 19:31:34 +00:00
stack-guard-remat-bitcast.ll [stack protector] Look through bitcasts to get global variable 2014-08-07 23:08:24 +00:00
tail-call.ll [ARM,AArch64] Do not tail-call to an externally-defined function with weak linkage 2014-08-18 12:42:15 +00:00
tailcall-fastisel.ll [AArch64, fast-isel] Fall back to SelectionDAG to select tail calls. 2014-08-13 23:23:58 +00:00
tbz-tbnz.ll [AArch64] Fix test from r214518 in an attempt to appease buildbots. 2014-08-01 15:30:41 +00:00
trunc-v1i64.ll [aarch64] Add a test that should have been in r212242 but I forgot to 2014-07-03 02:12:26 +00:00
tst-br.ll ARM & AArch64: make use of common cmpxchg idioms after expansion 2014-05-30 10:09:59 +00:00
zero-reg.ll