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llvm-6502/test/CodeGen/Mips
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Reed Kotler 2c3a4641a7 This patch is needed to make c++ exceptions work for mips16. 
Mips16 is really a processor decoding mode (ala thumb 1) and in the same
program, mips16 and mips32 functions can exist and can call each other.

If a jal type instruction encounters an address with the lower bit set, then
the processor switches to mips16 mode (if it is not already in it). If the
lower bit is not set, then it switches to mips32 mode.

The linker knows which functions are mips16 and which are mips32.
When relocation is performed on code labels, this lower order bit is
set if the code label is a mips16 code label.

In general this works just fine, however when creating exception handling
tables and dwarf, there are cases where you don't want this lower order
bit added in.

This has been traditionally distinguished in gas assembly source by using a
different syntax for the label.

lab1:      ; this will cause the lower order bit to be added
lab2=.     ; this will not cause the lower order bit to be added

In some cases, it does not matter because in dwarf and debug tables
the difference of two labels is used and in that case the lower order
bits subtract each other out.

To fix this, I have added to mcstreamer the notion of a debuglabel.
The default is for label and debug label to be the same. So calling
EmitLabel and EmitDebugLabel produce the same result.

For various reasons, there is only one set of labels that needs to be
modified for the mips exceptions to work. These are the "$eh_func_beginXXX" 
labels.

Mips overrides the debug label suffix from ":" to "=." .

This initial patch fixes exceptions. More changes most likely
will be needed to DwarfCFException to make all of this work
for actual debugging. These changes will be to emit debug labels in some
places where a simple label is emitted now.

Some historical discussion on this from gcc can be found at:
http://gcc.gnu.org/ml/gcc-patches/2008-08/msg00623.html
http://gcc.gnu.org/ml/gcc-patches/2008-11/msg01273.html 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170279 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-16 04:00:45 +00:00
..
2008-06-05-Carry.ll
2008-07-03-SRet.ll
2008-07-06-fadd64.ll
2008-07-07-Float2Int.ll
2008-07-07-FPExtend.ll
2008-07-07-IntDoubleConvertions.ll
2008-07-15-InternalConstant.ll
2008-07-15-SmallSection.ll
2008-07-16-SignExtInReg.ll 64-bit sign extension in register instructions. 2012-01-24 21:41:09 +00:00
2008-07-22-Cstpool.ll
2008-07-23-fpcmp.ll Fix the remaining TCL-style quotes found in the testsuite. This is 2012-07-02 19:09:46 +00:00
2008-07-29-icmp.ll Fix the remaining TCL-style quotes found in the testsuite. This is 2012-07-02 19:09:46 +00:00
2008-07-31-fcopysign.ll
2008-08-01-AsmInline.ll Have getRegForInlineAsmConstraint return the correct register class when target 2012-01-04 02:45:01 +00:00
2008-08-03-fabs64.ll
2008-08-03-ReturnDouble.ll
2008-08-04-Bitconvert.ll
2008-08-06-Alloca.ll
2008-08-07-CC.ll
2008-08-07-FPRound.ll
2008-08-08-bswap.ll
2008-08-08-ctlz.ll
2008-10-13-LegalizerBug.ll
2008-11-10-xint_to_fp.ll Remove the no longer existent psp triple from a test. 2012-03-08 21:22:27 +00:00
2009-11-16-CstPoolLoad.ll Fix LowerConstantPool to produce instructions with the correct relocation 2012-04-04 18:26:12 +00:00
2010-04-07-DbgValueOtherTargets.ll
2010-07-20-Switch.ll Fix test cases. 2012-06-14 01:21:00 +00:00
2010-11-09-CountLeading.ll
2010-11-09-Mul.ll
2011-05-26-BranchKillsVreg.ll
2012-12-12-ExpandMemcpy.ll Fix a logic bug in inline expansion of memcpy / memset with an overlapping 2012-12-12 20:43:23 +00:00
addc.ll
addressing-mode.ll Initial implementation of MipsTargetLowering::isLegalAddressingMode. 2012-11-17 00:25:41 +00:00
alloca16.ll Implement ADJCALLSTACKUP and ADJCALLSTACKDOWN 2012-10-31 05:21:10 +00:00
alloca.ll Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering. 2012-07-31 20:54:48 +00:00
analyzebranch.ll Fix test cases. 2012-05-12 03:25:16 +00:00
and1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
asm-large-immediate.ll The inline asm operand modifier 'n' is suppose 2012-06-21 21:37:54 +00:00
atomic.ll [mips] Fix bug in test case. Disable machine LICM to prevent instruction from 2012-11-02 21:46:42 +00:00
atomicops.ll Expand all atomic ops for mips16. 2012-10-29 16:16:54 +00:00
biggot.ll [mips] Generate big GOT code. 2012-11-21 20:40:38 +00:00
blockaddr.ll Fix LowerBlockAddress to produce instructions with the correct relocation 2012-04-04 18:22:53 +00:00
br-jmp.ll
brconeq.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconeqk.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconeqz.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconge.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brcongt.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconle.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconlt.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconne.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconnek.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconnez.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brdelayslot.ll [mips] Fix delay slot filler so that instructions with register operand $1 are 2012-11-16 02:39:34 +00:00
brind.ll Implement brind operator for mips16. 2012-10-28 23:08:07 +00:00
bswap.ll Test case for r147017. 2011-12-20 23:58:36 +00:00
buildpairextractelementf64.ll
check-noat.ll [mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directive 2012-11-02 20:56:25 +00:00
cmov.ll Fix test cases in test/CodeGen/Mips. 2012-06-02 00:05:45 +00:00
constantfp0.ll
cprestore.ll Fix test cases. 2012-05-12 03:25:16 +00:00
div_rem.ll Div, Rem int/unsigned int 2012-10-12 02:01:09 +00:00
div.ll Div, Rem int/unsigned int 2012-10-12 02:01:09 +00:00
divrem.ll
divu_remu.ll Div, Rem int/unsigned int 2012-10-12 02:01:09 +00:00
divu.ll Div, Rem int/unsigned int 2012-10-12 02:01:09 +00:00
double2int.ll
dsp-r1.ll MIPS DSP: add operands to make sure instruction strings are being matched. 2012-09-28 21:23:16 +00:00
dsp-r2.ll MIPS DSP: add operands to make sure instruction strings are being matched. 2012-09-28 21:23:16 +00:00
eh-dwarf-cfa.ll [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node. 2012-11-07 19:10:58 +00:00
eh.ll Fix test cases. 2012-05-12 03:25:16 +00:00
extins.ll
fabs.ll Add test triples to fix win32 failures. Revert workaround from r161292. 2012-08-08 20:31:37 +00:00
fastcc.ll Implement fastcc calling convention for MIPS. 2012-06-13 18:06:00 +00:00
fcopysign-f32-f64.ll Fix bugs in lowering of FCOPYSIGN nodes. 2012-04-11 22:13:04 +00:00
fcopysign.ll Fix bugs in lowering of FCOPYSIGN nodes. 2012-04-11 22:13:04 +00:00
fmadd1.ll Add definitions of floating point multiply add/sub and negative multiply 2012-02-25 00:21:52 +00:00
fneg.ll Revert changes that were accidentally committed. 2012-04-11 23:19:55 +00:00
fp-indexed-ls.ll Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as 2012-07-31 18:16:49 +00:00
fp-spill-reload.ll Make register FP allocatable if the compiled function does not have dynamic 2012-05-09 01:38:13 +00:00
fpbr.ll Flip the new block-placement pass to be on by default. 2012-04-16 13:49:17 +00:00
frame-address.ll
frem.ll Expand FREM. 2012-03-29 18:43:11 +00:00
global-address.ll Add lines in global-address.ll to test N32 and N64 code generation. 2012-04-06 20:23:36 +00:00
global-pointer-reg.ll Make the following changes in MipsAsmPrinter.cpp: 2012-05-12 00:48:43 +00:00
gpreg-lazy-binding.ll [mips] Do not copy GOT address to register $gp if the function being called has 2012-12-13 03:17:29 +00:00
gprestore.ll Fix test cases. 2012-05-12 03:25:16 +00:00
helloworld.ll Change mips16 delay slot jumps to non delay slot forms by default. 2012-10-30 00:54:49 +00:00
i32k.ll implement large (>16 bit) constant loading. 2012-10-26 03:09:34 +00:00
i64arg.ll Eliminate the stack slot used to save the global base register. 2012-07-25 03:16:47 +00:00
imm.ll Add a test case for r146900. 2011-12-19 20:24:28 +00:00
indirectcall.ll
init-array.ll Fix UseInitArray option for MIPS target. 2012-09-05 06:17:17 +00:00
inlineasm64.ll Have getRegForInlineAsmConstraint return the correct register class when target 2012-01-04 02:45:01 +00:00
inlineasm_constraint.ll Use regular expression to match register names. 2012-05-11 23:00:40 +00:00
inlineasm-cnstrnt-bad-I-1.ll Add support for the 'I' inline asm constraint. Also add tests 2012-05-07 03:13:32 +00:00
inlineasm-cnstrnt-bad-J.ll Support the 'J' constraint. 2012-05-07 03:13:42 +00:00
inlineasm-cnstrnt-bad-K.ll Add support for the inline asm constraint 'K'. 2012-05-07 05:46:29 +00:00
inlineasm-cnstrnt-bad-L.ll Add support for the 'L' inline asm constraint. 2012-05-07 05:46:37 +00:00
inlineasm-cnstrnt-bad-N.ll Add support for the 'N' inline asm constraint. 2012-05-07 05:46:43 +00:00
inlineasm-cnstrnt-bad-O.ll Add support for the 'O' constraint. 2012-05-07 05:46:48 +00:00
inlineasm-cnstrnt-bad-P.ll Add support for the 'P' constraint. 2012-05-07 06:25:02 +00:00
inlineasm-cnstrnt-reg64.ll Add support for the 'I' inline asm constraint. Also add tests 2012-05-07 03:13:32 +00:00
inlineasm-cnstrnt-reg.ll Add support for the 'l' constraint. 2012-05-07 06:25:15 +00:00
inlineasm-operand-code.ll Mips specific inline asm operand modifier 'M': 2012-07-18 06:41:36 +00:00
inlineasmmemop.ll Fix test cases. 2012-05-12 03:25:16 +00:00
internalfunc.ll Fix test cases. 2012-05-12 03:25:16 +00:00
largeimm1.ll [mips] Use register number instead of name to print register $AT. 2012-11-02 21:26:03 +00:00
largeimmprinting.ll [mips] Stop reserving register AT and use register scavenger when a scratch 2012-11-03 00:05:43 +00:00
lb1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
lbu1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
lh1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
lhu1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
lit.local.cfg Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
llcarry.ll Implement carry for subtract/add for mips16 2012-10-26 04:46:26 +00:00
load-store-left-right.ll Rename test/CodeGen/Mips/load-shift-left-right.ll. 2012-06-04 17:50:36 +00:00
longbranch.ll [mips] Use register number instead of name to print register $AT. 2012-11-02 21:26:03 +00:00
machineverifier.ll Make machine verifier check the first instruction of the last bundle instead of 2012-06-14 20:51:13 +00:00
madd-msub.ll
memcpy.ll Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp. 2012-06-13 19:33:32 +00:00
mips16ex.ll This patch is needed to make c++ exceptions work for mips16. 2012-12-16 04:00:45 +00:00
mips16fpe.ll This code implements most of mips16 hardfloat as it is done by gcc. 2012-12-15 00:20:05 +00:00
mips64-fp-indexed-ls.ll Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as 2012-07-31 18:16:49 +00:00
mips64-sret.ll [mips] Make sure sret argument is returned in register V0. 2012-10-24 02:10:54 +00:00
mips64countleading.ll Expand 64-bit CTLZ nodes if target architecture does not support it. Add test 2011-12-21 00:20:27 +00:00
mips64directive.ll 64-bit data directive. 2011-12-20 22:52:19 +00:00
mips64ext.ll Pattern for f32 to i64 conversion. 2012-01-24 22:05:25 +00:00
mips64extins.ll
mips64fpimm0.ll Add code in MipsDAGToDAGISel for selecting constant +0.0. 2011-12-20 22:25:50 +00:00
mips64fpldst.ll Reapply 154038 without the failing test. 2012-04-04 22:16:36 +00:00
mips64imm.ll Lower 64-bit immediates using MipsAnalyzeImmediate that has just been added. 2012-01-25 03:01:35 +00:00
mips64instrs.ll
mips64intldst.ll Reapply 154038 without the failing test. 2012-04-04 22:16:36 +00:00
mips64lea.ll Test case for r147232. 2011-12-24 03:05:43 +00:00
mips64load-store-left-right.ll Add a test case for mips64 unaligned load/store instructions. 2012-06-04 17:57:06 +00:00
mips64muldiv.ll Add function MipsDAGToDAGISel::SelectMULT and factor out code that generates 2011-12-20 23:10:57 +00:00
mips64shift.ll Remove definitions of double word shift plus 32 instructions. Assembler or 2011-12-19 19:44:09 +00:00
mipslopat.ll
misha.ll Implement patterns for extloadi8 and extloadi16 2012-10-29 19:39:04 +00:00
mul.ll Patch for integer multiply, signed/unsigned, long/long long. 2012-10-05 18:27:54 +00:00
mulll.ll Patch for integer multiply, signed/unsigned, long/long long. 2012-10-05 18:27:54 +00:00
mulull.ll Patch for integer multiply, signed/unsigned, long/long long. 2012-10-05 18:27:54 +00:00
neg1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
not1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
null.ll Change mips16 delay slot jumps to non delay slot forms by default. 2012-10-30 00:54:49 +00:00
o32_cc_byval.ll [mips] Make sure FuncArg doesn't advance when OrigArgIndex is the same as in the 2012-10-27 00:44:39 +00:00
o32_cc_vararg.ll Set transient stack alignment in constructor of MipsFrameLowering and re-enable 2012-08-02 18:15:13 +00:00
o32_cc.ll
or1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
private.ll
ra-allocatable.ll Make register Mips::RA allocatable if not in mips16 mode. 2012-07-10 00:19:06 +00:00
rdhwr-directives.ll test case for r159770. 2012-07-05 19:29:31 +00:00
rem.ll Div, Rem int/unsigned int 2012-10-12 02:01:09 +00:00
remat-immed-load.ll [mips] Set flag isAsCheapAsAMove flag on instruction LUi. 2012-11-03 00:26:02 +00:00
remu.ll Div, Rem int/unsigned int 2012-10-12 02:01:09 +00:00
return_address.ll Lower RETURNADDR node in Mips backend. 2012-07-11 00:53:32 +00:00
return-vector-float4.ll Test case for r162008. 2012-08-16 03:48:41 +00:00
return-vector.ll Implement MipsTargetLowering::CanLowerReturn. 2012-10-10 01:27:09 +00:00
rotate.ll
sb1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
select.ll
selectcc.ll Fix function select_cc_f32 in test/CodeGen/Mips/selectcc.ll. 2012-07-16 23:56:51 +00:00
selpat.ll implement mips16 patterns for select nodes 2012-10-25 21:33:30 +00:00
seteq.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
seteqz.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setge.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setgek.ll fix test setgek.ll so that it will not give false "make check" 2012-10-26 01:29:42 +00:00
setle.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setlt.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setltk.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setne.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setuge.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setugt.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setule.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setult.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setultk.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
sh1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
shift-parts.ll Expand 64-bit shifts if target ABI is O32. 2012-05-09 00:55:21 +00:00
sitofp-selectcc-opt.ll Test case for r160036. 2012-07-11 19:50:46 +00:00
sll1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
sll2.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
small-section-reserve-gp.ll In MipsDAGToDAGISel::SelectAddr, fold add node into address operand, if its 2012-08-24 20:21:49 +00:00
sra1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
sra2.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
srl1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
srl2.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
stacksize.ll Test case for r159240. 2012-06-27 00:40:34 +00:00
stchar.ll This patch is for the implementation of mips16 complex pattern addr16. 2012-10-28 06:02:37 +00:00
stldst.ll checking test case for r164811. was an omission to not check this in. this was already approved 2012-10-01 21:35:06 +00:00
sub1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
sub2.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
swzero.ll Don't modify MO while use_iterator is still pointing to it. 2012-08-09 22:08:24 +00:00
tailcall.ll Test case for r167039. Check that tail-call optimization is disabled for 2012-10-31 17:25:23 +00:00
tls16_2.ll Implement MipsHi for mips16 2012-10-27 00:57:14 +00:00
tls16.ll implement mips16 tls global addr 2012-10-26 22:57:32 +00:00
tls-alias.ll Add option disable-mips-delay-filler. Turn on mips' delay slot filler by 2012-08-22 02:51:28 +00:00
tls-models.ll Extend the IL for selecting TLS models (PR9788) 2012-06-23 11:37:03 +00:00
tls.ll Add option disable-mips-delay-filler. Turn on mips' delay slot filler by 2012-08-22 02:51:28 +00:00
uitofp.ll Fix bug 13532. 2012-08-28 02:12:42 +00:00
ul1.ll Handled unaligned load/stores properly in Mips16 2012-09-15 01:02:03 +00:00
unalignedload.ll Fix test cases in test/CodeGen/Mips. 2012-06-02 00:05:45 +00:00
vector-load-store.ll MIPS DSP: add vector load/store patterns. 2012-09-27 01:50:59 +00:00
weak.ll
xor1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
zeroreg.ll Make the following changes in MipsAsmPrinter.cpp: 2012-05-12 00:48:43 +00:00