1
0
mirror of https://github.com/sehugg/8bitworkshop.git synced 2024-11-25 03:34:05 +00:00
Commit Graph

49 Commits

Author SHA1 Message Date
Steven Hugg
d35a328246 fixed verilog inline asm 2018-07-12 06:50:40 -05:00
Steven Hugg
f466afa085 updated cpu_platform.v to have inputs 2018-07-11 19:53:05 -07:00
Steven Hugg
d6a702b929 fixed test, verilog; updated slip counter preset 2018-07-09 20:46:45 -05:00
Steven Hugg
c101292a9c Merge branch 'master' of github.com:sehugg/8bitworkshop 2018-06-07 16:25:48 -07:00
Steven Hugg
e0e3e0bf61 paddles.v 2018-06-03 19:46:33 -07:00
Steven Hugg
0ee201b9e8 update presets; redir.html expire 2018-06-01 10:33:37 -07:00
Steven Hugg
7f972f7ced Merge branch 'master' of github.com:sehugg/8bitworkshop 2018-05-27 11:13:27 -07:00
Steven Hugg
e29bfb5f7e working on assembler 2018-05-27 11:13:06 -07:00
Steven Hugg
4a8380b730 Merge branch 'master' of github.com:sehugg/8bitworkshop 2018-05-25 14:11:32 -07:00
Steven Hugg
09fb489c2d assembler: added .string .data .align 2018-04-16 20:16:58 -07:00
Steven Hugg
5b92659b97 "Save As"; command-line assembler; 32-bit limit (so far) in opcodes 2018-03-23 15:05:08 -06:00
Steven Hugg
1b3822050a make sure inspect var is not array 2018-03-18 20:11:11 -05:00
Steven Hugg
f24213aa1d fixed JSASM cache 2018-03-02 21:39:32 -06:00
Steven Hugg
c14e470778 can load verilog module from .asm file 2018-03-01 23:15:33 -06:00
Steven Hugg
725770ea3b new presets 2018-03-01 20:17:37 -06:00
Steven Hugg
db005dc98e can scroll scope when paused; updates to presets 2018-02-28 12:13:59 -06:00
Steven Hugg
8f1563f88e sync vs async RAM 2018-02-28 09:26:37 -06:00
Steven Hugg
b5c74234f3 smoother scope transition; slowest/fastest buttons; video width tweak 2018-02-27 14:09:27 -06:00
Steven Hugg
73bb496511 pixel editor takes 8'hxx format; fixed minor bugs 2018-02-26 15:55:39 -06:00
Steven Hugg
6fa030f398 optimized scanline renderer 2018-02-25 10:53:52 -06:00
Steven Hugg
b2beb2670c more Verilog code; inline asm for depends; fixed tank 2018-02-25 10:34:27 -06:00
Steven Hugg
20ddb8a11f moved around ALU ops, 16-bit cpu, reg/wire 2018-02-21 11:03:38 -06:00
Steven Hugg
f6d320a05b new inline verilog assembler 2018-02-18 11:14:04 -06:00
Steven Hugg
1790ca1747 updated verilog presets and test makefile 2018-02-16 23:33:29 -06:00
Steven Hugg
56ed79c14f caspr inline assembly with __asm 2018-02-15 09:56:45 -06:00
Steven Hugg
6b4c3bdbc2 fallback to network if include fails 2018-02-14 14:58:38 -06:00
Steven Hugg
89b1c64ac8 minor changes; preset changes; rotate output 2018-02-14 13:38:50 -06:00
Steven Hugg
8c3939ac6c fixed sample-based audio 2018-02-12 14:03:38 -06:00
Steven Hugg
e7067ff50d worked on CPU 2018-02-10 08:24:35 -06:00
Steven Hugg
9c25aed9fa preset updates; shadow text for scope view 2018-02-09 16:23:25 -06:00
Steven Hugg
661bbb0ced fixed hsync generator to use assign 2018-02-09 10:59:52 -06:00
Steven Hugg
11992645d6 more presets 2018-02-09 00:11:36 -06:00
Steven Hugg
122e462c9f work on cpu, sprite 2018-02-05 18:05:49 -06:00
Steven Hugg
f0f6783f6b more verilog presets 2018-02-03 20:37:12 -06:00
Steven Hugg
a456f3d9cf updated presets 2018-01-13 19:38:20 -06:00
Steven Hugg
45756f682d changed CRT timing 2018-01-08 10:30:10 -06:00
Steven Hugg
eb3a1164fa changed link(s) 2018-01-02 14:19:17 -06:00
Steven Hugg
bafc23cb5b tank, pixel edit > 8 bits 2017-12-04 16:40:10 -05:00
Steven Hugg
d732f320b0 work on simple CPU, paddle game, `include local files too, scope scrolling, hvsync reset 2017-11-30 12:28:25 -05:00
Steven Hugg
80588fcb31 verilog: scope updates, show js code, simple cpu 2017-11-28 20:38:48 -05:00
Steven Hugg
a541b3c4e6 working on verilog debugger 2017-11-24 20:41:44 -05:00
Steven Hugg
298ea62476 local storage editor 2017-11-21 20:53:00 -05:00
Steven Hugg
48baf73ecb variable inspection, bitmaps for verilog, active high hsync/vsync, powerup vs reset 2017-11-21 14:12:02 -05:00
Steven Hugg
2525d6e585 start yosys profiling 2017-11-20 10:32:34 -05:00
Steven Hugg
27a9076cb5 verilog: 2d array; digits; score; reset w/ no init; more warnings 2017-11-19 13:26:21 -05:00
Steven Hugg
e4fd886c94 ball_paddle updates, timer scheduling change 2017-11-18 07:58:36 -05:00
Steven Hugg
ff8784da33 more paddle/pong stuff; wider compiler msgs 2017-11-17 17:03:11 -05:00
Steven Hugg
4f73cde7cc support `include statements in verilog; book link changes; paddle/switches; scope transitions 2017-11-16 10:30:47 -05:00
Steven Hugg
014d659558 started on .v files; framerate detect 2017-11-12 11:52:17 -05:00