Thomas Harte
19dd2f92bd
Implements test case. Failing at present, naturally.
2021-09-25 21:52:41 -04:00
Thomas Harte
acfaa016a0
Adds a capture of traffic leading up to the Workbench boot logo.
...
Around which to construct a test case.
2021-09-25 18:10:07 -04:00
Thomas Harte
fa800bb809
Introduces code for minterm application.
2021-09-20 19:13:23 -04:00
Thomas Harte
e402e690b0
Assume and test that divide-by-zero posts the PC of the offending instruction.
2021-08-07 17:51:00 -04:00
Thomas Harte
b4ec9d70da
Adds the CNT input.
2021-08-03 22:19:41 -04:00
Thomas Harte
738999a8b7
Further expands list of applied tests.
2021-08-03 22:08:50 -04:00
Thomas Harte
34c1cc5693
Adds entry points for all remaining tests.
...
Failing now: the TB123s, which are TOD related, both CIA2 tests, and CIA1TAB (which I think needs me to implement Port B output toggling).
2021-08-03 17:19:35 -04:00
Thomas Harte
f0ef45f0ca
Introduces two further tests.
2021-08-03 16:58:51 -04:00
Thomas Harte
f576baf214
I'm not yet sure this is the best approach, but starts trying to make use of Lorenz's 6526 tests.
2021-07-30 21:21:16 -04:00
Thomas Harte
94907b51aa
Remove redundant parameter.
2021-07-06 20:47:49 -04:00
Thomas Harte
0085265d13
Test for a longer period; fix expected tone 1 count.
2021-07-06 20:46:22 -04:00
Thomas Harte
8e0893bd42
Clarifies control flow.
2021-07-06 20:28:32 -04:00
Thomas Harte
704dc9bdcb
Improves test, to assert that state toggles happen at interrupts.
2021-07-06 20:25:32 -04:00
Thomas Harte
3e6b804896
Switches to linked 1/50/1000 Hz timers, and per-interrupt state toggling.
2021-07-06 20:12:44 -04:00
Thomas Harte
f371221dba
Add a quick test of tone generator 1.
2021-07-02 23:57:11 -04:00
Thomas Harte
27b0579ec6
Avoid stack-error test case.
...
Also test that the interrupt is generated on the downward stroke.
2021-07-02 23:55:43 -04:00
Thomas Harte
283092cfbc
With a unit test in aid, corrects some lingering TimedInterruptSource
issues.
2021-07-02 23:41:19 -04:00
Thomas Harte
fbf1adef05
Introduces unit test and thereby seemingly fixes get_next_sequence_point.
...
There's still improper output in the actual machine though, so maybe something else is afoot?
2021-06-18 17:44:17 -04:00
Thomas Harte
f27e331462
Updates autotests to new RomFetcher world.
2021-06-06 20:34:55 -04:00
Thomas Harte
37dcf61130
Add timing tests, fix +3 discrepancy.
2021-04-23 22:29:57 -04:00
Thomas Harte
a1511f9600
Establishes that the 48/128kb contention patterns can be derived from my partial machine cycles alone.
2021-04-14 20:15:40 -04:00
Thomas Harte
68a04f4e6a
Adds IN/OUT I/D [R] to complete tests.
2021-04-13 22:00:24 -04:00
Thomas Harte
0d61902b10
Adds CP[I/D/IR/DR] tests.
2021-04-13 20:03:11 -04:00
Thomas Harte
3eec210b30
Adds LDI/LDD/LDIR/LDDR tests.
2021-04-13 20:00:29 -04:00
Thomas Harte
2e70b5eb9f
Advances to EX (SP), HL, leaving only [LD/CP/IN/OT][I/D]{R}.
2021-04-13 19:45:29 -04:00
Thomas Harte
8a3bfb8672
Adds an IN/OUT test.
2021-04-13 17:55:51 -04:00
Thomas Harte
06f1e64177
Advances to IO.
2021-04-12 21:41:20 -04:00
Thomas Harte
b42780173a
Establishes that there really is no Read4 and Read4Pre distinction.
...
Will finish these unit tests, then clean up.
2021-04-12 20:54:10 -04:00
Thomas Harte
36c8821c4c
Reaches the halfway point in tests.
2021-04-12 17:29:03 -04:00
Thomas Harte
9347fe5f44
Advances to next failing test: LD (ii+n), n
.
2021-04-12 17:11:58 -04:00
Thomas Harte
e82367def3
Switches to test-conformant behaviour for (IX/IY+n) opcode fetches.
2021-04-11 23:01:00 -04:00
Thomas Harte
47c5a243aa
Restructures, the better to explore errors.
2021-04-10 21:32:42 -04:00
Thomas Harte
070e359d82
Introduces failing test for BIT b, (ii+n).
2021-04-10 18:00:23 -04:00
Thomas Harte
400f54e508
Introduces failing test for bit b, (hl).
2021-04-10 12:04:48 -04:00
Thomas Harte
e0736435f8
Makes assumption that the address bus just holds its value during an internal operation.
2021-04-10 12:00:53 -04:00
Thomas Harte
b09c5538c6
Adds failing test for simple (ii+n) tests.
2021-04-09 21:28:35 -04:00
Thomas Harte
ce3d2913bf
Advances to 9 source table rows tested out of 37.
2021-04-09 20:38:17 -04:00
Thomas Harte
87202a2a27
Add two further tests, add checking of collected data size for all tests.
2021-04-09 18:32:03 -04:00
Thomas Harte
818a4dff25
Corrects ADD HL, dd test.
...
Or, at least, likely corrects. The bus cycle breakdown in the Z80 data sheet implies these accesses should come after completion of the refresh cycle, not during its long tail, so I think +1 is correct.
2021-04-08 22:23:15 -04:00
Thomas Harte
9e506c3206
Adds failing ADD hl, dd test.
2021-04-08 22:19:22 -04:00
Thomas Harte
50f53f7d97
Adds INC/DEC rr and LD SP, HL tests.
2021-04-08 22:14:53 -04:00
Thomas Harte
73fbd89c85
Correct opcodes, ability to terminate on a single-cycle contention.
2021-04-08 22:09:33 -04:00
Thomas Harte
f74fa06f2d
Introduces failing test for LD [A/I/R], [A/I/R].
2021-04-08 20:28:55 -04:00
Thomas Harte
ee989ab762
Fills in the rest of the simple two-byte instructions.
2021-04-08 20:13:52 -04:00
Thomas Harte
818655a9b6
Starts on two-bus-cycle instructions, correcting validators.
2021-04-08 20:01:46 -04:00
Thomas Harte
57a7e0834f
Corrects sampling of MREQ.
2021-04-08 19:21:35 -04:00
Thomas Harte
cd787486d2
Tests all of the single-byte, no-access opcodes.
2021-04-07 22:07:52 -04:00
Thomas Harte
67fd6787a6
Builds what I think I need to validate Z80 address, MREQ, IOREQ and RFSH.
2021-04-07 21:57:40 -04:00
Thomas Harte
094d623485
Updates unit tests.
2021-04-05 21:33:04 -04:00
C.W. Betts
5758693b7d
Minor pokes to the test files code.
2021-03-19 02:19:49 -06:00
Thomas Harte
e5076b295b
Corrects namespace.
2021-01-21 18:58:11 -05:00
Thomas Harte
3c20e1f037
Adds files for the M50740 and corrects namespace errors elsewhere.
2021-01-15 21:30:30 -05:00
Thomas Harte
15bedc74d4
Merge branch 'master' into AppleIIgs
2021-01-15 21:15:10 -05:00
Thomas Harte
ddb4bb1421
Better plans project layout.
2021-01-15 18:16:01 -05:00
Thomas Harte
ca94e9038e
Introduces 'far' test, fixes parsing.
2021-01-14 22:15:38 -05:00
Thomas Harte
2c72a77a25
Adds byte-by-byte decoder test; corrects divergences.
2021-01-13 21:51:18 -05:00
Thomas Harte
8c0e06e645
Adds a test for 0x83 and fixes sign extension.
...
ODA doesn't seem to accept 0x82, but testing 0x83 adds some confidence.
2021-01-13 20:42:21 -05:00
Thomas Harte
5058a8b96a
Completes the first test stream.
...
... and improves decoding consistency in conjunction.
2021-01-12 21:49:22 -05:00
Thomas Harte
762ecab3aa
Adds operand/displacement capture.
...
This gets unit test as far as a disagreement over how to handle bad 0xc4 suffixes.
2021-01-10 22:55:25 -05:00
Thomas Harte
9ba5b7c1d4
Adds a few more asserts.
...
It's still just operands and displacements failing, which is nice.
2021-01-08 23:21:01 -05:00
Thomas Harte
5f807b6e47
Ensures that the operand is the only thing failing in decoding of the first instruction.
2021-01-08 23:02:06 -05:00
Thomas Harte
86577b772b
Rethinks size
; packs all captured information into an x86 Instruction.
...
Albeit that operand and displacement are't yet captured. Or extractable.
2021-01-08 22:22:07 -05:00
Thomas Harte
3b55d3f158
Nudges up to a need to decode operation from the ModRegRM byte.
2021-01-05 21:25:12 -05:00
Thomas Harte
a8738b533a
Switch for now to block-level decoding.
...
It's easier to step debug.
2021-01-03 20:07:46 -05:00
Thomas Harte
11b6c1d4b5
Proceeds to three instructions correctly decoded. 'Wow'.
2021-01-03 17:03:50 -05:00
Thomas Harte
367cb1789d
Starts building an x86 test.
2021-01-03 16:37:35 -05:00
Thomas Harte
adf1484ecc
Introduces third test sequence, uneventfully.
2021-01-03 16:21:23 -05:00
Thomas Harte
eb8d0eefd5
Factors out some boilerplate and introduces second sequence.
2021-01-03 11:14:30 -05:00
Thomas Harte
c934e22cee
Introduces a first test of PowerPC decoding.
...
Corrected as a result: the bcx conditional, that stdu is 64-bit only, extraction of the li field.
2021-01-02 22:47:42 -05:00
Thomas Harte
3b2e97e77c
Introduces basic auxiliary switch tests.
...
All of which pass. Grrr.
2020-12-11 21:30:03 -05:00
Thomas Harte
c978a95463
Increases asserts and adds a test.
...
Thereby discovers and fixes a problem with set_main_paging().
2020-12-10 21:49:23 -05:00
Thomas Harte
d35def4bbc
Ensures a consistent initial state.
2020-12-06 22:01:59 -05:00
Thomas Harte
d5f209366a
Extends testing to disabling IO space.
2020-12-06 21:53:53 -05:00
Thomas Harte
9062e80e9d
Adds anti-IO protection.
2020-12-06 21:46:04 -05:00
Thomas Harte
fd3760cedc
Adds passing test of basic $00 -> $01 -> $e1 shadowing.
2020-12-06 21:19:38 -05:00
Thomas Harte
9b73331ee9
Resolves deprecated use of scanHexInt32
.
2020-12-06 20:49:12 -05:00
Thomas Harte
b0efc647f1
An OpenGL context is neither still necessary nor desirable.
2020-11-26 13:49:41 -05:00
Thomas Harte
4f9d06d8c7
Merge pull request #846 from MaddTheSane/maddsIIgs
...
Use url(forResource:... instead of path(forResource:…
2020-11-06 09:39:27 -05:00
C.W. Betts
189a468ad4
Use url(forResource:... instead of path(forResource:… as it cuts down on creating a URL struct.
2020-11-05 14:42:39 -07:00
C.W. Betts
a3414c2673
Update 65816kromTests.swift
...
Only have one runTest method.
2020-11-05 14:36:34 -07:00
Thomas Harte
5126163c5d
Attempts to reduce pull request heft.
...
Given that the licensing of krom's tests is uncertain, and I've given credit and an appropriate link, I needn't include the original code.
2020-11-04 21:49:45 -05:00
Thomas Harte
e3147b6b45
Introduces a pre-STP/WAI limit for the MSC test.
...
This way I retain testing of NOP, BRK, COP and WDM.
2020-11-03 20:59:07 -05:00
Thomas Harte
cc5ec78156
Provides something on WAI/STP; sizes STY by the x flag; disables MSC test.
2020-11-03 20:17:44 -05:00
Thomas Harte
5cbb91f352
Fixes COP
vector, ensures WDM
skips a byte.
2020-11-03 20:01:02 -05:00
Thomas Harte
bf85d71674
Brings ADC into conformance. Fixes JML
.
2020-11-03 18:12:10 -05:00
Thomas Harte
426e90eebf
Adds logic to work around Nintendo dependence in the krom tests.
...
Let the real work begin!
2020-11-03 14:18:40 -05:00
Thomas Harte
3889646d6b
Takes a swing at incorporating krom's 65816 test suite. At least as far as ADC.
2020-11-02 21:09:32 -05:00
Thomas Harte
bdda84dfde
Adds a very basic shadowing test.
...
For the record, I'm aware that there's a lot here that I'm not testing. I think the smart move is to get towards a running machine and see which configurations it actually tries to set up, then follow along with appropriate testing; it might cause me to discover a flaw in my comprehension before I've made the same mistake in both the code and a test.
2020-10-27 19:59:41 -04:00
Thomas Harte
74f9f6ad3b
Tests and corrects ROM access beyond bank $00.
2020-10-27 19:02:15 -04:00
Thomas Harte
f830f6a57a
Adds failing test of initial ROM mirroring.
...
It's the end of the evening, so this is it for today.
2020-10-25 22:13:54 -04:00
Thomas Harte
82c733c68c
Adds some very basic actual tests.
2020-10-25 21:40:50 -04:00
Thomas Harte
ed510409c4
Starts memory map test class, already finding a typo.
2020-10-25 21:31:21 -04:00
Thomas Harte
ab07814614
Eliminates now-broken 65816 flow test.
2020-10-19 21:02:46 -04:00
Thomas Harte
1653abdf88
Adds the .lst; otherwise I'll probably just lose it.
2020-10-19 20:58:24 -04:00
Thomas Harte
b3ab9fff9b
Imports a custom-built copy of Klaus Dormann's 65C02 test, with only 65816-compatible parts.
...
Thereby fixes another couple of 65816 issues — BRK(, etc) not clearing the decimal flag, and `TRB d` being mismapped.
2020-10-19 19:27:16 -04:00
Thomas Harte
69509f6502
Attempts to bring a little more consistency to my use of Swift in test code.
2020-10-17 22:42:54 -04:00
Thomas Harte
c3187fdbe1
Makes minor formatting improvement.
2020-10-17 22:31:51 -04:00
Thomas Harte
42228ea955
Adds 65C02As6502 test, to round out the set.
2020-10-17 22:31:32 -04:00
Thomas Harte
3c6adc1ff4
Completes 65816 addressing mode tests and corresponding fixes.
2020-10-14 22:00:52 -04:00
Thomas Harte
e511d33a7c
Adds test for [d], y; fixes implementation.
2020-10-14 21:42:41 -04:00