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491 Commits

Author SHA1 Message Date
Thomas Harte
927e61484f Map all events lists appropriately. 2023-02-12 23:02:51 -05:00
Thomas Harte
dce04e7219 Add a generator for character modes. 2023-02-12 22:54:08 -05:00
Thomas Harte
f5814b4c75 Add text-mode events list. 2023-02-12 22:45:11 -05:00
Thomas Harte
815a75d9b6 Extend generator to handle sprite collection. 2023-02-12 22:28:34 -05:00
Thomas Harte
4ad84e5047 Use generator for no-sprite events list. 2023-02-12 22:12:23 -05:00
Thomas Harte
8665dca7f0 Permit generator-based event-table generation. 2023-02-12 21:58:50 -05:00
Thomas Harte
41d57e03a6 Split out LineBuffer and Storage to make 9918Base more manageable. 2023-02-12 12:58:46 -05:00
Thomas Harte
914a9e0c84 Yamaha: don't touch address at all unless a RAM access. 2023-02-11 22:43:29 -05:00
Thomas Harte
8768ee1504 Merge branch 'MSX2' of github.com:TomHarte/CLK into MSX2 2023-02-11 22:40:03 -05:00
Thomas Harte
8e6c36bb15 Yamaha: don't part-modify address. 2023-02-11 10:35:42 -05:00
Thomas Harte
c6401f0444 Add TODO. 2023-02-07 22:28:18 -05:00
Thomas Harte
3c3efe3e22 Don't be so fussy. 2023-02-06 22:16:42 -05:00
Thomas Harte
7028bdd05d Limit to 14 bits in old modes. 2023-02-06 22:16:31 -05:00
Thomas Harte
7cb51c021b Observation: offset is needed only ephemerally. 2023-02-06 21:45:35 -05:00
Thomas Harte
a3df106f92 Reset write phase only upon traditional register accesses. 2023-02-06 20:32:24 -05:00
Thomas Harte
b538407386 Introduce separate state for palette entries. 2023-02-06 19:12:02 -05:00
Thomas Harte
c04d292c8e Make this more obviously correct, albeit arbitrarily. 
Comparing just a single bit would do.
 2023-02-05 22:53:08 -05:00
Thomas Harte
f9c88fd598 Fix memory mask; mildly improve commentary. 2023-02-05 22:51:16 -05:00
Thomas Harte
7fcb1b29dd Keep source within rectangle. 
This gives something vaguely recognisable, sort of, for the test program I'm using.
 2023-02-04 21:37:08 -05:00
Thomas Harte
6786e3e78c Initialise to zero, for completeness. 2023-02-04 21:32:31 -05:00
Thomas Harte
67755c3811 Attempt [H/L]MMM. 2023-02-04 21:29:44 -05:00
Thomas Harte
c6372295c5 Complete ReadSourcePixel & ReadSourceByte paths. 2023-02-04 21:23:41 -05:00
Thomas Harte
a2786e6266 Invest Colour with its own logic, including potential emptiness. 2023-02-04 21:14:20 -05:00
Thomas Harte
a892523c09 Advance to the next breaking point. 2023-02-04 11:43:06 -05:00
Thomas Harte
ab595f5e8d Merge branch 'MSX2' of github.com:TomHarte/CLK into MSX2 2023-02-04 11:02:10 -05:00
Thomas Harte
38950fe241 Sketch out remaining necessary @c AccessTypes. 2023-02-04 11:02:02 -05:00
Thomas Harte
46d009f27b Add logical fill. 2023-02-04 10:31:41 -05:00
Thomas Harte
34722bae89 Start pivoting to a more natural expression of TMS patterns. 2023-02-03 23:06:27 -05:00
Thomas Harte
d41081c59f Fix sections. 2023-02-02 21:55:00 -05:00
Thomas Harte
ec227ce021 Generalise rectangular operations. 2023-02-02 21:49:05 -05:00
Thomas Harte
83f6d1cda3 Prepare for source/destination operations. 2023-02-02 21:16:24 -05:00
Thomas Harte
6d315b4660 Switch to specifying number of bits, to reduce potential error. 2023-02-02 12:12:11 -05:00
Thomas Harte
debdad350d Don't allow a disabled screen to interfere with Yamaha addressing. 2023-02-02 12:03:33 -05:00
Thomas Harte
0d4dc214fb Merge branch 'MSX2' of github.com:TomHarte/CLK into MSX2 2023-02-02 11:38:45 -05:00
Thomas Harte
5d4c49c913 Attempt to enable high-speed fill. 2023-02-01 22:57:33 -05:00
Thomas Harte
8f5c7fcabc Merge branch 'MSX2' of github.com:TomHarte/CLK into MSX2 2023-02-01 22:25:12 -05:00
Thomas Harte
115acf835e Vertical state is actually tristate. 2023-02-01 22:25:00 -05:00
Thomas Harte
c0fec8db15 Clean up macro. 2023-02-01 15:05:21 -05:00
Thomas Harte
f0e70f18fd Fix seeding of output_pointer_. 2023-02-01 14:59:42 -05:00
Thomas Harte
9d2841bf6a Reenable full ram pointer capture. Thanks @PatrickvL ! 2023-02-01 14:55:33 -05:00
Thomas Harte
4cc34fd557 Resolve GCC complaint. 2023-02-01 14:28:19 -05:00
Thomas Harte
3636383b1f Silence abstract/non-virtual-destructor warning. 2023-02-01 14:20:11 -05:00
Thomas Harte
1264600bab Shorten long lines. 2023-02-01 14:18:36 -05:00
Thomas Harte
002d27d9c2 Resolve various type conversion errors, and reduce duplication. 2023-02-01 14:17:49 -05:00
Thomas Harte
90e8ce3253 Fix lines. 
TODO: determine whether I really need `location` as distinct from `.destination`.
 2023-01-31 21:33:57 -05:00
Thomas Harte
a315384e30 Provide context for byte-by-byte commands. 2023-01-31 21:29:55 -05:00
Thomas Harte
c5c722ae56 Generalise axis steps; begin HMMV. 2023-01-31 13:35:39 -05:00
Thomas Harte
872b9e5021 Predict Yamaha horizontal retrace interrupts. 2023-01-30 21:33:47 -05:00
Thomas Harte
492a170b20 Implement much of Yamaha line interrupts. 2023-01-30 21:24:53 -05:00
Thomas Harte
30a2b1611f Merge branch 'MSX2' of github.com:TomHarte/CLK into MSX2 2023-01-30 21:06:23 -05:00
Thomas Harte
29af5542f8 Make an effort at doing _something_ for G4. 2023-01-30 21:06:04 -05:00
Thomas Harte
bc4c54800e Type out just a little of status register 1. 2023-01-30 20:20:33 -05:00
Thomas Harte
8f20cb93e9 Note missed status accesses. 2023-01-29 21:20:50 -05:00
Thomas Harte
73e79b14ea Use Yamaha palette pervasively. 2023-01-29 21:17:00 -05:00
Thomas Harte
3142f5c21d Be overt about what replaces LineMode. 2023-01-29 21:04:15 -05:00
Thomas Harte
6d7f189ce7 Attempt the full panoply of logical pixel modes, across all graphics modes. 2023-01-29 18:28:49 -05:00
Thomas Harte
a91a5b8d07 Refer to actual field. 2023-01-29 18:02:09 -05:00
Thomas Harte
4cdcd3ac7d Retain logical operation, take colour combination outside the loop. 2023-01-29 13:29:19 -05:00
Thomas Harte
0576451102 Be overt about colour direction. 2023-01-29 13:22:56 -05:00
Thomas Harte
3f12a28f4f Locate first pixel correctly. 2023-01-28 22:50:04 -05:00
Thomas Harte
41ba883fb6 Honour direction, start transfer immediately. 2023-01-28 22:47:27 -05:00
Thomas Harte
1e646eb57b Improve transfer flag for LMMC. 2023-01-28 21:45:05 -05:00
Thomas Harte
2d6afe1013 Reduce repetition, tidy slightly. 2023-01-28 21:43:14 -05:00
Thomas Harte
d3c446d91b Take a shot at LMMC. 2023-01-28 21:30:45 -05:00
Thomas Harte
975ead5d01 Edge towards not assuming graphics mode. Much more to do here. 2023-01-28 13:54:26 -05:00
Thomas Harte
c6cda7c401 Switch to absolute placement of deferred events; properly serialise commands. 2023-01-28 11:55:12 -05:00
Thomas Harte
7e69e33ec2 Use paletted Yamaha border colour. 2023-01-27 22:42:02 -05:00
Thomas Harte
95e00dd958 Take slightly wrong-headed steps towards proper command timing. 2023-01-27 22:20:36 -05:00
Thomas Harte
8a673a697b Further adapt internal terminology. 2023-01-27 12:30:09 -05:00
Thomas Harte
75ad4cdb67 Fix line semantics. 2023-01-27 11:57:40 -05:00
Thomas Harte
d42b6df570 Retain extra pattern name address bits. 2023-01-27 06:44:11 -05:00
Thomas Harte
81b00c6d97 Add notes. 2023-01-26 22:25:10 -05:00
Thomas Harte
1e5f751bc0 Require STOP in order to stop. 2023-01-26 22:08:36 -05:00
Thomas Harte
9a65fffe16 That's PSET, not POINT. 2023-01-26 22:02:40 -05:00
Thomas Harte
515fa22bfe Implement point. 2023-01-26 21:52:41 -05:00
Thomas Harte
66ac089cc2 Deallocate. 2023-01-26 21:49:32 -05:00
Thomas Harte
5d5098acb2 Hack in vertical scrolling. 2023-01-26 21:38:51 -05:00
Thomas Harte
1bf8406e7e Correct deserialisation order. 2023-01-26 21:34:56 -05:00
Thomas Harte
75acbd2d6c A quick hack shows some part of the MSX logo. 2023-01-26 21:31:49 -05:00
Thomas Harte
baa6f9b3cd Implements the Command side of the line command. 2023-01-26 21:17:11 -05:00
Thomas Harte
1c6a0ad3f7 Clean up repetition. 2023-01-26 19:51:56 -05:00
Thomas Harte
fbfa26ad5e Minor steps towards implementing Line. 2023-01-26 12:55:08 -05:00
Thomas Harte
b12fd00145 Generate an appropriate instance for line drawing. 2023-01-26 12:09:06 -05:00
Thomas Harte
0c8815d6a0 Retain command-engine context. 2023-01-26 11:59:27 -05:00
Thomas Harte
700470915a Add pixel serialisation for Yamaha graphics mode 5. 2023-01-24 23:07:29 -05:00
Thomas Harte
f8b42d4107 While being lazy with types, implement 4/5/6/7 fetching. 2023-01-24 13:15:00 -05:00
Thomas Harte
63bd0f918d Be overt about buffer target and vertical position. 2023-01-24 12:46:09 -05:00
Thomas Harte
445b34933a Edge further towards actual fetching. 2023-01-23 23:19:04 -05:00
Thomas Harte
bbd8b011ba Remove temporarily-faulty check. 2023-01-23 22:52:03 -05:00
Thomas Harte
15fbf4cb7f Ensure Yamaha-style refresh is used in all modes. 2023-01-23 22:39:34 -05:00
Thomas Harte
7293f9dc10 Remove extraneous brackets, add comment to self. 2023-01-23 22:25:56 -05:00
Thomas Harte
8567c934b1 Ensure Yamaha refresh program is used. 2023-01-22 22:11:01 -05:00
Thomas Harte
2744a9b6b0 Tidy up. 2023-01-22 22:02:39 -05:00
Thomas Harte
91047e5b3a Start attempting to use table-based Yamaha fetch. 2023-01-22 22:00:28 -05:00
Thomas Harte
c6dd7d4726 Transcribe no-sprite event list. 2023-01-22 20:19:21 -05:00
Thomas Harte
b7d80f5ed1 Copy in some notes, expand line buffer. 2023-01-21 23:04:48 -05:00
Thomas Harte
a5765abbad Route into the Yamaha fetcher. 
Albeit that it doesn't yet fetch.
 2023-01-21 22:47:16 -05:00
Thomas Harte
696ec12516 Add address rotation for applicable modes. 2023-01-21 22:33:26 -05:00
Thomas Harte
c9734df65c Implement extended colour, sprite and RAM pointers. 2023-01-21 20:45:23 -05:00
Thomas Harte
13e490e7d7 Log selected screen mode. 2023-01-21 14:48:55 -05:00
Thomas Harte
cefcc1d443 Expand Yamaha graphics mode recognition. 2023-01-21 14:35:26 -05:00
Thomas Harte
d1f929e6f7 Just do a multiply and divide. Easy. 2023-01-21 14:19:52 -05:00
Thomas Harte
e289e6e757 Catch and map Yamaha palette entries. 
It's one less thing in the uncaptured log.
 2023-01-21 14:12:46 -05:00
Thomas Harte
a726c9d97a Enable indirect register writes. 2023-01-20 23:14:57 -05:00
Thomas Harte
c77e7c268f 1 = disable, 0 = enable. 2023-01-20 23:08:41 -05:00
Thomas Harte
9c57bfd58d Attempt to log dropped indirect writes. 2023-01-20 23:07:14 -05:00
Thomas Harte
4efda108c6 Transcribe the Yamaha 9938 register meanings. 2023-01-20 23:00:33 -05:00
Thomas Harte
191cf4829b Attempt real blank reporting. 2023-01-20 22:29:49 -05:00
Thomas Harte
9b7a925816 Give clearer names to the two pointers. 2023-01-20 20:29:15 -05:00
Thomas Harte
392b0acb58 Pull everything out of master_system_ struct. 
Now that it's inherently collected in the relevant `Storage`.
 2023-01-19 15:09:16 -05:00
Thomas Harte
4b7606894e Move Master System state, and start simplifying. 2023-01-19 14:09:31 -05:00
Thomas Harte
1fb94d15ab No need for this-> ugliness in Base methods. 2023-01-19 12:32:42 -05:00
Thomas Harte
348c42bdea Start trying to bluff my way through extended status. 2023-01-18 22:23:19 -05:00
Thomas Harte
e450e53c4e Temporarily copy and paste my way to further logging. 2023-01-18 14:59:30 -05:00
Thomas Harte
355ee7fbc7 Adjust factoring of read and write per expanded V9938 scope. 2023-01-18 12:36:57 -05:00
Thomas Harte
4d96122884 Eliminate hard-coded assumption of 16kb. 
Clearly I'll have to do something else to support 128k+, probably move the ram pointer?
 2023-01-10 12:38:19 -05:00
Thomas Harte
f1f16d1f9a Clarify and simplify half_cycles_before_internal_cycles. 2023-01-09 22:55:46 -05:00
Thomas Harte
fd14829992 Avoid hand-writing all the various conversions. 2023-01-09 22:34:56 -05:00
Thomas Harte
c0fe88a5bb Apply clock conversion to existing usages of do_external_slot. 2023-01-09 13:54:49 -05:00
Thomas Harte
4d9d684618 Add TODO on dangling hard-coded conversion. 2023-01-08 21:44:25 -05:00
Thomas Harte
a0a835cf10 Export memory size into traits. 2023-01-08 21:37:20 -05:00
Thomas Harte
ef67205ce8 Set pixel count per mode. 2023-01-08 21:31:00 -05:00
Thomas Harte
794adf470b Break assumption that cycles = pixels; fix pixel clocking. 2023-01-08 21:25:22 -05:00
Thomas Harte
8cc20844a9 Clock convert for draw_ calls. 2023-01-08 17:31:08 -05:00
Thomas Harte
b522d65c50 Fix border lengths. 2023-01-08 17:04:19 -05:00
Thomas Harte
cb19c2ffb0 Honour internal-clocked timing constants. 2023-01-08 14:10:06 -05:00
Thomas Harte
5f6ddf8557 Avoid expressing the same thing at different clock rates. 2023-01-08 13:58:12 -05:00
Thomas Harte
72e0bfecc1 Edge towards clock-independent line composition. 2023-01-07 14:57:32 -05:00
Thomas Harte
cdf547ac82 Decline to provide synthetic text mode timing on the Mega Drive. 2023-01-07 14:37:06 -05:00
Thomas Harte
dd5b4b484a Avoid double responsibility for state. 2023-01-07 14:34:33 -05:00
Thomas Harte
56831e02fc Expand fixed timing constants. 2023-01-07 13:10:51 -05:00
Thomas Harte
5d2d3944ef Make VRAM access delay a timing property. 2023-01-07 12:48:43 -05:00
Thomas Harte
f9e21df701 Avoid further hard-coded 342s. 2023-01-07 09:13:34 -05:00
Thomas Harte
bb436204f6 Merge branch 'VDPs' of github.com:TomHarte/CLK into VDPs 2023-01-07 09:10:50 -05:00
Thomas Harte
de45536b5c Elucidate a magic constant, add an extra constexpr. 2023-01-07 09:10:41 -05:00
Thomas Harte
ebc1264c2c Create a common home for timing information. 2023-01-06 22:39:46 -05:00
Thomas Harte
4875148617 Fill in Mega Drive numbers. 2023-01-05 14:22:51 -05:00
Thomas Harte
7a82b76911 Ensure visibility of memset. 2023-01-05 13:21:03 -05:00
Thomas Harte
27d37f71ec Generalise and better factor bit reversal and TMS drawing. 2023-01-05 13:18:10 -05:00
Thomas Harte
c4a5a9763e Minor indentation improvement. 2023-01-02 15:04:50 -05:00
Thomas Harte
a9f97ac871 Fix nothing-to-do test. 2023-01-02 15:04:08 -05:00
Thomas Harte
475440dc70 Update ClockConverter for potential alternative clocks. 2023-01-02 14:59:36 -05:00
Thomas Harte
dc3f8f5e42 These are the three fetchers to implement. 
They'll look fairly different from the TMS and SMS fetchers, I think, owing to the greater irregularity that comes with the smarter RAM accesses. I might need to play around for a while.
 2023-01-01 22:44:06 -05:00
Thomas Harte
459ef39b08 constexpr the TMS palette. 2023-01-01 22:34:07 -05:00
Thomas Harte
27812fd0e2 Separate fetchers into their own header. 2023-01-01 22:26:50 -05:00
Thomas Harte
38eb4d36de Better explain cumulative nature of @c to_internal. 2023-01-01 22:18:39 -05:00
Thomas Harte
2bd20a0cf8 Add further exposition. 2023-01-01 22:17:21 -05:00
Thomas Harte
da61909ec5 Explain the purpose here. 2023-01-01 21:20:30 -05:00
Thomas Harte
5729ece7bb Incompletely transitions towards more flexible clock ratios. 2023-01-01 14:20:45 -05:00
Thomas Harte
151f60958e Relocate the 9918 implementation file. 2023-01-01 14:01:19 -05:00
Thomas Harte
180045ada6 Convert vram_access_delay into a free-standing function. 2023-01-01 13:51:52 -05:00
Thomas Harte
11542e7a7f Improve const correctness, simplify inheritance. 2023-01-01 13:49:11 -05:00
Thomas Harte
71598250ea Improve commentary. 2023-01-01 13:41:51 -05:00
Thomas Harte
ffb0b2ce0b Eliminate runtime duplication of personality. 2022-12-31 21:50:57 -05:00
Thomas Harte
b7c315058f Also template Base. 2022-12-31 21:47:05 -05:00
Thomas Harte
7d6eac2895 Template the TMS on its personality. 
Template parameter currently unused, but preparatory to other improvements.
 2022-12-31 15:08:33 -05:00
Thomas Harte
d79aac3081 Shuffle the personality enum into the 'public' header. 2022-12-31 15:01:11 -05:00
Thomas Harte
8d5547dc9e Minor further style improvements. 
... as I refamiliarise myself.
 2022-12-29 22:09:14 -05:00
Thomas Harte
5d89293c92 Improve constness, primarily of reverse_table. 2022-12-29 11:29:19 -05:00
Thomas Harte
711f7b2d75 C++17 makes this a single step. 2022-12-27 22:50:12 -05:00
Thomas Harte
dca8c51384 Prefer to avoid a macro. 2022-12-27 22:36:27 -05:00
Thomas Harte
462b7dcbfa Add Mega Drive VRAM size. 2022-12-27 22:28:43 -05:00
Thomas Harte
2ab4b351ca Extend enum. 2022-12-27 22:20:47 -05:00
Thomas Harte
99ced5476f Add quick clock-rate notes. 2022-12-26 22:56:45 -05:00
Thomas Harte
1d5144b912 Correct no-interrupt signal. 2021-06-04 22:38:07 -04:00
Thomas Harte
1266bbb224 Makes the TMS a sequence-point-generating JustInTimeActor. 2021-04-05 21:02:37 -04:00
Thomas Harte
650b9a139b Tweak Master System blue scale. 2021-03-19 08:38:21 -04:00
Thomas Harte
a17d0e428f Protects against some further uninitialised values. 2020-09-16 18:15:57 -04:00
Thomas Harte
3cb1072c29 Adds an explicit [[fallthrough]] tag. 2020-06-19 23:10:25 -04:00
Thomas Harte
267006782f Starts to add Qt target; resolves many build warnings. 2020-05-30 00:37:06 -04:00
Thomas Harte
512a52e88d Increases const correctness, marks some additional constructors as constexpr, switches std::atomic construction style. 2020-05-20 23:34:26 -04:00
Thomas Harte
66c2eb0414 Further tightens const and constexpr usage. 2020-05-12 22:22:21 -04:00
Thomas Harte
25996ce180 Further doubles down on construction syntax for type conversions. 2020-05-09 23:00:39 -04:00
Thomas Harte
a7e1920597 Restores ColecoVision runtime options. 2020-03-18 00:06:52 -04:00
Thomas Harte
9d97a294a7 Corrects the TMS' get_scaled_scan_status. 
I think all platforms are now returning credible numbers.
 2020-01-22 19:34:10 -05:00
Thomas Harte
a71c5946f0 Ensures proper manipulation of scan_statuses, leading to the correct result out of a CRTMachine. 
Possibly with the exception of the TMS, as I appear to have uncovered an unrelated issue there.
 2020-01-21 22:28:25 -05:00
Thomas Harte
d97a073d1b Adds the necessary routine for all machines to be able to respond to get_scan_status. 
They all just as the CRT, as all are currently based on the CRT. Which doesn't currently know the total clock rate it would need to in order properly to scale the answer to the question. Further thought coming.
 2020-01-20 21:45:10 -05:00
Thomas Harte
c1bae49a92 Standardises on read and write for bus accesses. 
Logic being: name these things for the bus action they model, not the effect they have.
 2020-01-05 13:40:02 -05:00
Thomas Harte
274867579b Deploys constexpr as a stricter const. 2019-12-22 00:22:17 -05:00
Thomas Harte
a847654ef2 Corrects various old-fashioned bits of indentation, plus the odd const. 2019-12-22 00:00:23 -05:00
Thomas Harte
1c154131f9 Expands size of storage in Cycles/HalfCycles; adjusts widely to compensate. 2019-10-29 22:36:29 -04:00
Thomas Harte
929475d31e Minor correction: round down, not up. 2019-09-28 23:49:32 -04:00
Thomas Harte
d97348dd38 Eliminates dangling uses of printf. 2019-03-02 18:07:05 -05:00
Thomas Harte
601961deeb Wires through set_display_type. 2018-11-29 20:44:21 -08:00
Thomas Harte
64465f97b6 Starts towards reintroducing the proper mechanisms for selecting a display type at runtime. 2018-11-28 17:53:33 -08:00
Thomas Harte
5618288459 Reduces visible area, producing a tighter crop. 2018-11-25 22:32:12 -05:00
Thomas Harte
ee89be6730 Removes many stray spaces. 2018-11-23 22:32:32 -05:00
Thomas Harte
770d7e90e9 Removes stale sampling functions. 2018-11-22 22:47:29 -05:00
Thomas Harte
c5d9bf2c12 Optimises slightly for black borders. 
Specifically to help to debug proper display of unused lines in the new scan target.
 2018-11-17 18:23:42 -05:00
Thomas Harte
15b1176841 Ensures no border output if space is not allocated. 2018-11-14 22:32:33 -05:00
Thomas Harte
9dff13cbbf Re-establishes output from the machines with 9918s and derivatives. 2018-11-14 22:25:19 -05:00
Thomas Harte
6d277fecd5 Makes ScanTarget a little more communicative and orthogonal. 2018-11-10 19:52:57 -05:00
Thomas Harte
f6562de325 Possibly adds enough for the Electron and ZX80 to start outputting dummy lines. 
Let's see!
 2018-11-03 23:40:39 -04:00
Thomas Harte
b40211d2c0 Starts to bend 'CRTMachine' to a world farther from owning the GPU relationship. 2018-11-03 21:54:25 -04:00
Thomas Harte
da4d883321 Adds first, incomplete attempts to talk to a ScanTarget from the CRT. 
Does away with the hassle of `unsigned` while I'm here; that was a schoolboy error.
 2018-11-03 19:58:44 -04:00
Thomas Harte
f65d80b7d1 Ensures offset and flags are initialised to 0. 
This prevents a potential crash at startup.
 2018-10-29 22:09:32 -04:00
Thomas Harte
8652d8b23d (Mostly) randomises the 9918 start position. 2018-10-26 21:02:56 -04:00
Thomas Harte
e02aa885d8 Testing against the ColecoVision suggests this is probably always 7. 2018-10-26 20:59:12 -04:00
Thomas Harte
bb09762029 Introduces extra delays to VRAM access. 2018-10-26 20:19:08 -04:00
Thomas Harte
05a5c7120e Shunts CRAM dots into their proper place. 2018-10-26 20:06:51 -04:00