Thomas Harte
ef58ce6277
Gets a bit more rigorous about the clocking stage.
...
Albeit without advancing relative to the test.
2021-08-02 21:04:00 -04:00
Thomas Harte
15de5e98c4
Adds [partial] test for whether counters are linked.
2021-08-02 20:17:37 -04:00
Thomas Harte
38848ca2db
Rationalises reload logic and cuts storage.
...
Failure point is now chaining, I think.
2021-08-02 20:14:01 -04:00
Thomas Harte
77c627e822
Ensure that reading the interrupt flags really clears the master bit.
...
Also makes some guesses on one-shot and reload timing. Alas the test isn't in itself specific enough to be more systematic here.
2021-08-02 07:47:08 -04:00
Thomas Harte
c640132699
Reinstates clocking.
2021-08-01 21:35:08 -04:00
Thomas Harte
57dd38aef2
Reintroduces reload-on-off, adds interrupt delay.
2021-08-01 21:09:02 -04:00
Thomas Harte
460a6cb6fe
Attempts a more literal implementation.
2021-08-01 18:14:10 -04:00
Thomas Harte
3d160ce85f
Add another potential warning.
2021-07-30 18:21:38 -04:00
Thomas Harte
759007ffc1
Attempts to route CIA interrupts.
2021-07-28 19:36:30 -04:00
Thomas Harte
37a55c3a77
Corrects 6526 interrupt control write.
...
This seems to imply that the 6526 should be interrupting too.
2021-07-28 19:26:02 -04:00
Thomas Harte
bcb7bb5cce
Improves logging further.
...
To investigate the new perpetual loop.
2021-07-26 17:02:30 -04:00
Thomas Harte
34d4420e8c
Correct reading of top byte of counter 2.
2021-07-25 20:41:15 -04:00
Thomas Harte
fcd6b7b0ea
Takes further aim at the conters.
...
I think test cases are needed, probably.
2021-07-24 16:06:49 -04:00
Thomas Harte
ceca32ceb3
Takes a guess at one-shot mode.
2021-07-24 15:53:18 -04:00
Thomas Harte
77a8ddb95c
Edges towards working counters.
2021-07-23 22:43:47 -04:00
Thomas Harte
c733a4dbf8
Beefs up interrupt awareness.
2021-07-23 21:58:52 -04:00
Thomas Harte
d898a43dff
Implements time-of-day counters, provisionally.
...
Interrupts to do.
2021-07-23 21:24:07 -04:00
Thomas Harte
6123349b79
Stubs in control registers and disables exit-on-miss.
...
I think I may be running up against the limits of stubbing now. Probably time to implement some stuff.
2021-07-22 19:28:01 -04:00
Thomas Harte
56b62a5e49
Adds a dummy interrupt control register.
2021-07-22 16:09:32 -04:00
Thomas Harte
a030d9935e
Adds port input.
2021-07-18 20:25:04 -04:00
Thomas Harte
c425dec4d5
Makes some attempt to get as far as the overlay being disabled.
2021-07-18 17:17:41 -04:00
Thomas Harte
67d53601d5
Latch and return data direction.
...
Albeit with no port-handling effect yet.
2021-07-18 12:23:47 -04:00
Thomas Harte
622cca0acf
Adds sufficient address decoding to print a more helpful exit message.
2021-07-18 12:13:56 -04:00
Thomas Harte
48999c03a5
Adds concept of time, captured port handler.
2021-07-18 11:49:10 -04:00
Thomas Harte
377cc7bdcd
Start to introduce a 6526/8250.
2021-07-18 11:36:13 -04:00
Thomas Harte
a5d0976c2d
Eliminate unused #includes.
2021-07-18 11:35:57 -04:00
Thomas Harte
ae05010255
Improve indentation.
2021-07-18 11:29:26 -04:00
Thomas Harte
66cacbd0e0
Be overt about the type being supplied.
2021-07-18 11:28:18 -04:00
Thomas Harte
c8699d9770
Correct Disk II sleeping test to allow for spin-down.
2021-07-16 17:12:57 -04:00
Thomas Harte
69c0734975
WD1770: switch motor on even if spin-up is disabled.
2021-06-21 23:26:55 -04:00
Thomas Harte
1d5144b912
Correct no-interrupt signal.
2021-06-04 22:38:07 -04:00
Thomas Harte
b7a62e0121
Adds SZX support.
...
Tweaking exposed Spectrum state object as relevant.
2021-04-26 20:47:28 -04:00
Thomas Harte
3348167c46
Ensures AY registers are conveyed.
2021-04-26 17:39:11 -04:00
Thomas Harte
73c8157197
Retain 6850 time tracking at all times.
2021-04-20 22:26:43 -04:00
Thomas Harte
af1dc2d3b2
Switches to correct non-value sentinel.
2021-04-20 21:56:58 -04:00
Thomas Harte
1266bbb224
Makes the TMS a sequence-point-generating JustInTimeActor.
2021-04-05 21:02:37 -04:00
Thomas Harte
8a11a5832c
Uses GI::AY38910::Utility far and wide.
2021-03-26 23:19:47 -04:00
Thomas Harte
f37f89a7d3
Merge branch 'master' into ZXSpectrum
2021-03-21 22:44:37 -04:00
Thomas Harte
58be770eaa
Factors out some boilerplate.
...
When I'm confident this is correct, I can fix up the other call sites.
2021-03-21 00:14:48 -04:00
Thomas Harte
650b9a139b
Tweak Master System blue scale.
2021-03-19 08:38:21 -04:00
Thomas Harte
6839e9e3b3
Ensures no double definition of NDEBUG.
2021-03-07 12:52:54 -05:00
Thomas Harte
86fd47545d
Silences.
2021-03-03 20:51:33 -05:00
Thomas Harte
71a107fe75
Silences the IWM again, for now.
2021-02-23 21:57:19 -05:00
Thomas Harte
a3e98907ca
Removes temporary printf.
2021-02-14 21:03:54 -05:00
Thomas Harte
ee5f45c979
Merge branch 'master' into AppleIIgs
2020-12-29 22:16:23 -05:00
Thomas Harte
dfe4e49110
Ensure proper in-memory ordering of the b72a2c70 ROM.
2020-12-29 22:08:48 -05:00
Thomas Harte
8ace258fbc
Tackles outstanding GCC warnings.
2020-11-22 21:43:56 -05:00
Thomas Harte
9b45c5a1cd
Resolves out-of-bounds reads.
2020-11-21 22:36:10 -05:00
Thomas Harte
4a42de4f18
Attempts to add 5.25" drive support to the IIgs.
...
I want to try some classic software.
2020-11-20 21:37:17 -05:00
Thomas Harte
98347cb1c3
Starts in the direction of audio support.
2020-11-18 18:39:11 -05:00
Thomas Harte
cddd72876f
Flips meaning of ejected bit, to please the IIgs.
2020-11-18 17:20:48 -05:00
Thomas Harte
37815a982a
Much logging later, corrects 7Mhz IWM windows.
...
Confirmed by mathematics — the new ones are seven-eighths the length of the established 8Mhz windows — and with reference to suitable Apple documentation.
2020-11-13 22:05:45 -05:00
Thomas Harte
b0fc2f6ecf
Amps up logging.
...
Current suspicion is that the IIgs isn't getting a clean byte stream, never mind whether my assumption of exactly-Mac-style GCR holds (which it probably doesn't).
2020-11-12 21:54:54 -05:00
Thomas Harte
81969bbea9
Improves logging, at least for now.
2020-11-12 21:17:14 -05:00
Thomas Harte
1f5908dc51
Corrects logging output.
2020-11-11 20:26:04 -05:00
Thomas Harte
72884c3ead
Does a better job of shifting output; takes a new guess at the no-receiver case.
...
ROM03 at least now reaches "check startup device!"
2020-11-11 20:19:35 -05:00
Thomas Harte
80358cf5bd
Shift output even if nobody is listening.
2020-11-11 20:04:48 -05:00
Thomas Harte
6d511f01a4
Ensures intended no-drive behaviour; no more risks with dangling pointers or nullptr.
2020-11-11 17:54:21 -05:00
Thomas Harte
6d3d7c6006
It seems like this fix is no longer needed.
2020-11-11 17:30:22 -05:00
Thomas Harte
03d1aff6c0
Fixes 8-bit read/write.
2020-10-30 22:17:55 -04:00
Thomas Harte
034056d0cd
Adds full 8-bit clock addressing; stubs clock into the IIgs.
2020-10-29 21:38:36 -04:00
Thomas Harte
1249fb598b
Factors Apple's RTC out of the Macintosh.
2020-10-29 21:03:02 -04:00
Thomas Harte
9447aa38be
Removes debugging printf.
2020-09-22 22:13:54 -04:00
Thomas Harte
022ec20e75
Tries to add semantic meaning to the various auxiliary control fields.
...
To consider: decoding at set?
2020-09-22 20:50:39 -04:00
Thomas Harte
41f69405d8
Don't decrement timer 1 from the system clock when in PB6 mode.
...
TODO: rest of PB6 mode.
2020-09-21 22:39:49 -04:00
Thomas Harte
8e242eea54
Ensures timer-linked PB7 output is actually output.
2020-09-20 15:03:26 -04:00
Thomas Harte
703065a0a5
Takes a run at timer-linked PB7 output behaviour.
...
Seemingly sufficiently to pass the VICE test (which I've transcribed), though with some guesswork.
2020-09-20 14:51:59 -04:00
Thomas Harte
e807a462a1
My new reading is that only a write to the counter should affect the interrupt flag.
2020-09-17 21:31:29 -04:00
Thomas Harte
18790a90ae
Ensures timer 2 doesn't use timed behaviour when in pulse mode.
2020-09-17 21:09:32 -04:00
Thomas Harte
21afc70261
Adds formal data-sheet names.
2020-09-17 19:00:46 -04:00
Thomas Harte
a17d0e428f
Protects against some further uninitialised values.
2020-09-16 18:15:57 -04:00
Thomas Harte
bb57f0bcc7
Ensures all 6560 properties have a valid default value.
2020-09-16 17:24:18 -04:00
Thomas Harte
fa95a17af5
Resolves receive_bit_count-unused warnings.
2020-07-24 21:59:27 -04:00
Thomas Harte
8aeebdbc99
Remove redundant comment.
2020-07-16 23:26:45 -04:00
Thomas Harte
1288369865
Merge branch 'master' into FurtherSCC
2020-07-11 23:54:40 -04:00
Thomas Harte
2477752fa4
Adds further [[fallthrough]] attributes.
2020-06-19 23:36:51 -04:00
Thomas Harte
3cb1072c29
Adds an explicit [[fallthrough]] tag.
2020-06-19 23:10:25 -04:00
Thomas Harte
d64b4fbc26
Adds a Qt timer class. Precision seems to be 'acceptable'.
2020-05-31 23:39:08 -04:00
Thomas Harte
73131735fa
Further qmake warning corrections.
2020-05-30 19:31:17 -04:00
Thomas Harte
48afc54af6
Cuts down unused parameter warnings to just a few that may well indicate implementation errors.
2020-05-30 01:06:43 -04:00
Thomas Harte
267006782f
Starts to add Qt target; resolves many build warnings.
2020-05-30 00:37:06 -04:00
Thomas Harte
512a52e88d
Increases const correctness, marks some additional constructors as constexpr, switches std::atomic construction style.
2020-05-20 23:34:26 -04:00
Thomas Harte
66c2eb0414
Further tightens const and constexpr usage.
2020-05-12 22:22:21 -04:00
Thomas Harte
9458963311
Factors out shift by 7.
2020-05-10 13:57:50 -04:00
Thomas Harte
44690b1066
Halves effect of vibrato.
2020-05-10 12:05:14 -04:00
Thomas Harte
64c62c16fb
Adjusts tremolo scale.
2020-05-10 00:43:46 -04:00
Thomas Harte
afef4f05fe
Adds damping and phase resets for the rhythm section.
2020-05-10 00:10:51 -04:00
Thomas Harte
25996ce180
Further doubles down on construction syntax for type conversions.
2020-05-09 23:00:39 -04:00
Thomas Harte
31c6faf3c8
Adds a bunch of consts.
2020-05-09 21:23:52 -04:00
Thomas Harte
40b60fe5d4
Renames folder as per intended scope.
2020-05-09 18:04:11 -04:00
Thomas Harte
eed357abb4
Introduces concept of 'average peak volume' in order better to normalise audio sources like the OPLL.
2020-05-09 17:57:21 -04:00
Thomas Harte
8f541602c1
Moves modulator updates a sample behind operator updates.
2020-05-08 21:14:25 -04:00
Thomas Harte
668f4b77f3
Implements feedback.
2020-05-08 21:05:23 -04:00
Thomas Harte
303965fbb8
Removes the crutch of my first-attempt implementation.
2020-05-08 20:53:34 -04:00
Thomas Harte
792aed242d
Fixes the use-sustain flag.
2020-05-08 20:49:39 -04:00
Thomas Harte
dc5654b941
Attempts to implement the proper attack phase.
...
It's sounding pretty good now, but for sustain.
2020-05-08 18:59:05 -04:00
Thomas Harte
e51e2425cc
Attempts to implement decay and release the right way around and with full precision.
...
Higher numbers = decay/release more quickly, not more slowly.
2020-05-08 18:40:49 -04:00
Thomas Harte
95c6b9b55d
Declare proper envelope precision.
2020-05-08 17:58:50 -04:00
Thomas Harte
ea25ead19d
Ensures rhythm envelope generators don't pick up should_damp state.
2020-05-08 00:18:31 -04:00
Thomas Harte
24100ec3b0
Switches snare and high-hat envelope generators.
2020-05-08 00:08:14 -04:00
