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289 Commits

Author SHA1 Message Date
Chris Lattner
28b5b1c7b5 add support for vector->vector casts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26788 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-15 22:19:46 +00:00
Jim Laskey
f4321a3a43 Handle the removal of the debug chain. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26729 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-13 13:07:37 +00:00
Evan Cheng
0937103368 Added a parameter to control whether Constant::getStringValue() would chop 
off the result string at the first null terminator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26704 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-10 23:52:03 +00:00
Chris Lattner
7d74d1145f scrape out bits of llvm-db 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26701 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-10 22:48:19 +00:00
Chris Lattner
20a4921791 Simplify the interface to the schedulers, to not pass the selected heuristicin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26692 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-10 07:49:12 +00:00
Chris Lattner
59bcce5ae5 remove dbg_declare, it's not used yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26659 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-09 20:02:42 +00:00
Jim Laskey
21b6c9d647 Get rid of the multiple copies of getStringValue. Now a Constant:: method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26616 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-08 18:11:07 +00:00
Chris Lattner
b0d21ef20c Change the interface for getting a target HazardRecognizer to be more clean. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26608 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-08 04:25:59 +00:00
Chris Lattner
03fc53c174 Hoist the HazardRecognizer out of the ScheduleDAGList.cpp file to where 
targets can implement them.  Make the top-down scheduler non-g5-specific.

Remove the old testing hazard recognizer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26569 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-06 00:22:00 +00:00
Chris Lattner
a5de484bc7 Split the list scheduler into top-down and bottom-up pieces. The priority 
function of the top-down scheduler are completely bogus currently, and
having (future) PPC specific in this file is also wrong, but this is a
small incremental step.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26552 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-05 21:10:33 +00:00
Chris Lattner
a09f848c11 Codegen copysign[f] into a FCOPYSIGN node 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26542 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-05 05:09:38 +00:00
Evan Cheng
3e1ce5a44d Add more vector NodeTypes: VSDIV, VUDIV, VAND, VOR, and VXOR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26504 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-03 07:01:07 +00:00
Chris Lattner
41edaa0529 remove the read/write port/io intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26479 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-03 00:19:58 +00:00
Chris Lattner
03dd465215 Split memcpy/memset/memmove intrinsics into i32/i64 versions, resolving 
PR709, and paving the way for future progress.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26476 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-03 00:00:25 +00:00
Evan Cheng
860771d2d8 Vector ops lowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26436 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 01:09:54 +00:00
Chris Lattner
22873462c9 Add support for output memory constraints. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26410 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 23:45:39 +00:00
Jeff Cohen
7e88103cde Get VC++ building again. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26351 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 02:52:40 +00:00
Chris Lattner
0e43f2ba11 Implement (most of) selection of inline asm memory operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26350 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 02:13:54 +00:00
Chris Lattner
87bc3bd121 Lower C_Memory operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26346 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 01:11:24 +00:00
Chris Lattner
9f6637db10 Fix an endianness problem on big-endian targets with expanded operands 
to inline asms.  Mark some methods const.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26334 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 20:06:57 +00:00
Chris Lattner
c3a9f8d31c Record all of the expanded registers in the DAG and machine instr, fixing 
several bugs in inline asm expanded operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26332 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 19:21:04 +00:00
Chris Lattner
9b6fb5de49 This fixes a couple of problems with expansion 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26318 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 23:09:03 +00:00
Chris Lattner
864635ad7b Change a whole bunch of code to be built around RegsForValue instead of 
a single register number.  This fully implements promotion for inline asms,
expand is close but not quite right yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26316 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 22:37:12 +00:00
Chris Lattner
1efa40f6a4 split register class handling from explicit physreg handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26308 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 00:56:39 +00:00
Chris Lattner
0f0b7d4927 Adjust to changes in getRegForInlineAsmConstraint prototype 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26306 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 23:12:12 +00:00
Evan Cheng
cffbb5174f Dumb bug. Code sees a memcpy from X+c so it increments src offset. But it 
turns out not to point to a constant string but it forgot change the offset
back.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26242 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 23:11:42 +00:00
Evan Cheng
298ebf2bd8 If the false case is the current basic block, then this is a self loop. 
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop.  Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.

Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26231 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 08:27:56 +00:00
Evan Cheng
a47876d87a Remove an unused function parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26221 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-15 22:12:35 +00:00
Evan Cheng
74d0aa9a4b Turn a memcpy from string constant into a series of stores of constant values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26219 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-15 21:59:04 +00:00
Evan Cheng
c080d6fb3d Lower memcpy with small constant size operand into a series of load / store 
ops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26195 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-15 01:54:51 +00:00
Evan Cheng
dea7245997 Doh again! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26188 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 23:05:54 +00:00
Evan Cheng
c4f8eee054 Keep to < 80 cols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26177 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 20:12:38 +00:00
Evan Cheng
ac940ab1bf Missed a break so memcpy cases fell through to memset. Doh. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26176 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 19:45:56 +00:00
Evan Cheng
80e89d7d6c Fixed a build breakage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26175 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 09:11:59 +00:00
Evan Cheng
a03a5dc7ce Rename maxStoresPerMemSet to maxStoresPerMemset, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26174 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 08:38:30 +00:00
Evan Cheng
1db92f947c Expand memset dst, c, size to a series of stores if size falls below the 
target specific theshold, e.g. 16 for x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26171 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 08:22:34 +00:00
Chris Lattner
06a248c9b3 now that libcalls don't suck, we can remove this hack 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26164 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 05:39:35 +00:00
Jim Laskey
d96185aa62 Rename to better reflect usage (current and planned.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26145 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-13 12:50:39 +00:00
Jim Laskey
ce72b1755f Reorg for integration with gcc4. Old style debug info will not be passed though 
to SelIDAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26115 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-11 01:01:30 +00:00
Evan Cheng
cccf1232a6 Get rid of some memory leaks identified by Valgrind 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25960 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 06:49:00 +00:00
Chris Lattner
dc19b70d24 Add initial support for immediates. This allows us to compile this: 
int %rlwnm(int %A, int %B) {
  %C = call int asm "rlwnm $0, $1, $2, $3, $4", "=r,r,r,n,n"(int %A, int %B, int 4, int 17)
  ret int %C
}

into:

_rlwnm:
        or r2, r3, r3
        or r3, r4, r4
        rlwnm r2, r2, r3, 4, 17    ;; note the immediates :)
        or r3, r2, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25955 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 02:26:14 +00:00
Chris Lattner
3d81fee851 Initial early support for non-register operands, like immediates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25952 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 02:16:44 +00:00
Chris Lattner
7632e2beb4 remove some #ifdef'd out code, which should properly be in the dag combiner anyway. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25941 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 20:13:59 +00:00
Chris Lattner
2223aea6ed Implement matching constraints. We can now say things like this: 
%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4)

and get:

xyz r2, r3, r4, r2

note that the r2's are pinned together.  Yaay for 2-address instructions.

2342 ----------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25893 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 00:25:23 +00:00
Chris Lattner
4e4b576e2e Implement simple register assignment for inline asms. This allows us to compile: 
int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

into:

 (0x8906130, LLVM BB @0x8902220):
        %r2 = OR4 %r3, %r3
        %r3 = OR4 %r4, %r4
        INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3
        %r3 = OR4 %r2, %r2
        BLR

which asmprints as:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz $0, $1, $2      ;; need to print the operands now :)
        or r3, r2, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25878 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 18:59:47 +00:00
Chris Lattner
2cc2f66c25 adjust to changes in InlineAsm interface. Fix a few minor bugs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25865 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 01:28:23 +00:00
Chris Lattner
6656dd1a78 Handle physreg input/outputs. We now compile this: 
int %test_cpuid(int %op) {
        %B = alloca int
        %C = alloca int
        %D = alloca int
        %A = call int asm "cpuid", "=eax,==ebx,==ecx,==edx,eax"(int* %B, int* %C, int* %D, int %op)
        %Bv = load int* %B
        %Cv = load int* %C
        %Dv = load int* %D
        %x = add int %A, %Bv
        %y = add int %x, %Cv
        %z = add int %y, %Dv
        ret int %z
}

to this:

_test_cpuid:
        sub %ESP, 16
        mov DWORD PTR [%ESP], %EBX
        mov %EAX, DWORD PTR [%ESP + 20]
        cpuid
        mov DWORD PTR [%ESP + 8], %ECX
        mov DWORD PTR [%ESP + 12], %EBX
        mov DWORD PTR [%ESP + 4], %EDX
        mov %ECX, DWORD PTR [%ESP + 12]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 8]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 4]
        add %EAX, %ECX
        mov %EBX, DWORD PTR [%ESP]
        add %ESP, 16
        ret

... note the proper register allocation.  :)

it is unclear to me why the loads aren't folded into the adds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25827 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 02:03:41 +00:00
Chris Lattner
04c62c78f4 remove method I just added 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25728 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 03:43:09 +00:00
Chris Lattner
4f16e70faa add a new callback 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25727 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 03:37:03 +00:00
Nate Begeman
0aed7840ec Implement Promote for VAARG, and allow it to be custom promoted for people 
who don't want the default behavior (Alpha).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25726 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 03:14:31 +00:00
Nate Begeman
ee625573b5 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25696 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 21:09:22 +00:00
Chris Lattner
ce7518ce92 initial selectiondag support for new INLINEASM node. Note that inline asms 
with outputs or inputs are not supported yet. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25664 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-26 22:24:51 +00:00
Nate Begeman
acc398c195 First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25606 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 18:21:52 +00:00
Evan Cheng
3f23952404 If scheduler choice is the default (-sched=default), use target scheduling 
preference to determine which scheduler to use. SchedulingForLatency ==
Breadth first; SchedulingForRegPressure == bottom up register reduction list
scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25599 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 09:12:57 +00:00
Jim Laskey
17d52f7234 Typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25545 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-23 13:34:04 +00:00
Evan Cheng
f0f9c90204 Skeleton of the list schedule. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25544 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-23 08:26:10 +00:00
Evan Cheng
4ef1086749 Factor out more instruction scheduler code to the base class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25532 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-23 07:01:07 +00:00
Chris Lattner
39a17dd31d Fix bugs lowering stackrestore, fixing 2004-08-12-InlinerAndAllocas.c on 
PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25522 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-23 05:22:07 +00:00
Chris Lattner
a3818e6f9a Fix a bug in a recent refactor that caused a bunch of programs to miscompile 
or the compiler to crash.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25503 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-21 19:12:11 +00:00
Evan Cheng
a9c2091cd3 Do some code refactoring on Jim's scheduler in preparation of the new list 
scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25493 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-21 02:32:06 +00:00
Chris Lattner
4eebb60f84 If the target doesn't support f32 natively, insert the FP_EXTEND in target-indep 
code, so that the LowerReturn code doesn't have to handle it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25482 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-20 18:38:32 +00:00
Chris Lattner
d12b2d7b5a Temporary work around for a libcall insertion bug: If a target doesn't 
support FSIN/FCOS nodes, do not lower sin/cos to them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25425 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-18 21:50:14 +00:00
Robert Bocchino
4eb2e3a6f4 Support for the insertelement operation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25405 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-17 20:06:42 +00:00
Reid Spencer
0b118206bf For PR411: 
This patch is an incremental step towards supporting a flat symbol table.
It de-overloads the intrinsic functions by providing type-specific intrinsics
and arranging for automatically upgrading from the old overloaded name to
the new non-overloaded name. Specifically:
  llvm.isunordered -> llvm.isunordered.f32, llvm.isunordered.f64
  llvm.sqrt -> llvm.sqrt.f32, llvm.sqrt.f64
  llvm.ctpop -> llvm.ctpop.i8, llvm.ctpop.i16, llvm.ctpop.i32, llvm.ctpop.i64
  llvm.ctlz -> llvm.ctlz.i8, llvm.ctlz.i16, llvm.ctlz.i32, llvm.ctlz.i64
  llvm.cttz -> llvm.cttz.i8, llvm.cttz.i16, llvm.cttz.i32, llvm.cttz.i64
New code should not use the overloaded intrinsic names. Warnings will be
emitted if they are used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25366 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-16 21:12:35 +00:00
Nate Begeman
3a04ffbf6d Remove some duplicated code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25313 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-14 03:18:27 +00:00
Nate Begeman
d88fc03602 bswap implementation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25312 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-14 03:14:10 +00:00
Chris Lattner
140d53c99c Compile llvm.stacksave/restore into STACKSAVE/STACKRESTORE nodes, and allow 
targets to custom expand them as they desire.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25273 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-13 02:50:02 +00:00
Chris Lattner
e8f7a4bbee Add "support" for stacksave/stackrestore to the dag isel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25268 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-13 02:24:42 +00:00
Robert Bocchino
c0f4cd9931 Added selection DAG support for the extractelement operation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25179 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-10 19:04:57 +00:00
Jim Laskey
b2efb853f0 Applied some recommend changes from sabre. The dominate one beginning "let the 
pass manager do it's thing."  Fixes crash when compiling -g files and suppresses
dwarf statements if no debug info is present.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25100 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-04 22:28:25 +00:00
Chris Lattner
9797c5cc3e enable the gep isel opt 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24910 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 19:36:36 +00:00
Chris Lattner
3b841e9f52 Lower ConstantAggregateZero into zeros 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24890 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 02:43:26 +00:00
Jim Laskey
f5395cee6a Added source file/line correspondence for dwarf (PowerPC only at this point.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24748 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-16 22:45:29 +00:00
Chris Lattner
86cb643801 Don't lump the filename and working dir together 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24697 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 17:40:33 +00:00
Chris Lattner
ac22c83e68 Accept and ignore prefetches for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24678 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 22:51:16 +00:00
Chris Lattner
3802c2552f Minor tweak to get isel opt 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24663 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-11 09:05:13 +00:00
Chris Lattner
c78b0b740b improve code insertion in two ways: 
1. Only forward subst offsets into loads and stores, not into arbitrary
   things, where it will likely become a load.
2. If the source is a cast from pointer, forward subst the cast as well,
   allowing us to fold the cast away (improving cases when the cast is
   from an alloca or global).

This hasn't been fully tested, but does appear to further reduce register
pressure and improve code.  Lets let the testers grind on it a bit. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24640 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-08 08:00:12 +00:00
Nate Begeman
cc827e60b6 Fix a crash where ConstantVec nodes were being generated with the wrong 
type when the target did not support them.  Also teach Legalize how to
expand ConstantVecs.

This allows us to generate

_test:
        lwz r2, 12(r3)
        lwz r4, 8(r3)
        lwz r5, 4(r3)
        lwz r6, 0(r3)
        addi r2, r2, 4
        addi r4, r4, 3
        addi r5, r5, 2
        addi r6, r6, 1
        stw r2, 12(r3)
        stw r4, 8(r3)
        stw r5, 4(r3)
        stw r6, 0(r3)
        blr

For:

void %test(%v4i *%P) {
        %T = load %v4i* %P
        %S = add %v4i %T, <int 1, int 2, int 3, int 4>
        store %v4i %S, %v4i * %P
        ret void
}

On PowerPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24633 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-07 19:48:11 +00:00
Nate Begeman
8cfa57b1b4 Teach the SelectionDAG ISel how to turn ConstantPacked values into 
constant nodes with vector types.  Also teach the asm printer how to print
ConstantPacked constant pool entries.  This allows us to generate altivec
code such as the following, which adds a vector constantto a packed float.

LCPI1_0:  <4 x float> < float 0.0e+0, float 0.0e+0, float 0.0e+0, float 1.0e+0 >
        .space  4
        .space  4
        .space  4
        .long   1065353216      ; float 1
        .text
        .align  4
        .globl  _foo
_foo:
        lis r2, ha16(LCPI1_0)
        la r2, lo16(LCPI1_0)(r2)
        li r4, 0
        lvx v0, r4, r2
        lvx v1, r4, r3
        vaddfp v0, v1, v0
        stvx v0, r4, r3
        blr

For the llvm code:

void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = add <4 x float> %tmp1, < float 0.0, float 0.0, float 0.0, float 1.0 >
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24616 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-06 06:18:55 +00:00
Chris Lattner
c88d8e944d Fix the #1 code quality problem that I have seen on X86 (and it also affects 
PPC and other targets).  In a particular, consider code like this:

struct Vector3 { double x, y, z; };
struct Matrix3 { Vector3 a, b, c; };
double dot(Vector3 &a, Vector3 &b) {
   return a.x * b.x  +  a.y * b.y  +  a.z * b.z;
}
Vector3 mul(Vector3 &a, Matrix3 &b) {
   Vector3 r;
   r.x = dot( a, b.a );
   r.y = dot( a, b.b );
   r.z = dot( a, b.c );
   return r;
}
void transform(Matrix3 &m, Vector3 *x, int n) {
   for (int i = 0; i < n; i++)
      x[i] = mul( x[i], m );
}

we compile transform to a loop with all of the GEP instructions for indexing
into 'm' pulled out of the loop (9 of them).  Because isel occurs a bb at a time
we are unable to fold the constant index into the loads in the loop, leading to
PPC code that looks like this:

LBB3_1: ; no_exit.preheader
        li r2, 0
        addi r6, r3, 64        ;; 9 values live across the loop body!
        addi r7, r3, 56
        addi r8, r3, 48
        addi r9, r3, 40
        addi r10, r3, 32
        addi r11, r3, 24
        addi r12, r3, 16
        addi r30, r3, 8
LBB3_2: ; no_exit
        lfd f0, 0(r30)
        lfd f1, 8(r4)
        fmul f0, f1, f0
        lfd f2, 0(r3)        ;; no constant indices folded into the loads!
        lfd f3, 0(r4)
        lfd f4, 0(r10)
        lfd f5, 0(r6)
        lfd f6, 0(r7)
        lfd f7, 0(r8)
        lfd f8, 0(r9)
        lfd f9, 0(r11)
        lfd f10, 0(r12)
        lfd f11, 16(r4)
        fmadd f0, f3, f2, f0
        fmul f2, f1, f4
        fmadd f0, f11, f10, f0
        fmadd f2, f3, f9, f2
        fmul f1, f1, f6
        stfd f0, 0(r4)
        fmadd f0, f11, f8, f2
        fmadd f1, f3, f7, f1
        stfd f0, 8(r4)
        fmadd f0, f11, f5, f1
        addi r29, r4, 24
        stfd f0, 16(r4)
        addi r2, r2, 1
        cmpw cr0, r2, r5
        or r4, r29, r29
        bne cr0, LBB3_2 ; no_exit

uh, yuck.  With this patch, we now sink the constant offsets into the loop, producing
this code:

LBB3_1: ; no_exit.preheader
        li r2, 0
LBB3_2: ; no_exit
        lfd f0, 8(r3)
        lfd f1, 8(r4)
        fmul f0, f1, f0
        lfd f2, 0(r3)
        lfd f3, 0(r4)
        lfd f4, 32(r3)       ;; much nicer.
        lfd f5, 64(r3)
        lfd f6, 56(r3)
        lfd f7, 48(r3)
        lfd f8, 40(r3)
        lfd f9, 24(r3)
        lfd f10, 16(r3)
        lfd f11, 16(r4)
        fmadd f0, f3, f2, f0
        fmul f2, f1, f4
        fmadd f0, f11, f10, f0
        fmadd f2, f3, f9, f2
        fmul f1, f1, f6
        stfd f0, 0(r4)
        fmadd f0, f11, f8, f2
        fmadd f1, f3, f7, f1
        stfd f0, 8(r4)
        fmadd f0, f11, f5, f1
        addi r6, r4, 24
        stfd f0, 16(r4)
        addi r2, r2, 1
        cmpw cr0, r2, r5
        or r4, r6, r6
        bne cr0, LBB3_2 ; no_exit

This is much nicer as it reduces register pressure in the loop a lot.  On X86,
this takes the function from having 9 spilled registers to 2.  This should help
some spec programs on X86 (gzip?)

This is currently only enabled with -enable-gep-isel-opt to allow perf testing
tonight.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24606 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-05 07:10:48 +00:00
Chris Lattner
d67b3a8bf7 dbg.stoppoint returns a value, don't forget to init it 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24583 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-03 18:50:48 +00:00
Nate Begeman
f43a3ca26d First chunk of actually generating vector code for packed types. These 
changes allow us to generate the following code:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

for this llvm:

void %foo(<4 x float>* %a) {
entry:
        %tmp1 = load <4 x float>* %a
        %tmp2 = add <4 x float> %tmp1, %tmp1
        store <4 x float> %tmp2, <4 x float>* %a
        ret void
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24534 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 08:22:07 +00:00
Reid Spencer
6ff7240a5c Fix a problem with llvm-ranlib that (on some platforms) caused the archive 
file to become corrupted due to interactions between mmap'd memory segments
and file descriptors closing. The problem is completely avoiding by using
a third temporary file.

Patch provided by Evan Jones


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24527 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 05:21:10 +00:00
Chris Lattner
36ce69195e Add support for a new STRING and LOCATION node for line number support, patch 
contributed by Daniel Berlin, with a few cleanups here and there by me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24515 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-29 06:21:05 +00:00
Nate Begeman
ab48be3772 Check in code to scalarize arbitrarily wide packed types for some simple 
vector operations (load, add, sub, mul).

This allows us to codegen:
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = add <4 x float> %tmp1, %tmp1
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

on ppc as:
_foo:
        lfs f0, 12(r3)
        lfs f1, 8(r3)
        lfs f2, 4(r3)
        lfs f3, 0(r3)
        fadds f0, f0, f0
        fadds f1, f1, f1
        fadds f2, f2, f2
        fadds f3, f3, f3
        stfs f0, 12(r3)
        stfs f1, 8(r3)
        stfs f2, 4(r3)
        stfs f3, 0(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24484 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-22 18:16:00 +00:00
Nate Begeman
4ef3b817fe Rather than attempting to legalize 1 x float, make sure the SD ISel never 
generates it.  Make MVT::Vector expand-only, and remove the code in
Legalize that attempts to legalize it.

The plan for supporting N x Type is to continually epxand it in ExpandOp
until it gets down to 2 x Type, where it will be scalarized into a pair of
scalars.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24482 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-22 01:29:36 +00:00
Chris Lattner
b67eb9131c Unbreak codegen of bools. This should fix the llc/jit/llc-beta failures 
from last night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24427 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-19 18:40:42 +00:00
Nate Begeman
5fbb5d2459 Teach LLVM how to scalarize packed types. Currently, this only works on 
packed types with an element count of 1, although more generic support is
coming.  This allows LLVM to turn the following code:

void %foo(<1 x float> * %a) {
entry:
  %tmp1 = load <1 x float> * %a;
  %tmp2 = add <1 x float> %tmp1, %tmp1
  store <1 x float> %tmp2, <1 x float> *%a
  ret void
}

Into:

_foo:
        lfs f0, 0(r3)
        fadds f0, f0, f0
        stfs f0, 0(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24416 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-19 00:36:38 +00:00
Nate Begeman
e21ea61588 Split out the shift code from visitBinary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24412 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-18 07:42:56 +00:00
Chris Lattner
b1a5a5c4c0 when debugging lower dbg intrinsics to calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24377 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-16 07:22:30 +00:00
Andrew Lenharth
8b91c77385 added a chain output 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24306 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-11 22:48:54 +00:00
Andrew Lenharth
51b8d54922 continued readcyclecounter support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24300 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-11 16:47:30 +00:00
Chris Lattner
c9ea6fde30 Refactor intrinsic lowering stuff out of visitCall 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24261 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-09 19:44:01 +00:00
Chris Lattner
6b2d69655a Fix CodeGen/X86/shift-folding.ll:test3 on X86 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24256 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-09 16:50:40 +00:00
Chris Lattner
7436b57de3 Avoid creating a token factor node in trivially redundant cases. This 
eliminates almost one node per block in common cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24254 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-09 05:03:03 +00:00
Chris Lattner
7c0104b525 Handle GEP's a bit more intelligently. Fold constant indices early and 
turn power-of-two multiplies into shifts early to improve compile time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24253 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-09 04:45:33 +00:00
Nate Begeman
ae232e7a10 Add the necessary support to the ISel to allow targets to codegen the new 
alignment information appropriately.  Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack.  Support for
arbitrarily aligned dynamic allocas coming soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24224 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-06 09:00:38 +00:00
Chris Lattner
bf209489ad Significantly simplify this code and make it more aggressive. Instead of having 
a special case hack for X86, make the hack more general: if an incoming argument
register is not used in any block other than the entry block, don't copy it to
a vreg.  This helps us compile code like this:

%struct.foo = type { int, int, [0 x ubyte] }
int %test(%struct.foo* %X) {
        %tmp1 = getelementptr %struct.foo* %X, int 0, uint 2, int 100
        %tmp = load ubyte* %tmp1                ; <ubyte> [#uses=1]
        %tmp2 = cast ubyte %tmp to int          ; <int> [#uses=1]
        ret int %tmp2
}

to:

_test:
        lbz r3, 108(r3)
        blr

instead of:

_test:
        lbz r2, 108(r3)
        or r3, r2, r2
        blr

The (dead) copy emitted to copy r3 into a vreg for extra-block uses was
increasing the live range of r3 past the load, preventing the coallescing.

This implements CodeGen/PowerPC/reg-coallesce-simple.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24115 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-30 19:42:35 +00:00
Nate Begeman
4a95945fa5 Add the ability to lower return instructions to TargetLowering. This 
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23802 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 23:23:37 +00:00
Chris Lattner
d222f6ab67 Fix Generic/2005-10-18-ZeroSizeStackObject.ll by not requesting a zero 
sized stack object if either the array size or the type size is zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23801 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 22:14:06 +00:00
Chris Lattner
2dfa8192ab remove hack 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23797 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 22:11:42 +00:00
Chris Lattner
af21d55aee Enable Nate's excellent DAG combiner work by default. This allows the 
removal of a bunch of ad-hoc and crufty code from SelectionDAG.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23682 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-10 16:47:10 +00:00
Chris Lattner
d48050aa15 make sure that -view-isel-dags is the input to the isel, not the input to 
the second phase of dag combining


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23631 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-05 06:09:10 +00:00
Jeff Cohen
2aeaf4e839 Fix VC++ warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23579 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-01 03:57:14 +00:00
Chris Lattner
01b3d73c20 Add FP versions of the binary operators, keeping the int and fp worlds seperate. 
Though I have done extensive testing, it is possible that this will break
things in configs I can't test.  Please let me know if this causes a problem
and I'll fix it ASAP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23504 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 22:28:18 +00:00
Chris Lattner
6c38b33613 If the target prefers it, use _setjmp/_longjmp should be used instead of setjmp/longjmp for llvm.setjmp/llvm.longjmp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23481 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-27 22:15:53 +00:00
Chris Lattner
fa57702388 If a function has liveins, and if the target requested that they be plopped 
into particular vregs, emit copies into the entry MBB.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23331 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-13 19:30:54 +00:00
Nate Begeman
2300f55046 Add an option to the DAG Combiner to enable it for beta runs, and turn on 
that option for PowerPC's beta.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23253 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-07 00:15:36 +00:00
Chris Lattner
fd88f64934 Don't create zero sized stack objects even for array allocas with a zero 
number of elements.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23219 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-02 18:41:28 +00:00
Chris Lattner
a639a43602 Fix the release build, noticed by Eric van Riet Paap 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23215 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-02 07:09:28 +00:00
Chris Lattner
fab08875b7 For values that are live across basic blocks and need promotion, use ANY_EXTEND 
instead of ZERO_EXTEND to eliminate extraneous extensions.  This eliminates
dead zero extensions on formal arguments and other cases on PPC, implementing
the newly tightened up test/Regression/CodeGen/PowerPC/small-arguments.ll test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23205 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-02 00:19:37 +00:00
Chris Lattner
da8abb0239 It is NDEBUG not _NDEBUG 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23186 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-01 18:44:10 +00:00
Chris Lattner
88b9c15912 Disable this code, which broke many tests last night 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23114 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-27 16:16:51 +00:00
Chris Lattner
9d3a483a38 Don't copy regs that are only used in the entry block into a vreg. This 
changes the code generated for:

short %test(short %A) {
  %B = xor short %A, -32768
  ret short %B
}

to:

_test:
        xori r2, r3, 32768
        xoris r2, r2, 65535
        extsh r3, r2
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 16, 31
        xori r2, r3, 32768
        xoris r2, r2, 65535
        extsh r3, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23109 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-26 22:49:59 +00:00
Chris Lattner
025c39bf36 Call the InsertAtEndOfBasicBlock hook if the usesCustomDAGSchedInserter 
flag is set on an instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23098 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-26 20:54:47 +00:00
Chris Lattner
82cfa5d616 Make -view-isel-dags show the dag before instruction selecting, in case 
the target isel crashes due to unimplemented features like calls :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22997 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-24 00:34:29 +00:00
Chris Lattner
8f03405ee5 Fix a problem where constant expr shifts would not have their shift amount 
promoted to the right type.  This fixes: IA64/2005-08-22-LegalizerCrash.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22969 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-22 17:28:31 +00:00
Chris Lattner
36b708f057 Enable critical edge splitting by default 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22863 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 17:35:14 +00:00
Chris Lattner
495a0b5191 Add a new beta option for critical edge splitting, to avoid a problem that 
Nate noticed in yacr2 (and I know occurs in other places as well).

This is still rough, as the critical edge blocks are not intelligently placed
but is added to get some idea to see if this improves performance.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22825 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 06:37:43 +00:00
Chris Lattner
fae59b99b8 Fix a regression on X86, where FP values can be promoted too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22822 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 06:06:25 +00:00
Chris Lattner
d5d0f9bd20 Eliminate the RegSDNode class, which 3 nodes (CopyFromReg/CopyToReg/ImplicitDef) 
used to tack a register number onto the node.

Instead of doing this, make a new node, RegisterSDNode, which is a leaf
containing a register number.  These three operations just become normal
DAG nodes now, instead of requiring special handling.

Note that with this change, it is no longer correct to make illegal
CopyFromReg/CopyToReg nodes.  The legalizer will not touch them, and this
is bad, so don't do it. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22806 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-16 21:55:35 +00:00
Chris Lattner
7cf7e3f33f Eliminate the SetCCSDNode in favor of a CondCodeSDNode class. This pulls the 
CC out of the SetCC operation, making SETCC a standard ternary operation and
CC's a standard DAG leaf.  This will make it possible for other node to use
CC's as operands in the future...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22728 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-09 20:20:18 +00:00
Jeff Cohen
00b16889ab Eliminate all remaining tabs and trailing spaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22523 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-27 06:12:32 +00:00
Nate Begeman
700a3c97e9 Remove unnecessary FP_EXTEND. This causes worse codegen for SSE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22469 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-19 16:50:03 +00:00
Chris Lattner
e64e72b794 Make several cleanups to Andrews varargs change: 
1. Pass Value*'s into lowering methods so that the proper pointers can be
   added to load/stores from the valist
2. Intrinsics that return void should only return a token chain, not a token
   chain/retval pair.
3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22338 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-05 19:57:53 +00:00
Andrew Lenharth
06ef88472f restore old srcValueNode behavior and try to to work around it 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22315 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-29 18:54:02 +00:00
Andrew Lenharth
782ad62f33 tracking the instructions causing loads and stores provides more information than just the pointer being loaded or stored 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22311 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-29 15:57:19 +00:00
Andrew Lenharth
213e557cef If we support structs as va_list, we must pass pointers to them to va_copy 
See last commit for LangRef, this implements it on all targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22273 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-22 21:04:42 +00:00
Andrew Lenharth
558bc88a00 core changes for varargs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22254 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-18 18:34:52 +00:00
Chris Lattner
1ca85d567c Fix construction of ioport intrinsics, fixing X86/io.llx and io-port.llx 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22026 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-14 13:56:55 +00:00
Chris Lattner
adf6c2a0cb Eliminate special purpose hacks for dynamic_stack_alloc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22015 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-14 07:29:57 +00:00
Chris Lattner
50381b6c41 LowerOperation takes a dag 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22004 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-14 05:50:48 +00:00
Chris Lattner
a8217e3000 Align doubles on 8-byte boundaries if possible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21993 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 23:14:17 +00:00
Chris Lattner
adf6a965a3 Add an isTailCall flag to LowerCallTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21958 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 18:50:42 +00:00
Chris Lattner
405ef9e28d Emit function entry code after lowering hte arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21931 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 07:33:32 +00:00
Chris Lattner
3aa7832c82 Allow targets to emit code into the entry block of each function 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21930 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 07:23:21 +00:00
Chris Lattner
9092fa310c Pass calling convention to use into lower call to 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21900 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-12 19:56:57 +00:00
Chris Lattner
16ce0df927 wrap long line 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21870 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-11 18:57:06 +00:00
Chris Lattner
ef311aa7cf The semantics of cast X to bool are a comparison against zero, not a truncation! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21833 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 22:17:13 +00:00
Chris Lattner
d0f6c1f52d Add support for matching the READPORT, WRITEPORT, READIO, WRITEIO intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21825 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 20:22:36 +00:00
Chris Lattner
fd414a27fd Don't use the load/store instruction as the source pointer, use the pointer 
being stored/loaded through!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21806 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 04:28:51 +00:00
Chris Lattner
369e6db9b6 wrap long lines 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21804 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 04:08:33 +00:00
Chris Lattner
7ea0ade1b6 When hitting an unsupported intrinsic, actually print it 
Lower debug info to noops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21698 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-05 17:55:17 +00:00
Andrew Lenharth
691ef2ba06 Implement count leading zeros (ctlz), count trailing zeros (cttz), and count 
population (ctpop).  Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.

More coming soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21676 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-03 17:19:30 +00:00
Chris Lattner
f76e7dc8d8 Codegen and legalize sin/cos/llvm.sqrt as FSIN/FCOS/FSQRT calls. This patch 
was contributed by Morten Ofstad, with some minor tweaks and bug fixes added
by me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21636 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-30 04:43:14 +00:00
Andrew Lenharth
2d86ea21dd Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends. 
(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*.  Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21599 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-27 20:10:01 +00:00
Misha Brukman
dedf2bd5a3 Convert tabs to spaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21439 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-22 04:01:18 +00:00
Misha Brukman
edf128a7fa Remove trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21420 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-21 22:36:52 +00:00
Nate Begeman
b882752bd0 Fold shift by size larger than type size to undef 
Make llvm undef values generate ISD::UNDEF nodes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21261 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-12 23:12:17 +00:00
Chris Lattner
e7ccd4acd2 Emit BRCONDTWOWAY when possible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21167 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-09 03:30:29 +00:00