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Author SHA1 Message Date
Chris Lattner
b5b73c4c86 a more graceful fix for test/Other/inline-asm-newline-terminator.ll, 
follow on to r103765


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108390 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-15 00:37:34 +00:00
Eli Friedman
5e84e8e52a Speculatively revert r108378; may be causing bootstrap failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108389 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-15 00:33:00 +00:00
Jakob Stoklund Olesen
6881898eb5 Last COPY conversion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108387 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 23:58:21 +00:00
Bob Wilson
273ff31e13 Remove restriction on NEON alignment values. Some of the NEON ld/st 
instructions use different values (e.g., 2-byte or 4-byte alignment).
Also fix ARMInstPrinter to print these alignments as bits instead of bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108386 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 23:54:43 +00:00
Jakob Stoklund Olesen
b5378ea12e Use TargetOpcode::COPY instead of X86-native register copy instructions when 
lowering atomics. This will allow those copies to still be coalesced after
TII::isMoveInstr is removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108385 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 23:50:27 +00:00
Eric Christopher
723a05a66f 80-col. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108381 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 23:41:32 +00:00
Owen Anderson
bd129a7460 Add instcombine transforms to optimize tests of multiple bits of the same value into a single larger comparison. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108378 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 23:33:51 +00:00
Dan Gohman
336e8d7e7c Make the order in which variables are described in debug information 
independent of the order that isel happens to visit the dbg_declare
intrinsics. This fixes a bug in which the formal arguments were
being printed in reverse order, now that fast isel is going bottom up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108369 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 23:08:16 +00:00
Chris Lattner
41af1cdd1c fix indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108368 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 23:04:59 +00:00
Benjamin Kramer
38e59891ee Don't pass StringRef by reference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108366 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 22:38:02 +00:00
Dan Gohman
163f78ea40 Properly restore DebugLoc after leaving the local constant area. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108364 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 22:01:31 +00:00
Dan Gohman
79b78a43ec Just use getParent() instead of getModuleFromVal when the value is a Function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108358 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 21:12:44 +00:00
Dan Gohman
40cf12fe77 Rename WriteConstantInt to WriteConstantInternal, to avoid confusion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108357 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 20:57:55 +00:00
Owen Anderson
e84178a0bd Extend SimplifyCFG's common-destination folding heuristic to allow a single 
"bonus" instruction to be speculatively executed.  Add a heuristic to
ensure we're not tripping up out-of-order execution by checking that this bonus
instruction only uses values that were already guaranteed to be available.

This allows us to eliminate the short circuit in (x&1)&&(x&2).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108351 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 19:52:16 +00:00
Dan Gohman
834480374b Factor out metadata parsing into a separate function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108343 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 18:26:50 +00:00
Chris Lattner
9fe2c67045 Merge lib/Target/X86/X86COFF.h into include/llvm/Support/COFF.h, 
patch by Michael Spencer!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108342 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 18:14:33 +00:00
Jim Grosbach
502e0aa628 Improve 64-subtraction of immediates when parts of the immediate can fit 
in the literal field of an instruction. E.g.,
long long foo(long long a) {
  return a - 734439407618LL;
}

rdar://7038284



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108339 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 17:45:16 +00:00
Dan Gohman
2dd50e656f Delete fast-isel's trivial load optimization; it breaks debugging because 
it can look past points where a debugger might modify user variables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108336 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 17:25:37 +00:00
Bob Wilson
fed76ffa56 Add missing address register update to t2LDM_RET instruction. 
Patch by Brian Lucas. PR7636.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108332 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 16:02:13 +00:00
Duncan Sands
3dc7224379 Rather than using an ifdef on the target to zero out fields, 
just use memset to zero the entire struct.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108330 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 14:32:33 +00:00
Eli Friedman
54cc0e12da A couple potential optimizations inspired by comment 4 in PR6773. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108328 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 06:58:26 +00:00
Evan Cheng
dedd974e7e Fix for PR7193 was overly conservative. The only case where sibcall callee 
address cannot be allocated a register is in 32-bit mode where the first
three arguments are marked inreg. In that case EAX, EDX, and ECX will be
used for argument passing.

This fixes PR7610.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108327 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 06:44:01 +00:00
Bob Wilson
7e3f0d2690 Add support for NEON VMVN immediate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108324 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 06:31:50 +00:00
Bob Wilson
046afdb50b The bits in the cmode field of 32-bit VMOV immediate instructions all depend 
of the value of the immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108323 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 06:30:44 +00:00
Chris Lattner
07c9b64719 revert r108320, I see the failures now... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108322 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 06:16:35 +00:00
Chris Lattner
7e185af930 reapply benjamin's instcombine patch, I don't see anything wrong with it and can't repro any problems with a manual self-host. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108320 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 05:59:13 +00:00
Chris Lattner
b09a97e565 fix a bug found by a warning I added to clang this morning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108309 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 01:57:17 +00:00
Evan Cheng
db89809037 Teach ProcessImplicitDefs to transform more COPY instructions into IMPLICIT_DEF (and subsequently eliminate them). This allows machine LICM to hoist IMPLICIT_DEF's. PR7620. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108304 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 01:22:19 +00:00
Bob Wilson
9e82bf12a0 Add an ARM-specific DAG combining to avoid redundant VDUPLANE nodes. 
Radar 7373643.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108303 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 01:22:12 +00:00
Dan Gohman
a10b8494a5 Don't propagate debug locations to instructions for materializing 
constants, since they may not be emited near the other instructions
which get the same line, and this confuses debug info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108302 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-14 01:07:44 +00:00
Bruno Cardoso Lopes
7dbf7d8b1c Add AVX 256-bit compare instructions and a bunch of testcases 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108286 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 22:06:38 +00:00
Jakob Stoklund Olesen
d9f6ec977a Print VNInfo flags. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108277 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 21:19:05 +00:00
Bob Wilson
cba270d042 Use a target-specific VMOVIMM DAG node instead of BUILD_VECTOR to represent 
NEON VMOV-immediate instructions.  This simplifies some things.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108275 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 21:16:48 +00:00
Bruno Cardoso Lopes
87a85c7ef0 AVX 256-bit conversion instructions 
Add the x86 VEX_L form to handle special cases where VEX_L must be set.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108274 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 21:07:28 +00:00
Dale Johannesen
b5611a6230 In inline asm treat indirect 'X' constraint as 'm'. 
This may not be right in all cases, but it's better
than asserting which it was doing before.  PR 7528.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108268 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 20:17:05 +00:00
Kevin Enderby
52a18aedae Added a check that pusha cannot be encoded in 64-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108265 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 20:05:41 +00:00
Jakob Stoklund Olesen
6382d2cadd Add an assertion to make PR7542 fail consistently. 
LiveInterval::overlapsFrom dereferences end() if it is called on an empty
interval.

It would be reasonable to just return false - an empty interval doesn't overlap
anything, but I want to know who is doing it first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108264 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 19:56:28 +00:00
Dan Gohman
9dc8ae110f Add support for empty named metadata too. This isn't particularly 
useful, but it is nice for consistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108262 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 19:42:44 +00:00
Jakob Stoklund Olesen
186eb73845 Fix LiveInterval::overlaps so it doesn't claim touching intervals overlap. 
Also, one binary search is enough.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108261 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 19:42:20 +00:00
Dan Gohman
ac80975ea4 Add support for empty metadata nodes: !{}. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108259 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 19:33:27 +00:00
Evan Cheng
218977b53e Extend the r107852 optimization which turns some fp compare to code sequence using only i32 operations. It now optimize some f64 compares when fp compare is exceptionally slow (e.g. cortex-a8). It also catches comparison against 0.0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108258 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 19:27:42 +00:00
Evan Cheng
7a41599962 Add an ARM "feature". Cortex-a8 fp comparison is very slow (> 20 cycles). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108256 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 19:21:50 +00:00
Evan Cheng
ea4cdb7ead -enable-unsafe-fp-math should not imply -enable-finite-only-fp-math. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108254 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 18:46:14 +00:00
Eric Christopher
f0193ed8de Grammar. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108252 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 18:27:13 +00:00
Duncan Sands
d0d3ccc827 Handle the case of a tail recursion in which the tail call is followed 
by a return that returns a constant, while elsewhere in the function
another return instruction returns a different constant.  This is a
special case of accumulator recursion, so just generalize the existing
logic a bit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108241 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 15:41:41 +00:00
Gabor Greif
63d024fc9a rotate CallInst operands 
with this commit the callee moves to the end of
the operand array (from the start) and the call
arguments now start at index 0 (formerly 1)

this ordering is now consistent with InvokeInst

this commit only flips the switch,
functionally it is equivalent to
r101465

I intend to commit several cleanups after a few
days of soak period



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108240 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 15:31:36 +00:00
Bob Wilson
6dce00ced4 Move NEON "modified immediate" encode/decode into ARMAddressingModes.h to 
avoid replicated code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108227 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 04:44:34 +00:00
Chris Lattner
37a746bc85 my work on adding segment registers to LEA missed the 
disassembler.  Remove some code from the disassembler to
compensate, unbreaking disassembly of lea's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108226 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 04:23:55 +00:00
Bruno Cardoso Lopes
fd920fa59a Add AVX 256-bit packed logical forms 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108224 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 02:38:35 +00:00
Bruno Cardoso Lopes
6991623dd7 Add AVX 256-bit unop arithmetic instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108223 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 01:53:31 +00:00
Bruno Cardoso Lopes
4344d85769 Since AVX is a superset of all SSE versions, only use HasAVX for AVX instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108222 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 00:38:47 +00:00
Jakob Stoklund Olesen
9fac4159dd Don't add memory operands to storeRegToStackSlot / loadRegFromStackSlot results, 
they already have one.

This fixes the himenobmtxpa miscompilation on ARM.

The PostRA scheduler got confused by the double memoperand and hoisted a stack
slot load above a store to the same slot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108219 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-13 00:23:30 +00:00
David Greene
8f17bc4fbd Move some SIMD fragment code into X86InstrFragmentsSIMD so that the 
utility classes can be used from multiple files.  This will aid
transitioning to a new refactored x86 SIMD specification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108213 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 23:41:28 +00:00
Bruno Cardoso Lopes
a0d09a85e2 Add AVX 256 binary arithmetic instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108207 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 23:04:15 +00:00
Bruno Cardoso Lopes
f428fee70d More refactoring of basic SSE arith instructions. Open room for 256-bit instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108204 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 22:41:32 +00:00
Daniel Dunbar
5146a0970d MC/AsmParser: Move ELF specific parser to ELFAsmParser.cpp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108196 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 21:23:32 +00:00
Daniel Dunbar
9c23d7f25e MC/AsmParser: Move Darwin specific parse to DarwinAsmParser.cpp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108193 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 20:51:51 +00:00
Dan Gohman
cfbf0ed8b0 Apply the SSE dependence idiom for SSE unary operations to 
SD instructions too, in addition to SS instructions. And
add a comment about it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108191 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 20:46:04 +00:00
Daniel Dunbar
4d5fe97c47 MC/AsmParser: Move .section parsing to Darwin specific parser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108190 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 20:42:34 +00:00
Daniel Dunbar
47f5608029 MC/AsmParser: Move special section directive parsing to Darwin specific parser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108187 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 20:23:36 +00:00
Bob Wilson
c7a797b82b Remove some code that doesn't appear to do anything. All the ARM call 
instructions already have implicit defs of LR.  The comment suggests that
this is intended to fix something like pr6111, but it doesn't really do
that either.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108186 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 20:22:45 +00:00
Daniel Dunbar
7a56fc224c MC/AsmParser: Add a basic ELFAsmParser extension. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108185 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 20:08:04 +00:00
Bruno Cardoso Lopes
aa099be71f Add AVX 256-bit MOVMSK forms 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108184 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 20:06:32 +00:00
Daniel Dunbar
4c7c08bfbf MC/AsmParser: Inline AsmParser::CreateSymbol into callers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108183 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 19:52:10 +00:00
Daniel Dunbar
b6c3a607ac MC/AsmParser: Move .tbss and .zerofill parsing to Darwin specific parser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108180 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 19:37:35 +00:00
Daniel Dunbar
492b7a21cb MC/AsmParser: Move .desc parsing to Darwin specific parser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108179 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 19:22:53 +00:00
Daniel Dunbar
38a4e2acb7 MC/AsmParser: Move .lsym parsing to Darwin specific parser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108176 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 19:08:25 +00:00
Daniel Dunbar
9ac66b008d MC/AsmParser: Move some misc. Darwin directive handling to DarwinAsmParser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108174 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 18:49:22 +00:00
Dan Gohman
ed42f1e58f Check begin!=end, rather than !begin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108167 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 18:12:35 +00:00
Daniel Dunbar
e47497087b MC/AsmParser: Add a DarwinAsmParser extension. 
- Currently initialization is a bit of a hack, but harmless. We need to rework
   various parts of target initialization to clean this up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108165 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 18:12:02 +00:00
Rafael Espindola
9d544d0416 Fix a typo and fit in 80 columns. Found by Bob Wilson. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108164 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 18:11:17 +00:00
Daniel Dunbar
8f34bead90 MC/AsmParser: Switch a bunch of directive parsing to use accessors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108163 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 18:03:11 +00:00
Dan Gohman
545d00645c Add a lint check for mismatched return types, inspired by PR6944. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108162 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 18:02:04 +00:00
Daniel Dunbar
81ea00f45d MCAsmParser: Pull some directive handling out into a helper class, and change 
DirectiveMap to be based on MCAsmParserExtension.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108161 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 17:54:38 +00:00
Daniel Dunbar
eceec05c82 MC/AsmParser: Switch some directive parsing to use accessor methods. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108160 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 17:45:27 +00:00
Daniel Dunbar
53131982d6 MC: Add MCAsmParserExtension, a base class for all the target/object specific 
classes which want to extend the basic asm parser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108158 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 17:27:45 +00:00
Daniel Dunbar
dc4c7da5d4 MC: Move AsmParser::TokError to MCAsmParser(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108155 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 17:18:45 +00:00
Daniel Dunbar
ca90dc6d29 MC: Move getLoc() to MCAsmLexer(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108154 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 17:10:00 +00:00
Benjamin Kramer
c9fe6374b7 Nope, still breaks the release selfhost bots :( 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108153 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 16:38:48 +00:00
Benjamin Kramer
8fd437c43f Reapply the "or" half of r108136, which seems to be less problematic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108152 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 16:15:48 +00:00
Gabor Greif
a9b8338bfa cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108150 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 15:48:26 +00:00
Dan Gohman
be4d10d7fa Don't fast-isel an x87 comparison opcode, as fast-isel doesn't 
support branching on x87 comparisons yet. This fixes PR7624.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108149 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 15:46:30 +00:00
Benjamin Kramer
e2d07b5208 Revert r108141 again, sigh. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108148 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 14:42:04 +00:00
Gabor Greif
40119ceeec cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108147 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 14:15:58 +00:00
Gabor Greif
a53029b1fc cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108146 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 14:15:10 +00:00
Gabor Greif
65b9212d34 cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108145 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 14:14:03 +00:00
Gabor Greif
aaaaa02a93 cache result of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108144 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 14:13:15 +00:00
Gabor Greif
b7df500063 cache results of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108143 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 14:12:11 +00:00
Gabor Greif
ee1f44fba3 cache results of operator* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108142 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 14:10:24 +00:00
Benjamin Kramer
98a8206e58 Reapply 108136 with an ugly pasto fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108141 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 13:44:00 +00:00
Benjamin Kramer
ad854f0764 Move optimization to avoid redundant matching. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108140 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 13:34:22 +00:00
Benjamin Kramer
0cc4ed1ca5 Revert r108136 until I figure out why it broke selfhost. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108139 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 12:35:49 +00:00
Gabor Greif
110b75aa75 cache dereferenced iterators 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108138 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 12:03:02 +00:00
Gabor Greif
639e9e47a2 recommit r108131 (hich has been backed out in r108135) with a fix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108137 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 12:02:10 +00:00
Benjamin Kramer
4fc719e607 instcombine: fold (x & y) | (~x & z) and (x & y) ^ (~x & z) into ((y ^ z) & x) ^ z which is one instruction shorter. (PR6773) 
before:
  %and = and i32 %y, %x
  %neg = xor i32 %x, -1
  %and4 = and i32 %z, %neg
  %xor = xor i32 %and4, %and

after:
  %xor1 = xor i32 %z, %y
  %and2 = and i32 %xor1, %x
  %xor = xor i32 %and2, %z


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108136 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 11:54:45 +00:00
Gabor Greif
e99e077522 back out r108131 (of TailDuplication.cpp) for now, it causes a buildbot failure 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108135 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 11:32:39 +00:00
Gabor Greif
fc41f90817 cache dereferenced iterators 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108134 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 11:19:24 +00:00
Gabor Greif
625398343e cache dereferenced iterators 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108133 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 10:59:23 +00:00
Gabor Greif
f1b2874c68 cache dereferenced iterators 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108132 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 10:49:54 +00:00
Gabor Greif
a8b9df7bd9 cache dereferenced iterators 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108131 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 10:36:48 +00:00
Duncan Sands
3472766f9e Convert some tab stops into spaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108130 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 08:16:59 +00:00
Chandler Carruth
490b8f5d64 Add parentheses around an || to correct the logic. Also silences a GCC warning 
that was actually useful here.

Chris, please double check that this is the correct interpretation. I was
pretty sure, and ran it by Nick as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108129 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 06:47:05 +00:00
Chris Lattner
a6c04ee4c8 Path::isRootDirectory is unimplemented on Unix and not used, 
remove it, fixing PR6909.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108125 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 04:39:07 +00:00
Rafael Espindola
5a717a3ae7 Convert getLoadStoreRegOpcode to use a switch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108123 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 03:43:04 +00:00
Rafael Espindola
7e1b566322 Convert the last use of getPhysicalRegisterRegClass and remove it. 
AggressiveAntiDepBreaker should not be using getPhysicalRegisterRegClass. An
instruction might be using a register that can only be replaced with one from
a subclass of getPhysicalRegisterRegClass.

With this patch we use getMinimalPhysRegClass. This is correct, but
conservative. We should check the uses of the register and select the
largest register class that can be used in all of them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108122 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 02:55:34 +00:00
Jakob Stoklund Olesen
8b78d4b5bb A basic block that only uses RFP registers still needs the FP_REG_KILL marker. 
This fixes PR7375.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108120 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 02:12:47 +00:00
Rafael Espindola
cbeb3db8fd Don't use getPhysicalRegisterRegClass in PBQP. The existing checks that the 
physical register can be allocated in the class of the virtual are sufficient.

I think that the test for virtual registers is more strict than it needs to be,
it should be possible to coalesce two virtual registers the class of one
is a subclass of the other.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108118 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 01:45:38 +00:00
Chris Lattner
dfd3626b47 fix PR7311 by avoiding breaking casts when a bitcast from scalar->vector 
is involved.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108117 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 01:19:22 +00:00
Chris Lattner
5a30a8574c make the prototypes for CreateMalloc and CreateFree more consistent. Patch 
by Hans Vandierendonck from PR7605


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108116 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 00:57:28 +00:00
Rafael Espindola
0bfd09201e Convert the last getPhysicalRegisterRegClass in VirtRegRewriter.cpp to 
getMinimalPhysRegClass. It was used to produce spills, and it is better to
use the most specific class if possible.

Update getLoadStoreRegOpcode to handle GR32_AD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108115 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 00:52:33 +00:00
Chris Lattner
0a96144aac if jump threading is able to infer interesting values on both 
the LHS and RHS of an and/or instruction, don't multiply add
known predecessor values.  This fixes the crash on testcase
from PR7498


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108114 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 00:47:34 +00:00
Chris Lattner
eae2895120 fix PR7429, a crash turning a load from a string into a float. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108113 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 00:22:51 +00:00
Chris Lattner
1f01109254 improve Path::makeUnique when mkstemp/mktemp are not available 
patch by Lasse Kärkkäinen in PR7404.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108110 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 00:09:55 +00:00
Chris Lattner
7791080151 change machinelicm to use MachineInstr::isSafeToMove. No 
intended functionality change.

The avoidance of hoistiing implicitdef seems wrong though.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108109 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-12 00:00:35 +00:00
Chris Lattner
68feb22ad8 first part of JIT support for address of labels, part of PR7264, 
patch by Yuri!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108107 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 23:07:28 +00:00
Chris Lattner
b162290e39 introduce WinCOFFObjectWriter, patch by Michael Spencer! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108103 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 22:07:02 +00:00
Chris Lattner
eb72dcaef7 introduce WinCOFFStreamer.cpp, patch by Michael Spencer! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108102 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 22:05:00 +00:00
Nick Lewycky
8e82e3bf59 If it's safe to speculatively execute load(alloca) the it's safe to execute 
load(gep(alloca)) where the gep is all-zeros. There's more we could do here but
this is a common case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108101 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 20:36:29 +00:00
Chris Lattner
b4a9631e55 fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108100 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 19:42:53 +00:00
Jakob Stoklund Olesen
600f171486 RISC architectures get their memory operand folding for free. 
The only folding these load/store architectures can do is converting COPY into a
load or store, and the target independent part of foldMemoryOperand already
knows how to do that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108099 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 19:19:13 +00:00
Jakob Stoklund Olesen
a66450d227 Use target independent COPY instructions for the fake fextend and fround 
operations in x87 code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108098 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 18:19:39 +00:00
Jakob Stoklund Olesen
4cae5af54e Remove redundant branch. Thanks, Anton! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108097 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 17:17:35 +00:00
Jakob Stoklund Olesen
aef48d7b36 Remove obsolete README_SSE note. 
We are generating movaps for all XMM register copies, including scalar
floating point values. This is known to be at least as good as movss and movsd
for all known architectures up to and including Nehalem because it avoids a
partial register stall.

The SSEDomainFix pass will switch movaps to movdqa when appropriate (i.e., when
operands come from the integer unit). We don't now that switching movaps to
movapd has any benefit.

The same applies to andps -> pand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108096 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 17:13:42 +00:00
Jakob Stoklund Olesen
744b3a5acd Remove TargetInstrInfo::copyRegToReg entirely. 
Targets must now implement TargetInstrInfo::copyPhysReg instead. There is no
longer a default implementation forwarding to copyRegToReg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108095 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 17:01:17 +00:00
Rafael Espindola
d6d7abaf4e Make getPhysicalRegisterRegClass non-virtual. Should be able to remove it soon. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108094 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 16:49:10 +00:00
Rafael Espindola
db77609991 Convert uses of getPhysicalRegisterRegClass in VirtRegRewriter.cpp. 
The first one was used just to call isSafeToMoveRegClassDefs. In
general, using a more specific reg class is better, in practice only
x86 implements that method and the results are always the same.

The second one is in FindFreeRegister and is used to check if a register
is in a register class, a much more direct call to contains is better as
it should cover more cases and is faster.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108093 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 16:45:17 +00:00
Jakob Stoklund Olesen
f7d55b97f0 Replace copyRegToReg with copyPhysReg for SystemZ. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108092 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 16:40:46 +00:00
Jakob Stoklund Olesen
75be45cb2e Avoid SSE instructions in FastIsel when it is not available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108091 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 16:22:13 +00:00
Chandler Carruth
c5080ba0c8 Remove two other uses of ATTRIBUTE_UNUSED for variables only used within 
assert()s, switching to void-casts. Removed an unneeded Compiler.h include as
a result. There are two other uses in LLVM, but they're not due to assert()s,
so I've left them alone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108088 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 08:18:12 +00:00
Jakob Stoklund Olesen
a98625cdad Replace copyRegToReg with copyPhysReg for XCore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108087 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 07:56:13 +00:00
Jakob Stoklund Olesen
8e18a1a5cf Replace copyRegToReg with copyPhysReg for Sparc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108086 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 07:56:09 +00:00
Jakob Stoklund Olesen
377b7b7ca3 Replace copyRegToReg with copyPhysReg for CellSPU. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108084 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 07:31:03 +00:00
Jakob Stoklund Olesen
27689b0aff Replace copyRegToReg with copyPhysReg for PowerPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108083 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 07:31:00 +00:00
Jakob Stoklund Olesen
26a99d17de Fix PIC16 comments referencing copyRegToReg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108082 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 07:30:57 +00:00
Jakob Stoklund Olesen
d86adf3d6e Replace copyRegToReg with copyPhysReg for PIC16. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108081 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 06:53:33 +00:00
Jakob Stoklund Olesen
41ce3cfd1b Replace copyRegToReg with copyPhysReg for MSP430. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108080 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 06:53:30 +00:00
Jakob Stoklund Olesen
e6afcf8da2 Replace copyRegToReg with copyPhysReg for MBlaze. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108079 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 06:53:27 +00:00
Jakob Stoklund Olesen
ac27366700 Replace copyRegToReg with copyPhysReg for ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108078 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 06:33:54 +00:00
Jakob Stoklund Olesen
629d80742a Replace copyRegToReg with copyPhysReg for Blackfin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108077 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 05:44:34 +00:00
Jakob Stoklund Olesen
4ea8771535 X86InstrInfo::copyRegToReg is dead. Long live copyPhysReg! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108076 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 05:44:30 +00:00
Jakob Stoklund Olesen
1ba318982e Use COPY in X86FastISel::X86SelectRet. 
Don't try a cross-class copy. That is very unlikely anywy since return value
registers are usually register class friendly. (%EAX, %XMM0, etc).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108074 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 05:17:02 +00:00
Jakob Stoklund Olesen
e7917bb207 Use COPY for fast-isel bitconvert, but don't create cross-class copies. 
This doesn't change the behavior of SelectBitcast for X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108073 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 05:16:54 +00:00
Rafael Espindola
cbeeae23c3 Fix va_arg for doubles. With this patch VAARG nodes always contain the 
correct alignment information, which simplifies ExpandRes_VAARG a bit.

The patch introduces a new alignment information to TargetLoweringInfo. This is
needed since the two natural candidates cannot be used:

* The 's' in target data: If this is set to the minimal alignment of any
  argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for
  example.
* The getTransientStackAlignment method. It is possible for an architecture to
  have argument less aligned than what we maintain the stack pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108072 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 04:01:49 +00:00
Jakob Stoklund Olesen
e797e0c864 Use COPY for extracting ImplicitDef'ed values from fast-isel instructions. 
This assumes that the registers can be copied which is probably a safe
assumption.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108070 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 03:31:05 +00:00
Jakob Stoklund Olesen
5127f79913 Use COPY in FastISel everywhere it is safe and trivial. 
The remaining copyRegToReg calls actually check the return value (shock!), so we
cannot trivially replace them with COPY instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108069 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 03:31:00 +00:00
Jakob Stoklund Olesen
273c14f530 Replace copyRegToReg with copyPhysReg for Mips. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108066 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 01:08:31 +00:00
Jakob Stoklund Olesen
99666a3429 Replace copyRegToReg with copyPhysReg for Alpha. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108065 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-11 01:08:23 +00:00
Jakob Stoklund Olesen
3ecf1f0179 Use COPY in targets 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108063 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-10 22:43:03 +00:00
Jakob Stoklund Olesen
1e1098c6f3 Replace copyRegToReg with COPY everywhere in lib/CodeGen except for FastISel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108062 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-10 22:42:59 +00:00
Jakob Stoklund Olesen
c0075cce7c Only collect subreg extracting copies for later coalescing. 
This also avoids fatal copies from physregs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108061 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-07-10 22:42:53 +00:00