Daniel Dunbar
34ccf037fe
Add raw_null_ostream and llvm::nulls(), a raw_ostream that discards output.
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- No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76103 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 21:17:53 +00:00
Jeffrey Yasskin
32360a7e21
Add line numbers to OProfile. To do this, I added a processDebugLoc()
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call to the MachineCodeEmitter interface and made copying the start
line of a function not conditional on whether we're emitting Dwarf
debug information. I'll propagate the processDebugLoc() calls to the
non-X86 targets in a followup patch.
In the long run, it'll probably be better to gather this information
through the DwarfWriter, but the DwarfWriter currently depends on the
AsmPrinter and TargetAsmInfo, and fixing that would be out of the way
for this patch.
There's a bug in OProfile 0.9.4 that makes it ignore line numbers for
addresses above 4G, and a patch fixing it at
http://thread.gmane.org/gmane.linux.oprofile/7634
Sample output:
$ sudo opcontrol --reset; sudo opcontrol --start-daemon; sudo opcontrol --start; `pwd`/Debug/bin/lli fib.bc; sudo opcontrol --stop
Signalling daemon... done
Profiler running.
fib(40) == 165580141
Stopping profiling.
$ opreport -g -d -l `pwd`/Debug/bin/lli|head -60
Overflow stats not available
CPU: Core 2, speed 1998 MHz (estimated)
Counted CPU_CLK_UNHALTED events (Clock cycles when not halted) with a unit mask of 0x00 (Unhalted core cycles) count 100000
vma samples % linenr info image name symbol name
00007f67a30370b0 25489 61.2554 fib.c:24 10946.jo fib_left
00007f67a30370b0 1634 6.4106 fib.c:24
00007f67a30370b1 83 0.3256 fib.c:24
00007f67a30370b9 1997 7.8348 fib.c:24
00007f67a30370c6 2080 8.1604 fib.c:27
00007f67a30370c8 988 3.8762 fib.c:27
00007f67a30370cd 1315 5.1591 fib.c:27
00007f67a30370cf 251 0.9847 fib.c:27
00007f67a30370d3 1191 4.6726 fib.c:27
00007f67a30370d6 975 3.8252 fib.c:27
00007f67a30370db 1010 3.9625 fib.c:27
00007f67a30370dd 242 0.9494 fib.c:27
00007f67a30370e1 2782 10.9145 fib.c:28
00007f67a30370e5 3768 14.7828 fib.c:28
00007f67a30370eb 615 2.4128 (no location information)
00007f67a30370f3 6558 25.7287 (no location information)
00007f67a3037100 15603 37.4973 fib.c:29 10946.jo fib_right
00007f67a3037100 1646 10.5493 fib.c:29
00007f67a3037101 45 0.2884 fib.c:29
00007f67a3037109 2372 15.2022 fib.c:29
00007f67a3037116 2234 14.3178 fib.c:32
00007f67a3037118 612 3.9223 fib.c:32
00007f67a303711d 622 3.9864 fib.c:32
00007f67a303711f 385 2.4675 fib.c:32
00007f67a3037123 404 2.5892 fib.c:32
00007f67a3037126 634 4.0633 fib.c:32
00007f67a303712b 870 5.5759 fib.c:32
00007f67a303712d 62 0.3974 fib.c:32
00007f67a3037131 1848 11.8439 fib.c:33
00007f67a3037135 2840 18.2016 fib.c:33
00007f67a303713a 1 0.0064 fib.c:33
00007f67a303713b 1023 6.5564 (no location information)
00007f67a3037143 5 0.0320 (no location information)
000000000080c1e4 15 0.0360 MachineOperand.h:150 lli llvm::MachineOperand::isReg() const
000000000080c1e4 6 40.0000 MachineOperand.h:150
000000000080c1ec 2 13.3333 MachineOperand.h:150
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76102 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 21:07:26 +00:00
Jakob Stoklund Olesen
57e599a46b
Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands.
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The inline asm operands must be parsed from the first flag, you cannot assume
that an immediate operand preceeding a register use operand is the flag.
PowerPC "m" operands are represented as (flag, imm, reg) triples.
isRegTiedToDefOperand() would incorrectly interpret the imm as the flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76101 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 20:58:34 +00:00
Evan Cheng
5f15992b77
Changed my mind. We now allow remat of instructions whose defs have subreg indices.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76100 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 20:15:00 +00:00
Owen Anderson
914e50c841
Privatize the ConstantFP table. I'm on a roll!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76097 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 19:05:41 +00:00
Evan Cheng
2b48ab947c
With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76094 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 18:44:05 +00:00
Ted Kremenek
da24fe265a
Update CMake file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76093 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 18:29:22 +00:00
Owen Anderson
001dbfebcb
Move the ConstantInt uniquing table into LLVMContextImpl. This exposed a number of issues in
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our current context-passing stuff, which is also fixed here
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76089 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 18:04:31 +00:00
Kevin Enderby
f96db468fc
Removed the SubsectionsViaSymbols MCStreamer API and replaced it with a generic
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EmitAssemblerFlag API which takes a value from the added AssemblerFlag
enumerated constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76087 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 17:56:39 +00:00
Dan Gohman
850f791abc
Fill in some holes in ScalarEvolution's loop iteration condition
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analysis. This allows indvars to emit a simpler loop trip count
expression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76085 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 17:34:36 +00:00
Dan Gohman
9377386493
Add an isLoopSimplifyForm() predicate, following the example of
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isLCSSAForm(), to test whether a loop is in the form guaranteed
by the LoopSimplify pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76077 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 16:16:23 +00:00
Dan Gohman
ad60f660c6
Use size_t.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76069 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 15:24:40 +00:00
Anton Korobeynikov
7df8462038
Unbreak
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76064 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:36:52 +00:00
Anton Korobeynikov
c975180624
Temporary disable 16 bit bswap
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76063 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:35:57 +00:00
Anton Korobeynikov
6d4b270e38
Add instruction formats and few opcodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76062 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:35:20 +00:00
Anton Korobeynikov
6ff3f2c710
Add bswap patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76061 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:34:52 +00:00
Anton Korobeynikov
21ddf779bf
Provide crazy pseudos for regpairs spills / reloads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76060 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:34:15 +00:00
Anton Korobeynikov
9de2848fac
Handle long-disp stuff more consistently
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76059 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:33:52 +00:00
Anton Korobeynikov
74e2dc446c
All FP instructions have 12 bit memory displacement field
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76058 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:33:27 +00:00
Anton Korobeynikov
f1106c4247
Another predicate routine
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76057 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:33:01 +00:00
Anton Korobeynikov
27bf677e59
More helpers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76056 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:32:41 +00:00
Anton Korobeynikov
ae46db85a9
Add bunch of branch folding stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76055 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:32:19 +00:00
Anton Korobeynikov
27766b548f
Add missed opcodes to short => long displacement conversion
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76054 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:31:52 +00:00
Anton Korobeynikov
c3e48b06fb
Cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76053 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:31:32 +00:00
Anton Korobeynikov
54681eca69
Fix logic inversion for RI-mode address selection
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76052 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:31:14 +00:00
Anton Korobeynikov
bb8a04806d
Expand 32-bit bitconverts via memory
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76050 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:30:29 +00:00
Anton Korobeynikov
f2fd8ea1c9
Fix incomin arg stack frame offset in case we need to generate stack frame
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76049 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:29:57 +00:00
Anton Korobeynikov
8b75813687
Fix instruction mnemonics for some fp_to_sint operations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76048 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:29:26 +00:00
Anton Korobeynikov
c1a1e4adb7
i32 values are passed extended also on stack. Handle this in generic way
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76047 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:29:05 +00:00
Anton Korobeynikov
159ac63ba1
We definitely have 1-0 bools
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76046 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:28:46 +00:00
Anton Korobeynikov
5dd38de2c2
Revert the commit, it just hides the real bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76045 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:28:26 +00:00
Anton Korobeynikov
361a78756b
Out GR128 regclass is not a 'real' i128 one.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76044 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:27:53 +00:00
Anton Korobeynikov
628d419520
Add missed condbranch opcodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76043 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:27:26 +00:00
Anton Korobeynikov
05a0b8bc66
Handle bitconverts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76042 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:27:01 +00:00
Anton Korobeynikov
b6831cb044
Unbreak mvi and friends - emit only 'significant' part of the operand
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76041 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:26:38 +00:00
Anton Korobeynikov
98db78a28b
Expand fp_to_uint too
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76040 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:26:06 +00:00
Anton Korobeynikov
20d062fcc1
We don't have FP truncstores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76039 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:25:46 +00:00
Anton Korobeynikov
a89430e468
Expand uint_to_fp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76038 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:25:30 +00:00
Anton Korobeynikov
4971e1ebb7
Emit proper rounding mode for fp_to_sint
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76037 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:25:12 +00:00
Anton Korobeynikov
3a9959fd4e
f32/f64 regs are stored on stack if we're short in FP regs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76036 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:24:57 +00:00
Anton Korobeynikov
75eef89ddb
Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76035 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:24:41 +00:00
Anton Korobeynikov
1ada84daaf
Make FP zero to be legal FP immediate via LOAD ZERO
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76034 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:24:16 +00:00
Anton Korobeynikov
5753f47f5b
Loads are not two-address in any way
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76033 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:24:01 +00:00
Anton Korobeynikov
a61a4f669b
Add LOAD NEGATIVE instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76032 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:23:44 +00:00
Anton Korobeynikov
03f60001df
LOAD COMPLEMENT instruction is not really two-addr
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76031 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:23:30 +00:00
Anton Korobeynikov
6495063386
Add multiple add/sub instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76030 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:23:16 +00:00
Anton Korobeynikov
1733124507
Handle FP callee-saved regs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76029 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:23:01 +00:00
Anton Korobeynikov
85c5c3f138
Proper FP extloads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76028 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:22:46 +00:00
Anton Korobeynikov
299dc78d67
Add proper PWS impdef's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76027 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:22:30 +00:00
Anton Korobeynikov
da723d7d91
Propagate FP select_cc to dag inserters
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76026 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:22:15 +00:00
Anton Korobeynikov
55e96fb1c6
Implement fp_to_sint
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76025 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:21:57 +00:00
Anton Korobeynikov
92ac82abb4
Implement FP regs spills / restores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76024 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:21:41 +00:00
Anton Korobeynikov
c79465df08
Add fabs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76023 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:21:27 +00:00
Anton Korobeynikov
f1e82ce480
Add fneg
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:21:12 +00:00
Anton Korobeynikov
9b4ae577ce
We don't have native sine / cosine instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76021 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:20:56 +00:00
Anton Korobeynikov
1d0ec0b4fc
More sint_to_fp stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76020 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:20:39 +00:00
Anton Korobeynikov
7aa03ac827
Add bunch of FP instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76019 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:20:24 +00:00
Anton Korobeynikov
23eff5c75a
We don't have any FP extloads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76018 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:20:08 +00:00
Anton Korobeynikov
10c086cd77
Implement all comparisons
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76017 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:19:54 +00:00
Anton Korobeynikov
ae53567de1
Add constpool lowering / printing
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76016 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:19:35 +00:00
Anton Korobeynikov
0e31d5cf80
Allow FP arguments pass / return
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76015 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:19:16 +00:00
Anton Korobeynikov
2c97ae8826
Register FP regclasses
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76014 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:19:02 +00:00
Anton Korobeynikov
b13057bafa
Add FP regs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76013 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:18:48 +00:00
Anton Korobeynikov
81d533c76a
Fix fallout from prev. patch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76012 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:18:31 +00:00
Anton Korobeynikov
8bd0db7615
Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76011 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:18:17 +00:00
Anton Korobeynikov
09e39001da
Use divide single for 32 bit signed divides
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76010 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:17:52 +00:00
Anton Korobeynikov
cd3dfafef1
Add missed operands types
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76009 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:17:07 +00:00
Anton Korobeynikov
e1c9aabd77
Missed part of prev. patch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76008 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:16:45 +00:00
Anton Korobeynikov
9b812b0131
Another attempt to fix prologue emission
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76007 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:16:26 +00:00
Anton Korobeynikov
6fe326c713
Implement 'large' PIC model
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:16:05 +00:00
Anton Korobeynikov
48e8b3cc58
Implement shifts properly (hopefilly - finally!)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76005 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:15:24 +00:00
Anton Korobeynikov
e3a7f7a2b2
Remove redundand register move
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76004 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:14:54 +00:00
Anton Korobeynikov
0a42d2b437
Properly handle divides. As a bonus - implement memory versions of them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76003 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:14:33 +00:00
Anton Korobeynikov
d20af96f5b
Fix epic fail: full-width muls are not commutable. This unbreaks bunch of stuff from SingleSource/Benchmarks/Stanford
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76002 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:14:01 +00:00
Anton Korobeynikov
c097d5cc74
32 bit rotate is not twoaddr instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76001 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:13:43 +00:00
Anton Korobeynikov
014d4639d8
32 bit shifts have only 12 bit displacements
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76000 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:13:24 +00:00
Anton Korobeynikov
54cea741ca
Add proper register aliases
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75999 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:12:54 +00:00
Anton Korobeynikov
c3a5196133
Properly generate stack frame
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75998 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:12:36 +00:00
Anton Korobeynikov
0ba60d9658
Unbreak indirect branches
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75997 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:12:18 +00:00
Anton Korobeynikov
78085ee80c
Unbreak
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:12:00 +00:00
Anton Korobeynikov
66f1b378bc
Do not forget to save R15 when we allocate stack frame
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75995 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:11:40 +00:00
Anton Korobeynikov
c94fdf76dd
All calls clobbers R14
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75994 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:11:22 +00:00
Anton Korobeynikov
6f66f0556c
Unbreak calls to vararg functions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75993 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:11:03 +00:00
Anton Korobeynikov
2bbbd5bc59
Stupid typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75992 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:10:49 +00:00
Anton Korobeynikov
4656760d9c
Typos
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:10:35 +00:00
Anton Korobeynikov
1ed1e3ecd4
Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75990 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:10:17 +00:00
Anton Korobeynikov
5a11e02fbd
Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements are needed during elimination of frame indexes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75989 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:09:56 +00:00
Anton Korobeynikov
720e3b00b8
Add support for 12 bit displacements
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:09:35 +00:00
Anton Korobeynikov
078e007c07
We already have reserved call frame regardless whether variable sized frame objects were present or not
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75987 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:09:04 +00:00
Anton Korobeynikov
980d5503c3
Emit proper lowering of load from arg stack slot
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:08:42 +00:00
Anton Korobeynikov
c772c4408e
Implement dynamic allocas
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75985 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:08:15 +00:00
Anton Korobeynikov
c16cdc5de7
Add jump tables
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75984 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:07:50 +00:00
Anton Korobeynikov
983d3a1ee5
Exapnd br_jt into indirect branch. Provide pattern for indirect branches.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75983 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:07:24 +00:00
Anton Korobeynikov
57b04e6fa7
Implement 64 bit immediates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75982 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:07:06 +00:00
Anton Korobeynikov
759205d1ac
Add rotates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75981 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:06:49 +00:00
Anton Korobeynikov
cfca8b1f62
Add patterns for integer negate
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75980 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:06:27 +00:00
Anton Korobeynikov
8c993e1632
Provide proper patterns for and with imm instructions. Tune the tests accordingly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:06:00 +00:00
Anton Korobeynikov
25af73303f
Add 32 bit and reg-imm and disable invalid patterns for now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75978 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:05:32 +00:00
Anton Korobeynikov
747052c1a5
Add z9 and z10 target processors. Mark z10-only instructions as such.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75977 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:05:00 +00:00
Anton Korobeynikov
71fd2600f4
Fix MUL64rm instruction asmprinting
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75976 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:04:38 +00:00