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1152 Commits

Author SHA1 Message Date
Chris Lattner
7b6e53cde7 convert the rest of this over to use SwitchSection 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24448 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-21 07:16:34 +00:00
Chris Lattner
224cfc2eac Start using the AsmPrinter shared SwitchSection code. This allows the X86 
backend to implement global variables in sections.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24447 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-21 07:11:11 +00:00
Chris Lattner
62cbf2aab9 Rename SwitchSection -> switchSection to avoid conflicting with a future 
change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24443 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-21 06:55:27 +00:00
Chris Lattner
c41cc83117 Naturally align doubles in the constant pool, set PrivateGlobalPrefix on 
darwin, use it when printing the constant pool indices so the labels are
appropriately private, emit cp entries to .const instead of .data on darwin
and only emit a single .section for the constant pool, not one for each
entry.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24440 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-21 06:46:22 +00:00
Chris Lattner
81f803df80 Lower READCYCLECOUNTER correctly, preserving the chain result 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24438 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-20 22:57:19 +00:00
Chris Lattner
441b223c9b encode rdtsc correctly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24435 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-20 22:13:18 +00:00
Chris Lattner
81363c3871 use chain operands to ensure the copies don't wander from the rdtsc instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24434 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-20 22:01:40 +00:00
Andrew Lenharth
b873ff322c The second patch of X86 support for read cycle counter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24430 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-20 21:41:10 +00:00
Chris Lattner
6adaf79ad7 Teach the x86 backend about the register constraints of its addressing mode. 
Patch by Evan Cheng


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24423 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-19 07:01:30 +00:00
Chris Lattner
f9ce9fb49b Add load and other support to the dag-dag isel. Patch contributed by Evan 
Cheng!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24419 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-19 02:11:08 +00:00
Chris Lattner
f124d5e500 add more patterns, patch by Evan Cheng. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24406 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-18 01:04:42 +00:00
Chris Lattner
78432feff8 Add patterns for some 16-bit immediate instructions, patch contributed by 
Evan Cheng.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24384 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-17 02:01:55 +00:00
Chris Lattner
7a12537843 Add patterns for several simple instructions that take i32 immediates. 
Patch contributed by Evan Cheng!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24382 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-16 22:59:19 +00:00
Chris Lattner
c961eea6cb initial step at adding a dag-to-dag isel for X86 backend. Patch contributed 
by Evan Cheng!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24371 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-16 01:54:32 +00:00
Chris Lattner
dbdbf0ce2e Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch 
contributed by Evan Cheng.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24358 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-15 00:40:23 +00:00
Chris Lattner
ce8eb0c16b Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24233 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-08 02:11:51 +00:00
Chris Lattner
ffff6175ef add a note that Nate mentioned last week 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23898 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-23 21:44:59 +00:00
Chris Lattner
1171ff4fd7 Put some of my random notes somewhere public 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23897 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-23 19:52:42 +00:00
Nate Begeman
405e3ecb56 Invert the TargetLowering flag that controls divide by consant expansion. 
Add a new flag to TargetLowering indicating if the target has really cheap
  signed division by powers of two, make ppc use it.  This will probably go
  away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23853 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 00:02:42 +00:00
Nate Begeman
34f342e36f Remove some dead code now that the dag combiner exists. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23754 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-15 22:08:02 +00:00
Nate Begeman
14e2cf62f4 Properly split f32 and f64 into separate register classes for scalar sse fp 
fixing a bunch of nasty hackery


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23735 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 22:06:00 +00:00
Chris Lattner
3cf8760dc5 silence some warnings 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23594 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-02 16:29:36 +00:00
Chris Lattner
56bcae0de9 simplify this code using the new regclass info passed in 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23557 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 17:12:38 +00:00
Chris Lattner
97d5e6461a Pass extra regclasses into spilling code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23537 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 01:29:42 +00:00
Chris Lattner
3e2bafd640 Add FP versions of the binary operators, keeping the int and fp worlds seperate. 
Though I have done extensive testing, it is possible that this will break
things in configs I can't test.  Please let me know if this causes a problem
and I'll fix it ASAP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23505 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 22:29:17 +00:00
Chris Lattner
a92aab74dd Implement the isLoadFromStackSlot interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23387 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-19 05:23:44 +00:00
Chris Lattner
43ef1318c6 give all operands names 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23356 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-14 21:10:24 +00:00
Chris Lattner
3452d23c34 fix a major regression from my patch this afternoon 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23347 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-14 06:06:45 +00:00
Chris Lattner
82da52299c This code is no longer needed, it is moved to the target-indep code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23332 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-13 19:31:44 +00:00
Chris Lattner
fb8b8a75ff Handle any_extend like zext 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23202 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-02 00:16:09 +00:00
Jim Laskey
b1e1180ca0 1. Use SubtargetFeatures in llc/lli. 
2. Propagate feature "string" to all targets.

3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23192 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-01 21:38:21 +00:00
Reid Spencer
dd22dc85ea Adjust to member variable name change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23119 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-27 19:09:48 +00:00
Chris Lattner
143b675393 Fix a bug in my previous checkin 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23082 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-26 17:18:44 +00:00
Chris Lattner
5839bf2b3b Change ConstantPoolSDNode to actually hold the Constant itself instead of 
putting it into the constant pool.  This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23081 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-26 17:15:30 +00:00
Chris Lattner
7cad4f2089 Fix a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23031 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-25 00:05:15 +00:00
Chris Lattner
d177579860 Adjust to new livevars interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22991 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-23 23:41:14 +00:00
Chris Lattner
76eb08bcda Simplify this code by using LiveVariables::KillsRegister 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22988 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-23 22:49:55 +00:00
Chris Lattner
ecbce617ca Split RegisterClass 'Methods' into MethodProtos and MethodBodies 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22929 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 19:13:20 +00:00
Chris Lattner
03ba7b9f25 Put register classes into namespaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22925 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:51:57 +00:00
Chris Lattner
2505d6b727 The simple isel being gone makes this dead! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22914 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:32:03 +00:00
Chris Lattner
9d9dc816d0 add a few missing cases 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22891 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:41:29 +00:00
Chris Lattner
b822abade7 Give ADJCALLSTACKDOWN/UP the correct operands. 
Give a whole bunch of other stuff variable operands, particularly FP.  The
FP stackifier is playing fast and loose with operands here, so we have to
mark them all as variable.  This will have to be fixed before we can dag->dag
the X86 backend.  The solution is for the pre-stackifier and post-stackifier
instructions to all be disjoint.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22890 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:38:22 +00:00
Chris Lattner
679c408768 The variable SAR's only take one operand too 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22888 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:31:37 +00:00
Chris Lattner
fd444b2a69 Stop adding bogus operands to variable shifts on X86. These instructions 
only take one operand.  The other comes implicitly in through CL.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22887 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:16:17 +00:00
Nate Begeman
73bfa71524 Remove the X86 and PowerPC Simple instruction selectors; their time has 
passed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22886 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 23:53:15 +00:00
Chris Lattner
707ebc5dd6 update the backends to work with the new CopyFromReg/CopyToReg/ImplicitDef nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22807 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-16 21:56:37 +00:00
Nate Begeman
7cbd525ba8 Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty 
fixme from the PowerPC backend.  Emit slightly better code for legalizing
select_cc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22805 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-16 19:49:35 +00:00
Nate Begeman
889f2c1acf Fix last night's X86 regressions by putting code for SSE in the if(SSE) 
block.  nur.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22788 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-14 18:37:02 +00:00
Nate Begeman
875f360e22 Fix FP_TO_UINT with Scalar SSE2 now that the legalizer can handle it. We 
now generate the relatively good code sequences:
unsigned short foo(float a) { return a; }
_foo:
        movss 4(%esp), %xmm0
        cvttss2si %xmm0, %eax
        movzwl %ax, %eax
        ret

and
unsigned bar(float a) { return a; }
_bar:
        movss .CPI_bar_0, %xmm0
        movss 4(%esp), %xmm1
        movapd %xmm1, %xmm2
        subss %xmm0, %xmm2
        cvttss2si %xmm2, %eax
        xorl $-2147483648, %eax
        cvttss2si %xmm1, %ecx
        ucomiss %xmm0, %xmm1
        cmovb %ecx, %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22786 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-14 04:36:51 +00:00
Chris Lattner
88ac32ca26 Update the targets to the new SETCC/CondCodeSDNode interfaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22729 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-09 20:21:10 +00:00