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30da5380e0
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29909 Commits

Author SHA1 Message Date
Anton Korobeynikov
30da5380e0 [PATCH 023/155] Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75932 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:45:22 +00:00
Anton Korobeynikov
961bb6f430 Add stores and truncstores 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75931 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:45:00 +00:00
Anton Korobeynikov
dc28955b3f Add patterns for various extloads 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75930 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:44:30 +00:00
Anton Korobeynikov
3360da9772 Do some heroic rri address matching (shamelessly stolen from x86 backend). Not tested though. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75929 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:44:00 +00:00
Anton Korobeynikov
4cad7d29fc Change register allocation order, so R0 will be allocated the last among scratch. This will make address-calculation code much more happy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75928 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:43:40 +00:00
Anton Korobeynikov
9e4816e09f Add shifts and reg-imm address matching 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75927 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:43:18 +00:00
Anton Korobeynikov
a51752cbea Add bunch of 32-bit patterns... Uffff :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75926 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:42:31 +00:00
Anton Korobeynikov
0692fabb4e Propagate return result extension type 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75925 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:35:48 +00:00
Anton Korobeynikov
e0167c1d5a Add 32 bit subregs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75923 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:35:30 +00:00
Anton Korobeynikov
9342d3180a Add another bunch of reg-imm patterns for add/or/and/xor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75922 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:35:08 +00:00
Anton Korobeynikov
da308c9a67 Add bunch of reg-imm movs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75921 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:34:50 +00:00
Anton Korobeynikov
fc9ceeaad8 Proper match halfword-imm operands for mov and add 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75920 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:34:24 +00:00
Anton Korobeynikov
89edcd0927 Provide masked reg-imm 'or' and 'and' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75919 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:33:57 +00:00
Anton Korobeynikov
e6220fb230 Add reg-reg and pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75917 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:32:49 +00:00
Anton Korobeynikov
bdc9081693 Add sub reg-reg pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75916 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:32:16 +00:00
Anton Korobeynikov
b573f99ab7 Add xor reg-reg pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75915 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:31:28 +00:00
Anton Korobeynikov
26ba0b1ec5 Add or reg-reg pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75914 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:30:53 +00:00
Anton Korobeynikov
0676d2887a Add add reg-reg and reg-imm patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75913 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:30:15 +00:00
Anton Korobeynikov
1cc9dc7267 Add simple reg-reg and reg-imm moves 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75912 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:29:38 +00:00
Anton Korobeynikov
87a24e3ee4 Minimal lowering for formal_arguments / ret 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75911 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:28:59 +00:00
Anton Korobeynikov
4403b930f8 Let's start another backend :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75909 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:27:25 +00:00
Richard Osborne
db9e697725 Combine an unaligned store of unaligned load into a memmove. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75908 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 12:50:48 +00:00
Richard Osborne
787e90f862 Lower the threshold at which memcpy / memmove / memset stop being expanded 
inline in the XCore.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75906 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 12:41:34 +00:00
Richard Osborne
ff4149b903 Fix typo in last commit on expansion of unaligned loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75903 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 10:48:47 +00:00
Richard Osborne
ccb7e96ef0 Expand unaligned 32 bit loads from an address which is a constant 
offset from a 32 bit aligned base as follows:

  ldw low, base[offset >> 2]
  ldw high, base[(offset >> 2) + 1]
  shr low_shifted, low, (offset & 0x3) * 8
  shl high_shifted, high, 32 - (offset & 0x3) * 8
  or result, low_shifted, high_shifted

Expand 32 bit loads / stores with 16 bit alignment into two 16 bit
loads / stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75902 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 10:42:35 +00:00
Richard Osborne
7f47ce9662 Custom lower unaligned 32 bit stores and loads into libcalls. This is 
a big code size win since before they were expanding to upto 16
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75901 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 10:21:18 +00:00
Evan Cheng
378445303b Let callers decide the sub-register index on the def operand of rematerialized instructions. 
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75900 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 09:20:10 +00:00
Chris Lattner
6ef40b11f8 use SUBREG_TO_REG instead of INSERT_SUBREG, this way the code 
generator can know the top bits are zero, not undefined.
Thanks to Dan for pointing this out.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75899 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 06:31:37 +00:00
Bruno Cardoso Lopes
115934eb57 Fix coding style issues pointed by Bill. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75898 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 06:26:41 +00:00
Chris Lattner
90bb3f3706 add a knob to turn off PrettyStackTrace globally. Patch by Zoltan 
Varga!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75897 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 06:17:45 +00:00
Chris Lattner
8e25e2d801 implement .include in the lexer/parser instead of passing it into the streamer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75896 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 06:14:39 +00:00
Chris Lattner
c2b443a698 fix some casts that I improperly refactored, patch by Artur Pietrek! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75894 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 04:34:33 +00:00
Daniel Dunbar
1da8be226a Remove unused header. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75893 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 04:01:35 +00:00
Daniel Dunbar
1d92921691 Switch llc and createJIT to use simpler command line parsing for -march. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75890 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 02:23:53 +00:00
Daniel Dunbar
603bea3274 Add registered target list to --version output. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75889 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 02:06:09 +00:00
Daniel Dunbar
64cc972123 Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLink 
variables.
 - Module initialization functions supplanted the need for these.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75886 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 01:55:13 +00:00
Chris Lattner
fe2fe7094e fix section switching to ensure that stubs are emitted to the right 
section on ppc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75881 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 01:23:26 +00:00
Devang Patel
53cb17dfbc Skip special LLVM prefix '1' while emitting linknage name. 
This prefix is used by LLVM to inform the asm printer to not emit usual global symbol prefix before the symbol name.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75875 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 01:01:22 +00:00
Owen Anderson
6687990ca8 Now that we have contexts on types, convert some more internals to use contexts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75866 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 00:03:07 +00:00
Daniel Dunbar
36129dba4f We don't need to use llvm_report_error, this interface can deal with errors 
(although we don't get a very good error message).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75864 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-15 23:54:01 +00:00
Owen Anderson
50dead06ff Revert yesterday's change by removing the LLVMContext parameter to AllocaInst and MallocInst. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75863 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-15 23:53:25 +00:00
Daniel Dunbar
6d823cd39d Add missing includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75862 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-15 23:48:37 +00:00
Jakob Stoklund Olesen
f7d3e696a5 Verify that there is no kill flag on tied operands on two-address instructions. 
This extra check is not trigged when runnning "make check" on top-of-tree.

Change error message to better match llvm_unreachable() grammar.

Don't call llvm_unreachable() when writing error messages to a file, but keep going.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75860 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-15 23:37:26 +00:00
Daniel Dunbar
5d77cad60b Lift addAssemblyEmitter into LLVMTargetMachine. 
- No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75859 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-15 23:34:19 +00:00
Dan Gohman
e87b2abe91 Change raw_ostream so that it doesn't call llvm_report_error 
immediately on every output error. Instead, add a flag to
raw_ostream, and set the flag whenever an error is detected.

The flag can be queried and cleared from the public API. This
gives applications more flexibility to handling errors in
application-specific ways.

If the flag is not cleared when the raw_ostream is destructed,
llvm_report_error is called from the destructor. This ensures
that errors are not implicitly silenced, and provides
convenient default behavior for tools like llc and opt.
Clients wishing to avoid llvm_report_error calls from
raw_ostream should check for errors and clear the error flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75857 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-15 23:25:33 +00:00
Daniel Dunbar
1e1f8ba28c Register AsmPrinter for XCore, MSP430, and PIC16 targets. 
- Switch to standard addAssemblyEmitter logic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75854 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-15 23:17:20 +00:00
Eli Friedman
0c77db32dd Switch invars away from using isTrapping when it really shouldn't be 
using it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75852 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-15 22:48:29 +00:00
Daniel Dunbar
cfe9a605ee Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine. 
- No intended functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75848 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-15 22:33:19 +00:00
Jakob Stoklund Olesen
72fbc3d9d2 Fix bug in RegScavenger::scavengeRegister(). 
Reserved registers are not candidates for scavenging, and they were removed
from the candidate list like this:

CreateRegClassMask(RC, Candidates);
Candidates ^= ReservedRegs;

However, when there are reserved registers outside RC, this causes invalid
bits to be set in Candidates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75847 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-15 22:32:11 +00:00
Eli Friedman
fd2934f190 Don't restrict the set of instructions where we try to constant-fold the 
operands; it's possible to end up with a constant-foldable operand to 
most instructions, even those which can't trap.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75845 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-15 22:13:34 +00:00