Bill Wendling
db5c993121
Match GCC's MMX calling convention.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35523 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-31 01:03:53 +00:00
Chris Lattner
c9addb7488
implement the new addressing mode description hook.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35521 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30 23:15:24 +00:00
Bill Wendling
e2501b303c
Add MMX calling conventions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35489 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30 00:35:22 +00:00
Evan Cheng
87c6c9abb3
New entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35480 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-29 21:40:13 +00:00
Evan Cheng
5e3c203cfd
Can't re-materialize mov r, imm in thumb since mov would clobber the condition code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35479 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-29 21:38:31 +00:00
Jeff Cohen
e2cd2a0b4b
MS C does have inlining after all, just uses _inline instead of inline.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35467 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-29 17:42:21 +00:00
Evan Cheng
616cc663da
Add support for hidden visibility to darwin/arm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35448 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-29 07:49:34 +00:00
Jeff Cohen
ab47895c6b
Fix C Backend to generate code that works with Microsoft C for the benefit of
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front ends that do not depend on the GCC runtime (someday...).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35441 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 23:08:37 +00:00
Bill Wendling
03179060ee
Made this into a bug report: PR1286
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35439 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 19:07:34 +00:00
Anton Korobeynikov
f6e9353e1a
Oops :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35438 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 18:38:33 +00:00
Anton Korobeynikov
33bf8c44dd
Don't allow MatchAddress recurse too much. This trims exponential
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behaviour in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35437 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 18:36:33 +00:00
Chris Lattner
6ef3307062
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35435 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 18:17:19 +00:00
Chris Lattner
995f55036f
Compile CodeGen/X86/lea-3.ll:test2 to:
...
_test3:
leaq (,%rdi,4), %rax
orq %rdi, %rax
ret
instead of:
_test2:
movq %rdi, %rax
shlq $2, %rax
orq %rdi, %rax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35434 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 18:12:31 +00:00
Chris Lattner
e9a61234ce
Dan pointed out that this is done, remove it!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35430 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 17:26:52 +00:00
Scott Michel
6461bbfc50
First test check-in.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35429 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 17:04:43 +00:00
Evan Cheng
caaf69107e
Remove isLegalAddressImmediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35406 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 01:53:55 +00:00
Bill Wendling
a80d7bd665
Remove cruft I put in there...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35394 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 01:02:54 +00:00
Chris Lattner
f2177b89a1
Fix a problem building llvm-gcc on amd64-unknown-freebsd6.2, due to the
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system assembler not groking legal instructions like "leal (,%esi,8), %ecx".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35393 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 00:58:40 +00:00
Bill Wendling
826f36ff80
Unbreak mmx arithmetic. It was barfing trying to do v8i8 arithmetic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35392 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 00:57:11 +00:00
Bill Wendling
6dc29ece6e
Add the "unpack low packed data" instructions. This should be the last of
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the MMX instructions that are needed...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35389 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27 21:20:36 +00:00
Bill Wendling
ccc44add81
Fix so that pandn is emitted instead of an xor/and combo. Add integer
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comparison operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35385 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27 20:22:40 +00:00
Lauro Ramos Venancio
1baa1971a6
"The C standards do say that "char" may either be a "signed char" or "unsigned
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char" and it is up to the compilers implementation or the platform which is
followed."
http://www.arm.linux.org.uk/docs/faqs/signedchar.php
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35382 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27 16:33:08 +00:00
Lauro Ramos Venancio
b8a93a45f8
bugfix: sometimes the spiller puts a load between the "mov lr, pc" and "bx" of a CALL_NOLINK.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35381 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27 16:19:21 +00:00
Evan Cheng
f6fa5ee5c2
findRegisterUseOperand() changed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35366 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26 22:41:48 +00:00
Bill Wendling
ab5b49d92e
Promote to v1i64 type...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35353 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26 08:03:33 +00:00
Bill Wendling
aadcea33d1
Updated.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35352 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26 07:55:58 +00:00
Bill Wendling
eebc8a1bc5
Add support for the v1i64 type. This makes better code for this:
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#include <mmintrin.h>
extern __m64 C;
void baz(__v2si *A, __v2si *B)
{
*A = C;
_mm_empty();
}
We get this:
_baz:
call "L1$pb"
"L1$pb":
popl %eax
movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
movq (%eax), %mm0
movl 4(%esp), %eax
movq %mm0, (%eax)
emms
ret
GCC gives us this:
_baz:
pushl %ebx
call L3
"L00000000001$pb":
L3:
popl %ebx
subl $8, %esp
movl L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
movl (%eax), %edx
movl 4(%eax), %ecx
movl 16(%esp), %eax
movl %edx, (%eax)
movl %ecx, 4(%eax)
emms
addl $8, %esp
popl %ebx
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35351 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26 07:53:08 +00:00
Anton Korobeynikov
4be4e51a50
Fix authorship
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35337 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 13:44:26 +00:00
Chris Lattner
86c9c341e9
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35334 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 05:10:46 +00:00
Chris Lattner
013e051aac
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35330 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 04:46:28 +00:00
Chris Lattner
b6ead97b7e
Fix CodeGen/PowerPC/2007-03-24-cntlzd.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35329 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 04:44:03 +00:00
Chris Lattner
4234f57fa0
switch TargetLowering::getConstraintType to take the entire constraint,
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not just the first letter. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 02:14:49 +00:00
Chris Lattner
1439352ece
Allow the b/h/w/k constraints to be applied to values that have multiple alternatives, and end up not being registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35320 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 02:01:03 +00:00
Chris Lattner
188b9fe834
enforce the proper range for the i386 N constraint.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35319 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 01:57:35 +00:00
Chris Lattner
7cd5e07f3d
Fix test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35318 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 01:44:57 +00:00
Chris Lattner
1a77a556cd
add a bad case evan though of.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35296 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-24 06:01:32 +00:00
Anton Korobeynikov
3b5ee73a13
Autodetect MMX & SSE stuff for AMD processors
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35292 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 23:46:48 +00:00
Bill Wendling
b8440a0c39
PR1260:
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Add final support to get the QT example to compile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35290 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 22:35:46 +00:00
Bill Wendling
02ced83ce7
We generate a shufflevector instruction, so we don't need the builtin
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intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35269 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 20:29:26 +00:00
Bill Wendling
a348c56fde
Support added for shifts and unpacking MMX instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35266 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 18:42:45 +00:00
Dale Johannesen
fa4bce2b76
repair x86 performance, dejagnu problems from previous change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 21:51:52 +00:00
Anton Korobeynikov
3070cd7e80
Add TODO list for MSIL backend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35244 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 21:48:59 +00:00
Anton Korobeynikov
099883f7eb
Let the new backend begin!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35242 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 21:38:25 +00:00
Dale Johannesen
aceaf5d26e
add generation of unnecessary push/pop around calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35241 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 21:16:39 +00:00
Nicolas Geoffray
82d4264c1f
Protect R31's frame offset from being used by callee-saved registers, when R31
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is the frame pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35233 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 16:44:14 +00:00
Evan Cheng
768143547b
Mark re-materializable instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35230 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 00:16:56 +00:00
Evan Cheng
a125cbe839
Updated.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35229 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 22:32:39 +00:00
Dale Johannesen
8e59e163db
do not share old induction variables when this would result in invalid
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instructions (that would have to be split later)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35227 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 21:54:54 +00:00
Lauro Ramos Venancio
64c88d741e
bugfix: When the source register of CALL_NOLINK was LR, the following code was emitted:
...
mov lr, pc
bx lr
So, the function was not called.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35218 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 17:57:23 +00:00
Evan Cheng
c70d1849b7
Make two piece constant generation as a single instruction. It's re-materialized as a load from constantpool.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35207 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:11:30 +00:00
Evan Cheng
5603dcf21e
New entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35206 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:10:17 +00:00
Evan Cheng
bf2c8b3c96
Added MRegisterInfo hook to re-materialize an instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35205 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:09:38 +00:00
Chris Lattner
a16b7cb1d3
Two changes:
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1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
in three-address form.
This gives us asm diffs like:
- leal (,%eax,4), %eax
+ shll $2, %eax
which is faster on some processors and smaller on all of them.
and, more interestingly:
- movl 24(%esi), %eax
- leal (,%eax,4), %edi
+ movl 24(%esi), %edi
+ shll $2, %edi
Without #2 , #1 was a significant pessimization in some cases.
This implements CodeGen/X86/shift-codegen.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35204 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 06:08:29 +00:00
Chris Lattner
1719e13da0
fix indentation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35202 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 02:25:53 +00:00
Dale Johannesen
80dae195c7
fix obvious comment bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35196 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 00:30:56 +00:00
Evan Cheng
9f6636ff0c
Fix naming inconsistencies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:48:02 +00:00
Evan Cheng
fa775d09c6
Special LDR instructions to load from non-pc-relative constantpools. These are
...
rematerializable. Only used for constant generation for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35162 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:20:03 +00:00
Evan Cheng
a251570417
Constant generation instructions are re-materializable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35161 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:09:02 +00:00
Evan Cheng
e2e9e44d8f
Added isReMaterializable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35160 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 06:22:07 +00:00
Chris Lattner
d435dbcbf9
fix a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35152 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:39:32 +00:00
Chris Lattner
11a3a9d27d
minor updates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35143 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:41:33 +00:00
Nick Lewycky
7f4ba44f37
This is implemented. We now generate:
...
entry:
icmp ugt i32 %x, 4 ; <i1>:0 [#uses=1]
br i1 %0, label %cond_true, label %cond_false
cond_true: ; preds = %entry
%tmp1 = tail call i32 (...)* @bar( i32 12 ) ; <i32> [#uses=0]
ret void
cond_false: ; preds = %entry
switch i32 %x, label %cond_true15 [
i32 4, label %cond_true3
i32 3, label %cond_true7
i32 2, label %cond_true11
i32 0, label %cond_false17
]
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35142 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 14:37:20 +00:00
Devang Patel
84f7fd2483
Support 'I' inline asm constraint.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35129 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 00:13:28 +00:00
Lauro Ramos Venancio
368f20fda4
Only ARMv6 has BSWAP.
...
Fix MultiSource/Applications/aha test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35128 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 22:54:16 +00:00
Bill Wendling
1b7a81d3ae
And now support for MMX logical operations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35125 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 09:44:46 +00:00
Evan Cheng
2770747216
Added isLegalAddressExpression(). Only allows X +/- C for now.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:43:56 +00:00
Bill Wendling
74027e98f1
Multiplication support for MMX.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35118 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 21:24:36 +00:00
Evan Cheng
ba693005e9
Under X86-64 large code model, do not emit 32-bit pc relative calls.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35108 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 22:11:11 +00:00
Evan Cheng
4485d3897b
Notes about codegen issues.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35107 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 21:03:53 +00:00
Evan Cheng
e70ef98043
Clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35105 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 20:20:19 +00:00
Evan Cheng
774be29769
Oops.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35104 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 19:44:58 +00:00
Evan Cheng
a19ac52863
X86-64 JIT is in large code model. Need stubs for direct calls.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35097 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 10:51:55 +00:00
Evan Cheng
8510dc086e
x86-64 JIT stub codegen.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35096 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 10:48:08 +00:00
Evan Cheng
5c0b61a64b
Preliminary support for X86-64 JIT stub codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35095 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 10:44:30 +00:00
Evan Cheng
a13fd108f2
AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2 ]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35088 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 21:05:54 +00:00
Evan Cheng
961f879ed8
Zero is always a legal AM immediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35087 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 20:37:59 +00:00
Nicolas Geoffray
b2ec1cc6cb
Stack and register alignment of call arguments in the ELF ABI
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35083 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 15:02:46 +00:00
Evan Cheng
e8308df0b9
Implement getTargetLowering() or else LSR won't be using ARM specific hooks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35077 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 01:20:42 +00:00
Evan Cheng
b01fad6d19
Updated TargetLowering LSR addressing mode hooks for ARM and Thumb.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35075 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:30:29 +00:00
Evan Cheng
861939152d
More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35074 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:29:01 +00:00
Evan Cheng
a8a155e77f
More flexible TargetLowering LSR hooks for testing whether an immediate is
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a legal target address immediate or scale.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35073 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:28:50 +00:00
Evan Cheng
37e8856f74
Stupid bug: SSE2 supports v2i64 add / sub.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35070 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 22:58:52 +00:00
Bill Wendling
c1fb0473ed
Adding more arithmetic operators to MMX. This is an almost exact copy of
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the addition. Please let me know if you have suggestions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35055 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-10 09:57:05 +00:00
Evan Cheng
1a9da0d66c
Minor stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35049 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 19:46:06 +00:00
Evan Cheng
44f4fca3c0
Add comments about LSR / ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35048 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 19:35:33 +00:00
Evan Cheng
2265b49193
Unfinished work and ideas related to register scavenger.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35047 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 19:34:51 +00:00
Dale Johannesen
818c085232
apply comments from review of last patch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35045 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 19:18:59 +00:00
Dale Johannesen
a6bc6fc170
Add some observations from CoreGraphics benchmark. Remove register
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scavenging todo item, since it is now implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35044 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 17:58:17 +00:00
Evan Cheng
23a9570494
Implement inline asm modifier c.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35035 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 22:42:46 +00:00
Bill Wendling
2f88dcdfb3
Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that
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moves, loads, etc. are recognized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35031 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 22:09:11 +00:00
Evan Cheng
b582b1b1fc
Fix a typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35030 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 21:59:30 +00:00
Evan Cheng
032953d747
Putting more constants which do not contain relocations into .literal{4|8|16}
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35026 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 08:31:54 +00:00
Evan Cheng
bf822eb6a3
Change register allocation order to Dale's suggestion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35021 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 02:56:40 +00:00
Evan Cheng
11788fde93
Bug fix. Not advancing the register scavenger iterator correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35020 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 02:55:08 +00:00
Evan Cheng
98ded765c2
For Darwin, put constant data into .const, .const_data, .literal{4|8|16}
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sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35017 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 01:25:25 +00:00
Evan Cheng
f0b5d56efd
Put constant data to .const, .const_data, .literal{4|8|16} sections.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35016 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 01:07:07 +00:00
Evan Cheng
be346c9476
Add ReadOnlySection directive.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35015 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 01:00:38 +00:00
Evan Cheng
603b83ebcd
Only safe to use a call-clobbered or spilled callee-saved register as scratch register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35010 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-07 20:30:36 +00:00
Bill Wendling
c32a7f98ab
Remove useless pattern fragments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35009 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-07 18:23:09 +00:00
Anton Korobeynikov
d0b82b301d
Refactoring of formal parameter flags. Enable properly use of
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zext/sext/aext stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35008 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-07 16:25:09 +00:00