Commit Graph

612 Commits

Author SHA1 Message Date
Eric Christopher
04bcc11905 Move DataLayout back to the TargetMachine from TargetSubtargetInfo
derived classes.

Since global data alignment, layout, and mangling is often based on the
DataLayout, move it to the TargetMachine. This ensures that global
data is going to be layed out and mangled consistently if the subtarget
changes on a per function basis. Prior to this all targets(*) have
had subtarget dependent code moved out and onto the TargetMachine.

*One target hasn't been migrated as part of this change: R600. The
R600 port has, as a subtarget feature, the size of pointers and
this affects global data layout. I've currently hacked in a FIXME
to enable progress, but the port needs to be updated to either pass
the 64-bitness to the TargetMachine, or fix the DataLayout to
avoid subtarget dependent features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227113 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 19:03:15 +00:00
Colin LeMahieu
62b9c33e13 [Hexagon] Converting multiply and accumulate with immediate intrinsics to patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226681 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 18:13:15 +00:00
Colin LeMahieu
0d9733d596 [Hexagon] Adding intrinsics for doubleword ALU operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226606 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-20 20:45:05 +00:00
Colin LeMahieu
dc8beeba1b [Hexagon] Updating muxir/ri/ii intrinsics. Setting predicate registers as compatible with i32 rather than doing custom type conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226500 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-19 20:31:18 +00:00
Colin LeMahieu
3bea6a4959 [Hexagon] Converting intrinsics combine imm/imm, simple shifts and extends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226483 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-19 18:56:19 +00:00
Colin LeMahieu
596cfabbc4 [Hexagon] Converting remaining ALU32/ALU intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226480 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-19 18:33:58 +00:00
Colin LeMahieu
254d992ab8 [Hexagon] Converting ALU32/ALU intrinsics to new patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226478 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-19 18:22:19 +00:00
Colin LeMahieu
438f1e4979 [Hexagon] Converting halfword to double accumulating multiply intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226472 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-19 17:36:32 +00:00
David Blaikie
341a7e245e std::unique_ptrify the MCStreamer argument to createAsmPrinter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226414 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-18 20:29:04 +00:00
Colin LeMahieu
d08a6cd083 [Hexagon] Converting halfword to doubleword multiply intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226326 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 21:41:57 +00:00
Colin LeMahieu
9a56f06825 [Hexagon] Converting accumulating halfword multiply intrinsics to patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226324 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 21:36:34 +00:00
Colin LeMahieu
67451fe320 [Hexagon] Beginning converting intrinsics to patterns instead of duplicated definitions. Converting halfword multiply intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226318 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 20:38:54 +00:00
Colin LeMahieu
6a1bcaf6ff [Hexagon] Fix 226309, replacement atomic store patterns didn't actually exist, added new versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226315 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 20:16:14 +00:00
Colin LeMahieu
9da6e03161 [Hexagon] Removing old duplicate atomic load/store patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226309 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 19:53:35 +00:00
Colin LeMahieu
3cec3682bb [Hexagon] Converting old patterns to new versions using classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226304 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 19:29:59 +00:00
Colin LeMahieu
9fd1ca6c40 [Hexagon] Updating call/jump instruction patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226288 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-16 17:05:27 +00:00
Colin LeMahieu
c93be748d7 [Hexagon] Adding new-value store and bit reverse instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226224 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 23:10:29 +00:00
Colin LeMahieu
c0518a01f0 [Hexagon] Fix 226206 by uncommenting required pattern and changing patterns for simple load-extends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226210 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 21:35:49 +00:00
Colin LeMahieu
02b677594c [Hexagon] Updating indexed load-extend patterns and changing test to new expected output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226206 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 21:07:52 +00:00
Colin LeMahieu
42fa763380 [Hexagon] Removing old versions of vsplice, valign, cl0, ct0 and updating references to new versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226194 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 19:28:32 +00:00
Colin LeMahieu
500b0d97a1 [Hexagon] Adding vmux instruction. Removing old transfer instructions and updating references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226184 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 18:16:00 +00:00
Colin LeMahieu
044438aff5 [Hexagon] Deleting old float comparison instruction and updating references to new ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226179 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 17:28:14 +00:00
Colin LeMahieu
4ce3b1e4ce [Hexagon] Replacing old fadd/fsub instructions and updating references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226176 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 16:30:07 +00:00
Colin LeMahieu
32467012f6 [Hexagon] Replacing old versions of stores and loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226065 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 00:15:30 +00:00
Colin LeMahieu
419855bfeb [Hexagon] Replacing old version of convert and load f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226057 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 23:07:36 +00:00
Colin LeMahieu
f7db2526ad [Hexagon] Removing old, unused !tstbit instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226036 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 20:26:15 +00:00
Colin LeMahieu
77b1c04ef8 [Hexagon] Removing old versions of cmph and updating references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226013 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 18:26:14 +00:00
Colin LeMahieu
c788b1f524 [Hexagon] Removing old versions of cmpb and updating references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226006 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 18:05:44 +00:00
Colin LeMahieu
8b869b4ae9 [Hexagon] Deleting versions of compare-not that don't have encoding information. Updating references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226003 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 16:49:12 +00:00
Chandler Carruth
1b279144ec [cleanup] Re-sort all the #include lines in LLVM using
utils/sort_includes.py.

I clearly haven't done this in a while, so more changed than usual. This
even uncovered a missing include from the InstrProf library that I've
added. No functionality changed here, just mechanical cleanup of the
include order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225974 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 11:23:27 +00:00
Ahmed Bougacha
7fac1d945f [SelectionDAG] Allow targets to specify legality of extloads' result
type (in addition to the memory type).

The *LoadExt* legalization handling used to only have one type, the
memory type.  This forced users to assume that as long as the extload
for the memory type was declared legal, and the result type was legal,
the whole extload was legal.

However, this isn't always the case.  For instance, on X86, with AVX,
this is legal:
    v4i32 load, zext from v4i8
but this isn't:
    v4i64 load, zext from v4i8
Whereas v4i64 is (arguably) legal, even without AVX2.

Note that the same thing was done a while ago for truncstores (r46140),
but I assume no one needed it yet for extloads, so here we go.

Calls to getLoadExtAction were changed to add the value type, found
manually in the surrounding code.

Calls to setLoadExtAction were mechanically changed, by wrapping the
call in a loop, to match previous behavior.  The loop iterates over
the MVT subrange corresponding to the memory type (FP vectors, etc...).
I also pulled neighboring setTruncStoreActions into some of the loops;
those shouldn't make a difference, as the additional types are illegal.
(e.g., i128->i1 truncstores on PPC.)

No functional change intended.

Differential Revision: http://reviews.llvm.org/D6532


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225421 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-08 00:51:32 +00:00
Colin LeMahieu
c8f98d3bd3 [Hexagon] Fix 225372 USR register is not fully complete. Removing Uses = [USR] maintains existing functionality to old instructions without encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225377 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-07 20:43:38 +00:00
Colin LeMahieu
51817073b3 [Hexagon] Adding floating point classification and creation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225374 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-07 20:28:57 +00:00
Colin LeMahieu
22ddfae848 [Hexagon] Adding encodings for v5 floating point instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225372 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-07 20:24:09 +00:00
Colin LeMahieu
22efbc70a7 [Hexagon] Adding encoding for popcount, fastcorner, dword asr with rounding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225371 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-07 20:07:28 +00:00
Colin LeMahieu
a602a7f199 [Hexagon] Adding compound jump encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225291 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-06 20:03:31 +00:00
Colin LeMahieu
3d1d6d9043 [Hexagon] Adding encoding for misc v4 instructions: boundscheck, tlbmatch, dcfetch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225283 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-06 19:03:20 +00:00
Colin LeMahieu
63d0449f11 [Hexagon] Adding encoding information for absolute address loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225279 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-06 18:38:26 +00:00
Colin LeMahieu
ed4e93d5ba [Hexagon] Fix 225267. GP register is not yet fully implemented. Removing Uses [GP] maintains existing behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225270 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-06 16:52:38 +00:00
Colin LeMahieu
a24e012976 [Hexagon] Adding dealloc_return encoding and absolute address stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225267 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-06 16:15:15 +00:00
Colin LeMahieu
e4f1dcdb83 [Hexagon] Adding add/sub with carry, logical shift left by immediate and memop instructions. Removing old defs without bits and updating references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225210 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-05 21:36:38 +00:00
Colin LeMahieu
ca96263b05 [Hexagon] Adding rounding reg/reg variants, accumulating multiplies, and accumulating shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225201 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-05 20:56:41 +00:00
Colin LeMahieu
27494b0633 [Hexagon] Adding V4 bit manipulating instructions, removing ALU defs without encoding bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225199 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-05 20:35:54 +00:00
Colin LeMahieu
c8e734a561 [Hexagon] Adding V4 logic-logic instructions and tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225198 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-05 20:14:58 +00:00
Colin LeMahieu
e48ec2a918 [Hexagon] Adding orand, bitsplit reg/reg, and modwrap instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225197 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-05 20:04:40 +00:00
Colin LeMahieu
9e989cf190 [Hexagon] Adding round reg/imm and bitsplit instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225188 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-05 18:08:21 +00:00
Craig Topper
9bf73516cb Replace several 'assert(false' with 'llvm_unreachable' or fold a condition into the assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225160 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-05 10:15:49 +00:00
Colin LeMahieu
f5943bd9a9 Reverting 225045 and 225043 and XFAIL multiline.ll on hexagon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225047 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-31 17:14:35 +00:00
Colin LeMahieu
d1d270816b [Hexagon] Removing assertion to appease buildbot until I can reproduce the problem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225045 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-31 16:20:00 +00:00
Colin LeMahieu
e883ee78f2 [Hexagon] Changing an llvm_unreachable to an assertion and returning 0. Relocations aren't implemented yet but we don't need to abort for this in release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225043 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-31 15:57:38 +00:00