Bruno Cardoso Lopes
2c70d4ad35
Add AVX SSE4.1 round instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107549 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-03 00:37:44 +00:00
Bruno Cardoso Lopes
f5cd8c51e3
- Add support for the rest of AVX SSE3 instructions
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- Fix VEX prefix to be emitted with 3 bytes whenever VEX_5M
represents a REX equivalent two byte leading opcode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107523 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02 22:06:54 +00:00
Bruno Cardoso Lopes
c6fcdeb8f9
Move SSE3 Move patterns to a more appropriate section
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Add AVX SSE3 packed horizontal and & sub instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107405 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 17:35:02 +00:00
Bruno Cardoso Lopes
7144821c61
Add AVX SSE3 packed addsub instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 17:08:18 +00:00
Bruno Cardoso Lopes
79b634c244
Add AVX SSE3 replicate and convert instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107375 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 02:33:39 +00:00
Bruno Cardoso Lopes
6596a62076
- Add AVX SSE2 Move doubleword and quadword instructions.
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- Add encode bits for VEX_W
- All 128-bit SSE 1 & SSE2 instructions that are described
in the .td file now have a AVX encoded form already working.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107365 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 01:20:06 +00:00
Bruno Cardoso Lopes
e26f14d150
Add AVX SSE2 mask creation and conditional store instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 18:38:10 +00:00
Bruno Cardoso Lopes
1e4b723b20
Add AVX SSE2 packed integer extract/insert instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 17:03:03 +00:00
Bruno Cardoso Lopes
876085dcfa
Add AVX SSE2 integer unpack instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107246 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 04:06:39 +00:00
Bruno Cardoso Lopes
d252fec7ae
Add AVX SSE2 packed integer shuffle instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107245 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 03:47:56 +00:00
Bruno Cardoso Lopes
6d5d2b5de2
Add AVX SSE2 pack with saturation integer instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107241 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 02:30:25 +00:00
Bruno Cardoso Lopes
c0ea94a37c
Add AVX SSE2 integer packed compare instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107240 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 02:21:09 +00:00
Bruno Cardoso Lopes
5a3a476750
- Add AVX form of all SSE2 logical instructions
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- Add VEX encoding bits to x86 MRM0r-MRM7r
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107238 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 01:58:37 +00:00
Bruno Cardoso Lopes
6c9fa43716
Add *several* AVX integer packed binop instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107225 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 23:47:49 +00:00
Bruno Cardoso Lopes
147b7cad2f
Add AVX ld/st XCSR register.
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Add VEX encoding bits for MRMXm x86 form
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 20:35:48 +00:00
Bruno Cardoso Lopes
721ef73d88
Add AVX non-temporal stores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107178 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 18:22:01 +00:00
Bruno Cardoso Lopes
ea86423cbd
Add sqrt, rsqrt and rcp AVX instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107166 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 17:26:30 +00:00
Bruno Cardoso Lopes
4548260ab5
Described the missing AVX forms of SSE2 convert instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 00:36:02 +00:00
Bruno Cardoso Lopes
bdffc16d65
Add AVX convert CVTSS2SI{rr,rm} and CVTDQ2PS{rr,rm} instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106917 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 23:47:23 +00:00
Bruno Cardoso Lopes
161476ec34
Reapply r106896:
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Add several AVX MOV flavors
Support VEX encoding for MRMDestReg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106912 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 23:33:42 +00:00
Bruno Cardoso Lopes
95325b08a3
revert this now, it's using avx instead of sse :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106906 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 23:04:29 +00:00
Bruno Cardoso Lopes
544a95d716
Add several AVX MOV flavors
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Support VEX encoding for MRMDestReg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106896 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 22:27:51 +00:00
Bruno Cardoso Lopes
a0ae87fd5d
Add some AVX convert instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106815 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 00:39:30 +00:00
Bruno Cardoso Lopes
788184365a
- Add AVX COMI{SS,SD}{rr,rm} and UCOMI{SS,SD}{rr,rm}.
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- Fix a small VEX encoding issue.
- Move compare instructions to their appropriate place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106787 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 20:48:23 +00:00
Chris Lattner
645b209c4a
Teach the x86 mc assembler that %dr6 = %db6, this implements
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rdar://8013734
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106725 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 07:29:18 +00:00
Bruno Cardoso Lopes
6539dc6e6c
Add AVX CMP{SS,SD}{rr,rm} instructions and encoding testcases
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106705 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 00:32:06 +00:00
Bruno Cardoso Lopes
e93e300ad0
Add AVX MOVMSK{PS,PD}rr instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106683 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 21:30:27 +00:00
Bruno Cardoso Lopes
428256b818
Add tests for different AVX cmp opcodes, also teach the x86 asm parser to understand the vcmp instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106678 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 21:10:57 +00:00
Bruno Cardoso Lopes
7dbfd07e32
Add AVX SHUF{PS,PD}{rr,rm} instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106672 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 20:07:15 +00:00
Nico Weber
50b9efc2a8
Add support for the x86 instructions "pusha" and "popa".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 20:00:58 +00:00
Bruno Cardoso Lopes
62a76c6401
Add AVX compare packed instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106600 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 23:37:59 +00:00
Bruno Cardoso Lopes
0caca3967b
Reapply support for AVX unpack and interleave instructions, with
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testcases this time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106593 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 23:02:38 +00:00
Bruno Cardoso Lopes
c3d57b179c
Add AVX MOV{SS,SD}{rr,rm} instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 22:38:56 +00:00
Eric Christopher
97994e0262
Move a 64-bit test to the 64-bit file. Fixes an llvm-mc assertion
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during test runs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106577 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 21:11:51 +00:00
Bruno Cardoso Lopes
f4f4bad696
Refactor aliased packed logical instructions, also add
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AVX AND,OR,XOR,NAND{P}{S,D}{rr,rm} instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106374 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 02:44:01 +00:00
Bruno Cardoso Lopes
be4d595afd
Shrink down code and add for free AVX {MIN,MAX}P{S,D}{rm,rr} instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106366 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 00:37:31 +00:00
Chris Lattner
1cf44fc051
fix rdar://7873482 by teaching the instruction encoder to emit
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segment prefixes. Daniel wrote most of this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106364 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 00:34:00 +00:00
Bruno Cardoso Lopes
d7f9cc4de7
Add {mix,max}{ss,sd}{rr,rm} AVX forms.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106264 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 01:12:56 +00:00
Bruno Cardoso Lopes
cf125d02a0
More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rm
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105870 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-12 01:53:48 +00:00
Bruno Cardoso Lopes
7be0d2c8e9
More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rr
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Handle OpSize TSFlag for AVX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-12 01:23:26 +00:00
Bruno Cardoso Lopes
c902a59f4c
More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm)
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Introduce the VEX_X field
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-11 23:50:47 +00:00
Bruno Cardoso Lopes
99405df044
Reapply r105521, this time appending "LLU" to 64 bit
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immediates to avoid breaking the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105652 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-08 22:51:23 +00:00
Chris Lattner
1087f54ddb
revert r105521, which is breaking the buildbots with stuff like this:
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In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105524 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 04:17:30 +00:00
Bruno Cardoso Lopes
3eca98bb3a
Initial AVX support for some instructions. No patterns matched
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yet, only assembly encoding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105521 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 03:53:24 +00:00
Kevin Enderby
31cc9655b6
MC/X86: Add alias for movzx.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105005 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28 21:20:21 +00:00
Kevin Enderby
5e394429ab
MC/X86: Add alias for fwait.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105001 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28 20:59:10 +00:00
Kevin Enderby
31b6c5b2f3
Fix the use of x86 control and debug registers so that the assertion failure in
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getX86RegNum() does not happen. Patch by Shantonu Sen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104994 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28 19:01:27 +00:00
Kevin Enderby
b106543592
Fix the x86 move to/from segment register instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104731 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 20:10:45 +00:00
Kevin Enderby
cf50a5390c
Changed the encoding of X86 floating point stack operations where both operands
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are st(0). These can be encoded using an opcode for storing in st(0) or using
an opcode for storing in st(i), where i can also be 0. To allow testing with
the darwin assembler and get a matching binary the opcode for storing in st(0)
is now used. To do this the same logical trick is use from the darwin assembler
in converting things like this:
fmul %st(0), %st
into this:
fmul %st(0)
by looking for the second operand being X86::ST0 for specific floating point
mnemonics then removing the second X86::ST0 operand. This also has the add
benefit to allow things like:
fmul %st(1), %st
that llvm-mc did not assemble.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 20:52:34 +00:00
Daniel Dunbar
39e2dd7bab
MC/X86: Add a hack to allow recognizing 'cmpltps' and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104626 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 19:49:32 +00:00
Daniel Dunbar
79373680ed
MC/X86: Define explicit immediate forms of cmp{ss,sd,ps,pd}.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104622 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 18:40:53 +00:00
Kevin Enderby
04ac770be9
The BT64ri8 record in X86Instr64bit.td was missing a REX_W which is required
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for the 64-bit version of the Bit Test instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104621 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 18:16:58 +00:00
Eric Christopher
7e2f5aaa67
Make sure aeskeygenassist uses an unsigned immediate field.
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Fixes rdar://8017638
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104617 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 17:33:22 +00:00
Dan Gohman
e350690e3b
Fix an mmx movd encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104552 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 20:51:08 +00:00
Kevin Enderby
ca956dc0f6
MC/X86: Add aliases for CMOVcc variants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104549 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 20:32:23 +00:00
Daniel Dunbar
62e4c671b6
MC/X86: Subdivide immediates a bit more, so that we properly recognize immediates based on the width of the target instruction. For example:
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addw $0xFFFF, %ax
should match the same as
addw $-1, %ax
but we used to match it to the longer encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104453 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22 21:02:33 +00:00
Daniel Dunbar
4c361972fd
MC/X86: Add alias for setz, setnz, jz, jnz.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22 06:37:33 +00:00
Kevin Enderby
9d31d79493
Added retl for 32-bit x86 and added retq for 64-bit x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 23:01:38 +00:00
Daniel Dunbar
4e7f8390c0
MC/X86: Add movq alias for movabsq, to allow matching 64-bit immediates with movq.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104275 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 20:36:29 +00:00
Dan Gohman
e5e4ff974d
Fix assembly parsing and encoding of the pushf and popf family of
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instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104231 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 16:16:00 +00:00
Dan Gohman
14aaeac5cf
Define the x86 pause instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 01:35:50 +00:00
Dan Gohman
ee5673b622
Fix the sfence instruction to use MRM_F8 instead of MRM7r, since it
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doesn't have a register operand. Also, use I instead of PSI, for
consistency with mfence and lfence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104203 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 01:23:41 +00:00
Chris Lattner
a7f1354eb5
fix rdar://7986634 - match instruction opcodes case insensitively.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104183 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 23:34:33 +00:00
Eric Christopher
c6177a4531
More data/parsing support for tls directives. Add a few more testcases
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and cleanup comments as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103985 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 22:53:55 +00:00
Daniel Dunbar
525a3a67c1
llvm-mc: Support reassignment of variables in one special case, when the
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variable has not yet been used in an expression. This allows us to support a few
cases that show up in real code (mostly because gcc generates it for Objective-C
on Darwin), without giving up a reasonable semantic model for assignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 17:46:23 +00:00
Eric Christopher
d04d98d24f
Assume that we'll handle mangling the symbols earlier and just put the
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symbol to the file as we have it. Simplifies out tbss handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103928 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 02:13:02 +00:00
Kevin Enderby
c3ce05c594
Fix so "int3" is correctly accepted, added "into" and fixed "int" with an
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argument, like "int $4", to not get an Assertion error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103791 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 19:16:02 +00:00
Eric Christopher
482eba054a
Add AsmParser support for darwin tbss directive.
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Nothing uses this yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103757 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 01:50:28 +00:00
Chris Lattner
7bb7c55a61
fix rdar://7965971 and a fixme: use ParseIdentifier in
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ParseDirectiveDarwinZerofill instead of hard coding the
check for identifier. This allows quoted symbol names to
be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103682 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13 00:10:34 +00:00
Chris Lattner
b5505d0ee3
reapply r103668 with a fix. Never make "minor syntax changes"
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after testing before committing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103681 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13 00:02:47 +00:00
Chris Lattner
3519f9d7d1
revert r103668 for now, it is apparently breaking things.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 23:40:59 +00:00
Chris Lattner
0de8e3f10a
moffset forms of moves are x86-32 only, make the parser
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lower them to the correct x86-64 instructions since we
don't have a clean way to handle this in td files yet.
rdar://7947184
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103668 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 23:13:36 +00:00
Chris Lattner
2745f6e920
fix the encoding of the obscure "moffset" forms of moves, i386
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part first. rdar://7947184
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103660 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 22:48:24 +00:00
Daniel Dunbar
0481449a05
MC/X86: Extend suffix matching hack to match 'q' suffix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103535 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 00:54:20 +00:00
Daniel Dunbar
c26ae5ab7e
MC/X86: X86AbsMemAsmOperand is subclass of X86NoSegMemAsmOperand.
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- This fixes "leal 0, %eax", for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103205 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 22:39:14 +00:00
Chris Lattner
e1611f26e3
fix rdar://7947167 - llvm-mc doesn't match movsq
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103199 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 21:48:14 +00:00
Daniel Dunbar
5fe03c023c
Revert r103137, fix for $ in labels. It looks like we can't actually handle this
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at the token level. Consider the following horrible test case:
a = 1
.globl $a
movl ($a), %eax
movl $a, %eax
movl $$a, %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103178 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 14:46:38 +00:00
Chris Lattner
851f87c6c9
fix rdar://7946934 - in some limited cases, the assembler should
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allow $ at the start of a symbol name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103137 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 23:51:28 +00:00
Daniel Dunbar
e9f0fb4179
MC/X86: Chris pointed that 'as' isn't consistent in accepting the long form of
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instructions which have no direct register usage.
Darwin 'as' accepts:
add $0, (%rax)
but rejects
mov $0, (%rax)
for example.
Given that, only accept suffix matches which match exactly one form. We still
need to emit nice diagnostics for failures...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103015 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04 17:31:02 +00:00
Daniel Dunbar
c918d6043b
MC/X86: Add "support" for matching ATT style mnemonic prefixes.
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- The idea is that when a match fails, we just try to match each of +'b', +'w',
+'l'. If exactly one matches, we assume this is a mnemonic prefix and accept
it. If all match, we assume it is width generic, and take the 'l' form.
- This would be a horrible hack, if it weren't so simple. Therefore it is an
elegant solution! Chris gets the credit for this particular elegant
solution. :)
- Next step to making this more robust is to have the X86 matcher generate the
mnemonic prefix information. Ideally we would also compute up-front exactly
which mnemonic to attempt to match, but this may require more custom code in
the matcher than is really worth it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103012 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04 16:12:42 +00:00
Kevin Enderby
9d0838fba8
Changed llvm-mc to use the same suffixes with floating point compare
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instructions as the Mac OS X darwin assembler. Some of which like 'fcoml'
assembled to different opcodes. While some of the suffixes were just different.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102958 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 21:31:40 +00:00
Kevin Enderby
eb612347f4
Fixed the encoding of two of the X86 movq instuctions. The Move quadword from
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mm to mm/m64 and the Move quadword from xmm2/mem64 to xmm1 had the incorrect
encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102952 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 21:03:31 +00:00
Kevin Enderby
3c979b06c0
Fixed the encoding of the x86 push instructions. Using a 32-bit immediate value
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caused the a pushl instruction to be incorrectly encoding using only two bytes
of immediate, causing the following 2 instruction bytes to be part of the 32-bit
immediate value. Also fixed the one byte form of push to be used when the
immediate would fit in a signed extended byte. Lastly changed the names to not
include the 32 of PUSH32 since they actually push the size of the stack pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 20:45:05 +00:00
Kevin Enderby
9ac7282117
Fixed the word sized Bit Scan Forward/Reverse instructions, they needed the
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Operand size override prefix to be part of their records.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102556 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 23:20:40 +00:00
Chris Lattner
eef6d78be1
teach the x86 asm parser how to handle segment prefixes
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in memory operands. rdar://7874844
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101661 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 18:56:34 +00:00
Chris Lattner
65de1b9eb3
a bunch of ssse3 instructions are misencoded to think they have an
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i8 field when they really do not. This fixes rdar://7840289
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101629 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 07:38:24 +00:00
Chris Lattner
d305035155
implement mc asmparser support for '.', which gets the
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current PC. rdar://7834775
We now produce an identical .o file compared to the cctools
assembler for something like this:
_f0:
L0:
jmp L1
.long . - L0
L1:
jmp A
.long . - L1
.zerofill __DATA,_bss,A,0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101227 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14 04:40:28 +00:00
Bob Wilson
86afec7730
Reapply Kevin's change 94440, now that Chris has fixed the limitation on
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opcode values fitting in one byte (svn r99494).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99514 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-25 16:36:14 +00:00
Bob Wilson
014dc4e720
Speculatively revert this to see if it fixes buildbot failures.
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--- Reverse-merging r99440 into '.':
U test/MC/AsmParser/X86/x86_32-bit_cat.s
U test/MC/AsmParser/X86/x86_32-encoding.s
U include/llvm/IntrinsicsX86.td
U include/llvm/CodeGen/SelectionDAGNodes.h
U lib/Target/X86/X86InstrSSE.td
U lib/Target/X86/X86ISelLowering.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99450 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24 23:26:29 +00:00
Kevin Enderby
760c2f34d9
Added the Advanced Encryption Standard (AES) Instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99440 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24 22:33:33 +00:00
Kevin Enderby
044be39090
Fixed the SS42AI template for the SSE 4.2 instructions with TA prefix so it does
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not get an "Unknown immediate size" assert failure when used. All instructions
of this form have an 8-bit immediate. Also added a test case of an example
instruction that is of this form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24 22:28:42 +00:00
Kevin Enderby
b46b03b36f
Fixed the encoding problems of the crc32 instructions. All had the Operand size
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override prefix and only the r/m16 forms should have had that. Also for variant
one, the AT&T syntax, added suffixes to all forms. Also added the missing
64-bit form for 'CRC32 r64, r/m8'. Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98980 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 20:04:42 +00:00
Daniel Dunbar
0180daee02
MC/X86: Rename alternate spellings of {ADD64,CMP64} and mark as "code gen only" so they don't get selected by the asm matcher.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98972 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 18:07:48 +00:00
Daniel Dunbar
c28c7689fc
X86: Fix encoding for TEST64rr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 01:15:03 +00:00
Daniel Dunbar
9fdac902d4
X86MCCodeEmitter: Fix two minor issues with reloc_riprel_4byte_movq_load, we
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were missing it on some movq instructions and were not including the appropriate
PCrel bias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98880 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 21:53:54 +00:00
Daniel Dunbar
f98bc6320b
MC/X86/AsmMatcher: Use the new instruction cleanup routine to implement a
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temporary workaround for matching inc/dec on x86_64 to the correct instruction.
- This hack will eventually be replaced with a robust mechanism for handling
matching instructions based on the available target features.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 20:06:02 +00:00
Chris Lattner
618d0ed4bc
fix an x86-64 encoding bug Daniel found.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98855 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 20:04:36 +00:00
Chris Lattner
0f53cf2236
add a special relocation type for movq loads for object
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files that produce special relocation types where the
linker changes movq's into lea's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98839 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 18:10:56 +00:00
Chris Lattner
9e2dab7dbe
xfail these tests temporarily to get teh buildbots back to happy land.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98476 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14 07:32:48 +00:00
Daniel Dunbar
859c9dc867
X86: Fix ADD64i32 encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98457 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 22:49:39 +00:00
Daniel Dunbar
96e2cec9c7
MC/X86_64: Fix matching of leaq.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98444 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 19:31:44 +00:00
Daniel Dunbar
989ac72981
MC/X86_64: Fix matching of callq.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98443 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 19:31:38 +00:00
Daniel Dunbar
d5e7705a05
MC/X86: Add temporary hack to match shrl $1,%eax correctly, to support testing
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other functionality on 403.gcc compiled at -O0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98405 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 00:47:29 +00:00
Daniel Dunbar
69c695ee47
MC/X86: Add an XFAIL test where we aren't matching the correct instruction
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because we don't understand how the specific instruction is doing sign
extension.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 00:47:25 +00:00
Daniel Dunbar
f291be3159
MC/X86: Rename alternate spellings of ADD{8,16,32} and mark as "code gen only" so they don't get selected by the asm matcher.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98098 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09 22:50:46 +00:00
Daniel Dunbar
1e8ee89c21
MC/X86: Rename alternate spellings of CMP{8,16,32} and mark as "code gen only" so they don't get selected by the asm matcher.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98097 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09 22:50:40 +00:00
Daniel Dunbar
b93c72cda4
X86: Fix encoding for TEST{8,16,32}rr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97982 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08 21:10:36 +00:00
Chris Lattner
a08b587494
make pcrel immediate values relative to the start of the field,
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not the end of the field, fixing rdar://7651978
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96330 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 05:03:17 +00:00
Chris Lattner
b779033a23
add encoder support and tests for rdtscp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96076 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 03:42:24 +00:00
Daniel Dunbar
e9a60eb498
MC/AsmParser: Attempt to constant fold expressions up-front. This ensures we avoid fixups for obvious cases like '-(16)'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 01:28:07 +00:00
Chris Lattner
f068304b1f
rip out the 'heinous' x86 MCCodeEmitter implementation.
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We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:49:29 +00:00
Chris Lattner
a599de2410
remove special cases for vmlaunch, vmresume, vmxoff, and swapgs
...
fix swapgs to be spelled right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96058 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:41:14 +00:00
Daniel Dunbar
9c60f534cb
MC/X86: Push immediate operands as immediates not expressions when possible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96055 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:17:21 +00:00
Chris Lattner
4a2e5edb94
implement the rest of correct x86-64 encoder support for
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rip-relative addresses, and add a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96040 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:24:09 +00:00
Chris Lattner
c4d3f662fc
fix the encodings of monitor and mwait, which were completely
...
busted in both encoders. I'm not bothering to fix it in the
old one at this point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 01:06:22 +00:00
Kevin Enderby
1c5bcac7d5
Remove the few # TAILCALL comments that snuck in. As they may fail on linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95827 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 00:18:12 +00:00
Kevin Enderby
ac175e251d
Update the X86 assembler matcher test case now that a few more things match
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with some of the recent changes that have gone into llvm-mc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95826 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 00:13:43 +00:00
Daniel Dunbar
1b6c060591
MC/X86 AsmMatcher: Fix a use after free spotted by d0k, and de-XFAIL
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x86_32-encoding.s in on expectation of it passing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95806 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 21:19:28 +00:00
Daniel Dunbar
ac6dd79a55
XFAIL this on linux until I figure out what is happening.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 21:01:04 +00:00
Kevin Enderby
d901690b82
Replace this file containing 4 tests of x86 32-bit encodings with a file
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containing the subset of the full auto generated test case that currently
encodes correctly. Again it is useful as we bring up the the new encoder
to make sure currently working stuff stays working.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95791 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 19:13:56 +00:00
Kevin Enderby
40fe18f66e
Fix the encoding of the movntdqa X86 instruction. It was missing the 0x66
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prefix which is part of the opcode encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95729 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 00:10:31 +00:00
Chris Lattner
9e8528fc5c
fix X86 encoder to output [disp] only addresses with no SIB byte
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in X86-32 mode. This is still required in x86-64 mode to avoid
forming [disp+rip] encoding. Rewrite the SIB byte decision logic
to be actually understandable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95693 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 21:47:19 +00:00
Chris Lattner
e16b0fc3cb
Implement x86 asm parsing support for %st and %st(4)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 00:49:22 +00:00
Chris Lattner
8f60e4d679
fix incorrect encoding of SBB8mi that Kevin noticed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95448 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 22:56:11 +00:00
Chris Lattner
3f1118310e
fix a case where we'd mis-encode fisttp because of an incorrect (and
...
redundant with a correct one) pattern that was added for the disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95446 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 22:49:06 +00:00
Chris Lattner
c8296a0d59
remove fixme
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95444 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 22:46:46 +00:00
Kevin Enderby
12ce0de462
Added support for X86 instruction prefixes so llvm-mc can assemble them. The
...
Lock prefix, Repeat string operation prefixes and the Segment override prefixes.
Also added versions of the move string and store string instructions without the
repeat prefixes to X86InstrInfo.td. And finally marked the rep versions of
move/store string records in X86InstrInfo.td as isCodeGenOnly = 1 so tblgen is
happy building the disassembler files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95252 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 21:04:42 +00:00
Daniel Dunbar
e7070e9006
AsmParser/X86: Add temporary hack to allow parsing "sal". Eventually we need
...
some mechanism for specifying alternative syntaxes, but I'm not sure what form
that should take yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95158 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 23:46:47 +00:00
Chris Lattner
4105155231
remove the # TAILCALL markers, which was causing the to fail.
...
It's unclear if the matcher is nondeterminstic of what here,
but I'm getting matches without TAILCALL and some other hosts
are getting matches with it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95149 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 22:36:29 +00:00
Chris Lattner
1de46a4ab5
this apparently depends on the host somehow.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95122 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 20:57:28 +00:00
Chris Lattner
d56f80358b
disable this test for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95120 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 20:41:39 +00:00
Kevin Enderby
82a5946939
Added another version of the X86 assembler matcher test case.
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This test case is different subset of the full auto generated test case, and a
larger subset that is in x86_32-bit.s (that set will encode correctly). These
instructions can pass though llvm-mc as it were a logical cat(1) and then
reassemble to the same instruction. It is useful as we bring up the parser and
matcher so we don't break things that currently work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95107 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 19:05:57 +00:00
Daniel Dunbar
b834f5d13d
MC/X86 AsmParser: Handle absolute memory operands correctly. We were doing
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something totally broken and parsing them as immediates, but the .td file also
had the wrong match class so things sortof worked. Except, that is, that we
would parse
movl $0, %eax
as
movl 0, %eax
Feel free to guess how well that worked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 01:02:48 +00:00
Daniel Dunbar
50459580e7
MC/X86: Add a nice X86 assembler matcher test case from Kevin Enderby.
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- This test case is auto generated, and has been verified to round-trip
correctly through llvm-mc by checking the assembled .o file before and after
piping through llvm-mc. It will be extended over time as the matcher grows
support for more instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94857 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-29 23:32:40 +00:00
Chris Lattner
d32e803073
wirte up .file and .file to the mc asmparser.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94438 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-25 19:02:58 +00:00
Chris Lattner
75f265fbbb
fix a parsing problem on instructions like:
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movw $8, (_cost_table_-L97$pb)+66(%eax)
After the parens, we could still have a binop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94345 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-24 01:07:33 +00:00
Chris Lattner
12e555c36c
teach MCAsmStreamer::EmitBytes to use .ascii and .asciz
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94259 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 00:15:00 +00:00
Daniel Dunbar
8a3ee718cd
Mark EH_RETURN64 as CodeGenOnly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94205 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-22 20:16:37 +00:00
Chris Lattner
6113b3d323
add an MCAsmStreamer::EmitFill specialization of EmitFill that
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emits one directive instead of N. Not doing this would be a
significant regression on the # bytes generated by .fill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 18:52:28 +00:00
Chris Lattner
f4d9a555ba
only darwin has zerofill
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93866 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 06:21:23 +00:00
Daniel Dunbar
db196e82a4
Force triple in tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84257 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 16:30:02 +00:00
Daniel Dunbar
75773ff00d
MC: Tweak variable assignment diagnostics, and make reassignment of non-absolute
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variables and symbols invalid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84232 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 01:57:39 +00:00
Daniel Dunbar
fffff915d5
MC: When parsing a variable reference, substitute absolute variables immediately
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since they are allowed to be redefined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84230 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 01:34:54 +00:00
Daniel Dunbar
06e483dae0
Move ARM and X86 specific AsmParser tests into separate subdirectories, and only
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run if appropriate target is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82419 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21 00:05:30 +00:00
Chris Lattner
e895c61515
Add an intel syntax MCInstPrinter implementation. You can now
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transcode from AT&T to intel syntax with "llvm-mc foo.s -output-asm-variant=1"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82385 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-20 07:17:49 +00:00
Kevin Enderby
ca9c42c4da
Added the first bits of the ARM target assembler to llvm-mc. For now it only
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parses the .word directive as 4 bytes and ARMAsmParser::ParseInstruction will
give an error is called. Broke out the test of the .word directive into two
different test cases, one for x86 and one for arm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81817 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 00:27:25 +00:00
Chris Lattner
b92c36331d
unbreak this test by working around an asmparser bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81724 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-13 22:28:17 +00:00
Dan Gohman
cd60c1fb74
Unbreak these tests. Chris, please verify that these changes are intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81217 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 14:14:24 +00:00
Chris Lattner
0892a6d7a9
use a darwin triple
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80900 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-03 06:15:11 +00:00
Chris Lattner
17b9abb799
adjust expected lines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80898 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-03 06:13:45 +00:00