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146 Commits

Author SHA1 Message Date
Evan Cheng
d35b8c1adb Added isel patterns for RET, JMP, and WRITEPORT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24588 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-04 08:19:43 +00:00
Evan Cheng
640f299b44 Proper support for shifts with register shift value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24559 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-01 00:43:55 +00:00
Nate Begeman
391c5d231a No longer track value types for asm printer operands, and remove them as 
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 18:54:35 +00:00
Chris Lattner
5b9bbc8792 Fix a bug in a recent patch that broke shifts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24526 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 05:11:18 +00:00
Evan Cheng
f0701842f7 Add more X86 ISel patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24520 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-29 19:38:52 +00:00
Chris Lattner
441b223c9b encode rdtsc correctly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24435 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-20 22:13:18 +00:00
Andrew Lenharth
b873ff322c The second patch of X86 support for read cycle counter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24430 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-20 21:41:10 +00:00
Chris Lattner
6adaf79ad7 Teach the x86 backend about the register constraints of its addressing mode. 
Patch by Evan Cheng


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24423 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-19 07:01:30 +00:00
Chris Lattner
f124d5e500 add more patterns, patch by Evan Cheng. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24406 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-18 01:04:42 +00:00
Chris Lattner
78432feff8 Add patterns for some 16-bit immediate instructions, patch contributed by 
Evan Cheng.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24384 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-17 02:01:55 +00:00
Chris Lattner
7a12537843 Add patterns for several simple instructions that take i32 immediates. 
Patch contributed by Evan Cheng!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24382 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-16 22:59:19 +00:00
Nate Begeman
14e2cf62f4 Properly split f32 and f64 into separate register classes for scalar sse fp 
fixing a bunch of nasty hackery


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23735 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 22:06:00 +00:00
Chris Lattner
43ef1318c6 give all operands names 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23356 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-14 21:10:24 +00:00
Chris Lattner
9d9dc816d0 add a few missing cases 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22891 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:41:29 +00:00
Chris Lattner
b822abade7 Give ADJCALLSTACKDOWN/UP the correct operands. 
Give a whole bunch of other stuff variable operands, particularly FP.  The
FP stackifier is playing fast and loose with operands here, so we have to
mark them all as variable.  This will have to be fixed before we can dag->dag
the X86 backend.  The solution is for the pre-stackifier and post-stackifier
instructions to all be disjoint.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22890 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:38:22 +00:00
Nate Begeman
1c73c7be9d Scalar SSE: load +0.0 -> xorps/xorpd 
Scalar SSE: a < b ? c : 0.0 -> cmpss, andps
Scalar SSE: float -> i16 needs to be promoted


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22637 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-03 23:26:28 +00:00
Nate Begeman
16b04f3d5e Get closer to fully working scalar FP in SSE regs. This gets singlesource 
working, and Olden/power.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22441 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-15 00:38:55 +00:00
Nate Begeman
f63be7d395 First round of support for doing scalar FP using the SSE2 ISA extension and 
XMM registers.  There are many known deficiencies and fixmes, which will be
addressed ASAP.  The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.

The x86 backend will still default to x87 style FP.  To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.

An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
                        Sum += P[i]; return Sum; }

The inner loop looks like the following:
x87:
.LBB_foo_1:     # no_exit
        fldl (%esp)
        faddl (%eax,%ecx,8)
        fstpl (%esp)
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit

SSE2:
        addsd (%eax,%ecx,8), %xmm0
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22340 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-06 18:59:04 +00:00
Nate Begeman
f1702ac589 Initial set of .td file changes necessary to get scalar fp in xmm registers 
working.  The instruction selector changes will hopefully be coming later
this week once they are debugged.  This is necessary to support the darwin
x86 FP model, and is recommended by intel as the replacement for x87.  As
a bonus, the register allocator knows how to deal with these registers
across basic blocks, unliky the FP stackifier.  This leads to significantly
better codegen in several cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22300 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-27 21:20:31 +00:00
Chris Lattner
1e9448bce8 Add markers in the asm file for tail calls, add a new ADJSTACKPTRri 
sorta-pseudo-instruction


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22042 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-15 03:10:37 +00:00
Chris Lattner
0dede079e7 Yes, calltarget is the operand of the day. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22040 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-15 01:10:30 +00:00
Chris Lattner
2b3d56ee72 Add some new instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22036 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-14 23:35:21 +00:00
Chris Lattner
1be4811d34 add 'ret imm' instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21945 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 17:56:48 +00:00
Chris Lattner
82c7897f49 Fix the syntax of the i/o instructions, these are obviously unused. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21829 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 20:49:20 +00:00
Chris Lattner
5afc124bdf Add some new X86 instrs, patch contributed by Morten Ofstad 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21608 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-28 21:50:05 +00:00
Chris Lattner
1e6a71524e add signed versions of the extra precision multiplies 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21106 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 04:19:22 +00:00
Chris Lattner
b1f26fb921 add an fabs instr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21006 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 04:31:56 +00:00
Chris Lattner
da895d6337 Fix spelling, patch contributed by Gabor Greif! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20343 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-02-27 06:18:25 +00:00
Chris Lattner
40ff633b05 Add rotate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19690 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:50:03 +00:00
Chris Lattner
0df53d22c3 Improve coverage of the X86 instruction set by adding 16-bit shift doubles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19687 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:31:24 +00:00
Chris Lattner
41e431ba04 Teach the code generator that shrd/shld is commutable if it has an immediate. 
This allows us to generate this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        shld %EDX, %EDX, 2
        shl %EAX, 2
        ret

instead of this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %EDX, %EAX
        shrd %EDX, %ECX, 30
        shl %EAX, 2
        ret

Note the magically transmogrifying immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19686 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:11:01 +00:00
Chris Lattner
57fbfb5879 Add conditional moves for the parity flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19437 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-10 22:09:33 +00:00
Chris Lattner
10197ff5cd ADC and IMUL are also commutable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19264 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-03 01:27:59 +00:00
Chris Lattner
cc65beeb39 Two changes here: 
1. Add new instructions for checking parity flags: JP, JNP, SETP, SETNP.
2. Set the isCommutable and isPromotableTo3Address bits on several
   instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19246 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-02 02:35:46 +00:00
John Criswell
546faca4ef Correct the name of stosd for the AT&T syntax: 
It's stosl (l for long == 32 bit).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17658 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-11-10 04:48:15 +00:00
Chris Lattner
09c750f73d Remove debugging code, fix encoding problem. This fixes the problems 
the JIT had last night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16766 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 14:31:50 +00:00
Chris Lattner
d93d3b047c Add some new instructions. Fix the asm string for sbb32rr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16759 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 04:01:02 +00:00
Chris Lattner
8f99eff156 Convert some missed patterns to support AT&T style 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16645 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 07:23:07 +00:00
Chris Lattner
10f873b420 Apparently the GNU assembler has a HUGE hack to be compatible with really 
old and broken AT&T syntax assemblers.  The problem with this hack is that
*SOME* forms of the fdiv and fsub instructions have the 'r' bit inverted.
This was a real pain to figure out, but is trivially easy to support: thus
we are now bug compatible with gas and gcc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16644 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 07:08:46 +00:00
Chris Lattner
ac6a47588b Fix incorrect suffix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16642 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 05:20:16 +00:00
Chris Lattner
707c6fe3ad Fix some more missed suffixes and swapped operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16641 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 01:38:10 +00:00
Chris Lattner
60c715c9a2 Add missing suffixes to FP instructions for AT&T mode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16640 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 00:43:31 +00:00
Chris Lattner
3a173dfc72 Add support to the instruction patterns for AT&T style output, which will 
hopefully lead to the death of the 'GasBugWorkaroundEmitter'.  This also
includes changes to wrap the whole file to 80 columns! Woot! :)

Note that the AT&T style output has not been tested at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16638 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-03 20:35:00 +00:00
Alkis Evlogimenos
93c1ab2e15 Use a shorter form to express implicit use/defs in FpGETRESULT and 
FpSETRESULT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16247 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-08 18:29:31 +00:00
Alkis Evlogimenos
978f629ba9 A call instruction should implicitely define ST0 since the return 
value is returned in that register. The pseudo instructions
FpGETRESULT and FpSETRESULT shold also have an implicity use and def
of ST0 repsecitvely.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16246 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-08 16:54:54 +00:00
Chris Lattner
c96bb817aa Remove a bunch of ad-hoc target-specific flags that were only used by the 
old asmprinter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15660 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 07:12:04 +00:00
Chris Lattner
e4ead0ce62 Add asmprintergen support for the last X86 instruction that needs it: pcrelative calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15657 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 06:59:12 +00:00
Chris Lattner
9795b3a0e7 Scrunch memoperands, add a few more for floating point memops 
Eliminate the FPI*m classes, converting them to use FPI instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15655 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 06:50:10 +00:00
Chris Lattner
0f38e6ccca Make FPI take asm string and operand list 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15653 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 05:54:16 +00:00
Chris Lattner
f5d3a83f65 Nuke the Im*i* patterns, by asmprintergenifying all users. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15652 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 05:31:07 +00:00