Evan Cheng
f0a0cddbcd
- Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
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- Fix some copy+paste bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-18 22:40:57 +00:00
Evan Cheng
58184e6878
Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43150 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-18 21:29:24 +00:00
Evan Cheng
66f0f64082
- Added a few target hooks to generate load / store instructions from / to any
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address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42621 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 01:32:41 +00:00
Evan Cheng
9efce638d3
Allow copyRegToReg to emit cross register classes copies.
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Tested with "make check"!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 06:25:56 +00:00
Evan Cheng
64d80e3387
Change instruction description to split OperandList into OutOperandList and
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InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-19 01:14:50 +00:00
Evan Cheng
4558b807a2
Only adjust esp around calls in presence of alloca.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40030 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-19 00:42:58 +00:00
Anton Korobeynikov
2365f51ed0
Long live the exception handling!
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This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.
In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.
After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be
thought as 'finished': I expect many small and not so small glitches
everywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39855 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-14 14:06:15 +00:00
Evan Cheng
13ab020ea0
Remove clobbersPred. Add an OptionalDefOperand to instructions which have the 's' bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38501 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10 18:08:01 +00:00
Evan Cheng
3b5b8368f3
Added ARM::CPSR to represent ARM CPSR status register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37894 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 07:11:03 +00:00
Evan Cheng
62ccdbf0b3
Add missing const qualifiers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37342 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-29 18:42:18 +00:00
Evan Cheng
44bec52b1b
Add PredicateOperand to all ARM instructions that have the condition field.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37066 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-15 01:29:07 +00:00
Lauro Ramos Venancio
356e72c4f1
Fix PR1390 in a better way.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36916 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-07 23:15:16 +00:00
Lauro Ramos Venancio
8f57667a5d
Fix PR1390.
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Don't spill extra register to align the stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36814 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-05 23:44:41 +00:00
Lauro Ramos Venancio
e8e5495474
Debug support for arm-linux.
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Patch by Raul Herbster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36690 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 20:28:35 +00:00
Evan Cheng
97de913821
eliminateFrameIndex() change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36626 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 09:13:03 +00:00
Evan Cheng
5c3885ce8e
Under normal circumstances, when a frame pointer is not required, we reserve
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argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36607 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 00:52:08 +00:00
Lauro Ramos Venancio
4c6d20a096
add parenthesis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36514 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 20:10:08 +00:00
Lauro Ramos Venancio
fdc9692f97
In Thumb mode, the frame register must be R7.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36512 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 17:58:03 +00:00
Evan Cheng
6c087e5585
Match MachineFunction::UsedPhysRegs changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36452 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 22:13:27 +00:00
Lauro Ramos Venancio
267bfb553e
Fix a bug in getFrameRegister.
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Reported by Raul Herbster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36262 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-19 14:09:38 +00:00
Anton Korobeynikov
bed2946a96
Removed tabs everywhere except autogenerated & external files. Add make
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target for tabs checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16 18:10:23 +00:00
Evan Cheng
b03eacdbf3
Fixed a bug that causes codegen of noop like add r0, r0, #0 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35627 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03 21:31:21 +00:00
Evan Cheng
bf2c8b3c96
Added MRegisterInfo hook to re-materialize an instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35205 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:09:38 +00:00
Evan Cheng
9f6636ff0c
Fix naming inconsistencies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:48:02 +00:00
Evan Cheng
3d06cf4584
Fix one more Thumb eliminateFrameIndex bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34990 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-07 00:12:18 +00:00
Evan Cheng
e6257632fc
Register scavenging is now on by default for ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34987 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-06 22:02:53 +00:00
Evan Cheng
140e33cfd1
Scavenge a register using the register scavenger when needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34966 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-06 10:03:56 +00:00
Dale Johannesen
9f8e50d4ed
eliminate unnecessary reset of SP in epilog on darwin
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34824 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-02 01:17:17 +00:00
Evan Cheng
c1c2de0ae7
Use a spilled free callee-saved register as scratch register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34785 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-01 08:57:52 +00:00
Evan Cheng
f49407b790
- Track which callee-saved registers are spilled.
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- Some code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34783 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-01 08:26:31 +00:00
Evan Cheng
ad78ef2154
Doh. ARM::PC is obvious a reserved register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34763 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 23:12:34 +00:00
Evan Cheng
36230cdda4
Make requiresRegisterScavenging determination on a per MachineFunction basis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34711 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 00:59:19 +00:00
Evan Cheng
1b051fc6a4
Start making use of RegScavenger.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34708 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 00:21:58 +00:00
Evan Cheng
5ef9226f30
Let MRegisterInfo now owns RegScavenger; eliminateFrameIndex must preserve register kill info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34692 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-27 21:12:35 +00:00
Lauro Ramos Venancio
acdfa445ac
bugfix: SP wasn't updated for varargs when frame pointer was eliminated.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34537 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-23 21:53:48 +00:00
Evan Cheng
ead7590581
Add option to turn on register scavenger; By default, spills kills the register being stored.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34514 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-23 01:09:11 +00:00
Jim Laskey
62819f3144
Support to provide exception and selector registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34482 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-21 22:54:50 +00:00
Evan Cheng
b371f457b0
Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34428 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-19 21:49:54 +00:00
Reid Spencer
a284cbf667
For PR1207:
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Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34399 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-19 03:20:00 +00:00
Evan Cheng
eceada6728
Added getReservedRegs().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34376 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-17 11:06:00 +00:00
Evan Cheng
bd8251a9a6
isLowRegister() expects input is a physical register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34013 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 21:44:33 +00:00
Evan Cheng
403e4a4725
Rename.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34011 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 21:24:09 +00:00
Evan Cheng
5ebd10e5ac
If sp offset will be materialized in a register. Clear the offset field of str / ldr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34010 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 21:19:58 +00:00
Evan Cheng
8fdbe560a0
Get rid of references to iostream.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34009 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 21:18:32 +00:00
Evan Cheng
8bed6c968f
In thumb mode, R3 is reserved, but it can be live in to the function. If
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that is the case, whenever we use it as a scratch register, save it to R12
first and then restore it after the use.
This is a temporary and truly horrible workaround!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33999 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 09:17:36 +00:00
Evan Cheng
7142f8755a
- If fp (r7) is used to reference stack objects, use [r, r] address mode.
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- If there is a dynamic alloca, in the epilogue, restore the value of sp
using r7 - offset.
- Other bug fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33997 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 08:37:31 +00:00
Evan Cheng
a01faf4a7a
eliminateFrameIndex() is even more complicated if frame ptr is used instead of SP when there are dynamic alloca's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33975 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 02:44:23 +00:00
Evan Cheng
8e59ea998f
Spill / restore should avoid modifying the condition register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33971 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-07 00:06:56 +00:00
Evan Cheng
40984d7449
foldMemoryOperand() cannot fold tMOVrr sp into load / store in thumb mode. tLDRspi / tSTRspi cannot target / store high registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-06 06:13:29 +00:00
Evan Cheng
88b633165a
eliminateFrameIndex() bug when frame pointer is used as base register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33945 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-06 00:23:31 +00:00