Dan Gohman
0115e164ba
Fix MachineLICM to use the correct virtual register class when
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unfolding loads for hoisting. getOpcodeAfterMemoryUnfold returns the
opcode of the original operation without the load, not the load
itself, MachineLICM needs to know the operand index in order to get
the correct register class. Extend getOpcodeAfterMemoryUnfold to
return this information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-30 22:18:41 +00:00
Bob Wilson
929ffa2414
Fix a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85610 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-30 20:13:25 +00:00
Rafael Espindola
c1382b745f
This fixes functions like
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void f (int a1, int a2, int a3, int a4, int a5,...)
In ARMTargetLowering::LowerFormalArguments if the function has 4 or
more regular arguments we used to set VarArgsFrameIndex using an
offset of 0, which is only correct if the function has exactly 4
regular arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85590 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-30 14:33:14 +00:00
Bob Wilson
ddb16df912
Add ARM codegen for indirect branches.
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clang/test/CodeGen/indirect-goto.c runs! (unoptimized)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85577 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-30 05:45:42 +00:00
Dan Gohman
f705adbe5e
Initial x86 support for BlockAddresses.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85557 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-30 01:28:02 +00:00
Jim Grosbach
95d9504d46
Dial back the realignment a bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85546 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-30 00:08:40 +00:00
Dan Gohman
533297b58d
Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a
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bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85517 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-29 18:10:34 +00:00
Jim Grosbach
84e58d03c9
To get more thorough testing from llc-beta nightly runs, do dynamic stack
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realignment regardless of whether it's strictly necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85476 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-29 02:41:21 +00:00
Bob Wilson
a597103c32
Revert r85346 change to control tail merging by CodeGenOpt::Level.
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I'm going to redo this using the OptimizeForSize function attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85426 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 20:46:46 +00:00
Bob Wilson
8d4de5abfa
Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate the
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opcode and operand with a tab. Check for these instructions in the usual
places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85411 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 18:26:41 +00:00
Evan Cheng
30c80211b6
fconsts and fconstd are obviously re-materializable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85410 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 18:19:56 +00:00
Jim Grosbach
ca5dfb71ba
Cleanup now that frame index scavenging via post-pass is working for ARM and Thumb2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85406 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 17:33:28 +00:00
Evan Cheng
c59420867e
Give ARMISD::EH_SJLJ_LONGJMP and EH_SJLJ_SETJMP names.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 06:55:03 +00:00
Evan Cheng
89321166da
X86 palignr intrinsics immediate field is in bits. ISel must transform it into bytes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85379 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 06:30:34 +00:00
Chris Lattner
0eeb913aa1
Previously, all operands to Constant were themselves constant.
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In the new world order, BlockAddress can have a BasicBlock operand.
This doesn't permute much, because if you have a ConstantExpr (or
anything more specific than Constant) we still know the operand has
to be a Constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85375 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 05:14:34 +00:00
Evan Cheng
39382427f1
Use fconsts and fconstd to materialize small fp constants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85362 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 01:44:26 +00:00
Evan Cheng
a1eaa3c52b
Add a second ValueType argument to isFPImmLegal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85361 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 01:43:28 +00:00
Dan Gohman
aa123224c4
Update SystemZ to use PSW following the way x86 uses EFLAGS. Besides
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eliminating a use of MVT::Flag, this is needed for an upcoming CodeGen
change.
This unfortunately requires SystemZ to switch to the list-burr
scheduler, in order to handle the physreg defs properly, however
that's what LLVM has available at this time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85357 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 00:55:57 +00:00
Bob Wilson
04ea6e5150
Add an indirect branch pattern for ARM. Testcase will be coming soon.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85355 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 00:37:03 +00:00
Chris Lattner
ab21db79ef
rename indbr -> indirectbr to appease the residents of #llvm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85351 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-28 00:19:10 +00:00
Bob Wilson
cd4f04d6bc
Record CodeGen optimization level in the BranchFolding pass so that we can
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use it to control tail merging when there is a tradeoff between performance
and code size. When there is only 1 instruction in the common tail, we have
been merging. That can be good for code size but is a definite loss for
performance. Now we will avoid tail merging in that case when the
optimization level is "Aggressive", i.e., "-O3". Radar 7338114.
Since the IfConversion pass invokes BranchFolding, it too needs to know
the optimization level. Note that I removed the RegisterPass instantiation
for IfConversion because it required a default constructor. If someone
wants to keep that for some reason, we can add a default constructor with
a hard-wired optimization level.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85346 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 23:49:38 +00:00
Bill Wendling
c872e9c07d
Add new note.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85341 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 23:30:07 +00:00
Jim Grosbach
a6a99b4e16
Enable virtual register based frame index scavenging by default for ARM & T2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85335 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 22:52:29 +00:00
Bill Wendling
5a56927345
Move and clarify note.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85334 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 22:48:31 +00:00
Jim Grosbach
3dab277857
Infrastructure for dynamic stack realignment on ARM. For now, this is off by
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default behind a command line option. This will enable better performance for
vectors on NEON enabled processors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85333 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 22:45:39 +00:00
Bill Wendling
de020736c0
Note corrected.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85332 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 22:43:24 +00:00
Bill Wendling
d8499c9b7f
Modify note.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85331 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 22:40:45 +00:00
Bill Wendling
1ff2c485e2
Add a note.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85329 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 22:34:43 +00:00
Chris Lattner
627b470981
cppbackend support for indbr
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85312 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 21:24:48 +00:00
Chris Lattner
f0dca28da7
CBE support for indbr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85311 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 21:21:06 +00:00
Johnny Chen
90d7dcfdd9
Similar to r85280, do not clear the "S" bit for RSBri and RSBrs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85299 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 20:51:49 +00:00
Johnny Chen
eadeffb306
Set condition code bits of BL and BLr9 to 0b1110 (ALways) to distinguish between
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BL_pred and BLr9_pred.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85297 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 20:45:15 +00:00
Evan Cheng
eb2f969a4d
Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85281 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 19:56:55 +00:00
Bob Wilson
f3b0d1a555
Do not clear the "S" bit for RSCri and RSCrs. They inherit from the "sI"
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instruction format that already takes care of setting this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85280 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 19:52:03 +00:00
Johnny Chen
76b39e88e4
Explicitly specify 0b00, i.e, zero rotation, as the rotate filed (Inst{11-10})
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for the r/rr fragment of the multiclass AI_unary_rrot/AI_bin_rrot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85271 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 18:44:24 +00:00
Sanjiv Gupta
e70b897126
Remove unnecessary gotos to fall-thru successors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85257 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 17:40:24 +00:00
Johnny Chen
6a3b5eec89
Test commit. Added '.' to the comment line.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85255 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 17:25:15 +00:00
Chris Lattner
1995051395
apparently the X86 JIT isn't fully contextized, it is still using getGlobalContext() :(
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85252 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 17:01:03 +00:00
Rafael Espindola
f87611272b
Correctly align double arguments in the stack.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85235 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 14:09:44 +00:00
Evan Cheng
dd22a45acc
Now VFP instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85186 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 00:20:49 +00:00
Evan Cheng
699bebac4f
Change Thumb1 and Thumb2 instructions to separate opcode from operands with a tab instead of a space.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85184 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-27 00:08:59 +00:00
Evan Cheng
162e30921d
Change ARM asm strings to separate opcode from operands with a tab instead of a space.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85178 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 23:45:59 +00:00
Victor Hernandez
046e78ce55
Remove FreeInst.
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Remove LowerAllocations pass.
Update some more passes to treate free calls just like they were treating FreeInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85176 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 23:43:48 +00:00
Bob Wilson
dda9583e51
Try to get ahead of Johnny Chen and pro-actively add some more ARM encoding
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bits. Johnny, please review -- I do not have a good track record of getting
these right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85173 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 22:59:12 +00:00
Bob Wilson
d9ecd3108f
Fix ARM encoding typo: Opcod3 is not passed to ASuI parent class.
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Patch by Johnny Chen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85169 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 22:42:13 +00:00
Bob Wilson
7e053bb33c
Add more ARM instruction encodings for 's' bit set and "rs" register encoding
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bits. Patch by Johnny Chen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85167 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 22:34:44 +00:00
Ted Kremenek
7c44beaf93
Update CMake files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85161 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 22:06:01 +00:00
Anton Korobeynikov
8b5af25a14
Revert r85134, it breaks mingw build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85138 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 18:40:24 +00:00
Sanjiv Gupta
be9e763697
Make PIC16 overlay a loadable pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85134 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 18:22:59 +00:00
David Goodwin
2e7be612d5
Break anti-dependence breaking out into its own class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85127 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 16:59:04 +00:00
Chandler Carruth
8b67f774e9
Move DataTypes.h to include/llvm/System, update all users. This breaks the last
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direct inclusion edge from System to Support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85086 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-26 01:35:46 +00:00
Jim Grosbach
dd5694203b
of -> or
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 19:14:48 +00:00
Jim Grosbach
f639e9f9e6
80-column cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85064 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 18:55:46 +00:00
Sanjiv Gupta
e1ef91d275
Reapply 85006 with a minor fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85052 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 08:14:11 +00:00
Evan Cheng
4f54c1293a
Add ARM getMatchingSuperRegClass to handle S / D / Q cross regclass coalescing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85049 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 07:53:28 +00:00
Evan Cheng
ed3ad212ec
Don't forget subreg indices when folding load / store.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85048 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 07:52:27 +00:00
Nick Lewycky
f5a86f45e7
Remove includes of Support/Compiler.h that are no longer needed after the
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VISIBILITY_HIDDEN removal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85043 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 06:57:41 +00:00
Nick Lewycky
6726b6d75a
Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.
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Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85042 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 06:33:48 +00:00
Chris Lattner
a1e1446056
this is done.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85041 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 06:17:51 +00:00
Nick Lewycky
4a134afaef
Remove ICmpInst::isSignedPredicate which was a reimplementation
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CmpInst::isSigned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85037 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25 05:20:17 +00:00
Sanjiv Gupta
ecb28f2b49
Revert back 85006 for now as it breaks PIC16 tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85008 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-24 18:19:41 +00:00
Sanjiv Gupta
209e6c69d9
Adding support for placing global objects in shared data memory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-24 18:02:44 +00:00
Evan Cheng
5a850beb2e
80 col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-24 02:07:42 +00:00
Jim Grosbach
2f1abe2dae
Restrict Thumb1 register allocation to low registers, even for instructions that
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can access the hi regs. Our prologue and epilogue code doesn't know how to
properly handle save/restore of the hi regs, so things go badly when we alloc
them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84982 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-24 00:19:24 +00:00
Jim Grosbach
7388037dd1
FIXME no longer applies. R12 and R3 are available for allocation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84977 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-23 23:07:42 +00:00
Chris Lattner
9ff9b34dd1
some stuff is done, we still have constantexpr simplification to do.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84943 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-23 07:00:55 +00:00
Evan Cheng
c869d063d4
X86 needs critical path anti-dependency breaking.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84931 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-23 05:57:35 +00:00
David Goodwin
4c3715c2e5
Allow the target to select the level of anti-dependence breaking that should be performed by the post-RA scheduler. The default is none.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84911 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 23:19:17 +00:00
Bob Wilson
bac6ed4ba4
Revert 84843. Evan, this was breaking some of the if-conversion tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84868 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 16:52:21 +00:00
Benjamin Kramer
1395d1df09
Shift art to the right to keep GCC from complaining about multi-line comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84849 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 09:28:49 +00:00
Evan Cheng
87689d3b70
Move if-conversion before post-regalloc scheduling so the predicated instruction get scheduled properly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84843 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 06:48:32 +00:00
Evan Cheng
faf93aa233
Load / store multiple was missing opportunites when the load / store bundles are at the end of the bb. Test case is already in, the bug is exposed by subsequent commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84842 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 06:47:35 +00:00
Evan Cheng
62d1723a9c
Trim more includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84832 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 05:11:00 +00:00
Evan Cheng
268c79350e
Trim include.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84831 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 05:08:49 +00:00
Chris Lattner
c5e5498058
fix warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84826 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 03:42:27 +00:00
Evan Cheng
8000c6c535
Don't generate sbfx / ubfx with negative lsb field. Patch by David Conrad.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84813 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 00:40:00 +00:00
Anton Korobeynikov
f32df4ce3e
Use special DAG-to-DAG preprocessing to allow mem-mem instructions to be selected.
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Yay for ASCII graphics!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84808 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-22 00:16:00 +00:00
Jim Grosbach
41fff8c19a
Missing piece of the ARM frame index post-scavenging conditionalization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84798 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 23:40:56 +00:00
Jim Grosbach
1d6827bbe9
Conditionalize ARM/T2 frame index post-scavenging while working out fixes
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for a few bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84791 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 22:59:24 +00:00
Bob Wilson
20d108140e
Most of the NEON shuffle instructions do not support 64-bit element types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84785 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 21:36:27 +00:00
Anton Korobeynikov
a55d33d96e
Revert r84764, it breaks mingw build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84783 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 21:15:18 +00:00
Jim Grosbach
65b7f3af76
Improve handling of immediates by splitting 32-bit immediates into two 16-bit
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immediate operands when they will fit into the using instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84778 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 20:44:34 +00:00
Anton Korobeynikov
a91f4c561e
Add DAG printing for RMW stuff debugging
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84776 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 19:18:28 +00:00
Anton Korobeynikov
83fceb9481
RMW preprocessing stuff was incorrect. Grab the stuff from x86 backend and disable some tests until it will be clever enough to handle them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84775 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 19:17:55 +00:00
Anton Korobeynikov
90593d2e1f
Implement branch folding
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84774 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 19:17:18 +00:00
Anton Korobeynikov
3926fb63c2
Cosmetic changes, no functionality changes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84773 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 19:16:49 +00:00
Bob Wilson
b27b51aaa6
Fix NEON VST2LN instruction encoding.
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Patch by Johnny Chen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 17:54:01 +00:00
Bob Wilson
407d57489f
Revert 84732. It was the wrong fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84766 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 17:52:34 +00:00
Sanjiv Gupta
36a9c8f0b3
Build shared lib instead of an archive.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 17:27:23 +00:00
Sanjiv Gupta
4e4bba5c80
Add a pass to overlay pic16 data sections for function frame and automatic
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variables. This pass can be invoked by llvm-ld or opt to traverse over the call graph
to detect what function frames and their automatic variables can be overlaid.
Currently this builds an archive , but needs to be changed to a loadable module.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84753 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 10:42:44 +00:00
Evan Cheng
2095659a85
Match more patterns to movt.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84751 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 08:15:52 +00:00
Chris Lattner
1ce75ef5ef
tidy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84738 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 04:10:24 +00:00
Bob Wilson
b3c8359360
Fix some more NEON instruction encoding problems.
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Thanks to Johnny Chen for discovering the problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84732 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 02:27:20 +00:00
Bob Wilson
507df402b0
Leave some NEON instruction encoding bits unspecified instead of setting
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a default value of zero. This is important for decoding the instructions.
Patch by Johnny Chen, with some changes from me, too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84730 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 02:15:46 +00:00
Chris Lattner
7d26443bb7
IPSCCP is missing stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84725 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 01:10:37 +00:00
Anton Korobeynikov
12ddf139ce
Add note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84713 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 00:14:15 +00:00
Anton Korobeynikov
514200d5ef
Be crazy and assert in case of unsupported modifier passed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84712 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 00:13:58 +00:00
Anton Korobeynikov
0a2e206b40
Handle external symbols
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84711 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 00:13:42 +00:00
Anton Korobeynikov
8ecaf237e0
Distinguish between pcrel imm operands and 'normal' ones. Fix fixes gross weirdness of asmprinting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84710 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 00:13:25 +00:00
Anton Korobeynikov
dc2165e18e
Add basic block operands & jump kinds
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84709 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21 00:13:05 +00:00