Commit Graph

11916 Commits

Author SHA1 Message Date
Nate Begeman
b5f8e62d71 Remove a now unused statistic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24720 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:56:16 +00:00
Nate Begeman
a07da92624 Use the new predicate support that Evan Cheng added to remove some code
from the DAGToDAG cpp file.  This adds pattern support for vector and
scalar fma, which passes test/Regression/CodeGen/PowerPC/fma.ll, and
does the right thing in the presence of -disable-excess-fp-precision.

Allows us to match:
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = mul <4 x float> %tmp1, %tmp1
  %tmp3 = add <4 x float> %tmp2, %tmp1
  store <4 x float> %tmp3, <4 x float> *%a
  ret void
}

As:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vmaddfp v0, v0, v0, v0
        stvx v0, r2, r3
        blr

Or, with llc -disable-excess-fp-precision,

_foo:
        li r2, 0
        lvx v0, r2, r3
        vxor v1, v1, v1
        vmaddfp v1, v0, v0, v1
        vaddfp v0, v1, v0
        stvx v0, r2, r3
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24719 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:54:33 +00:00
Evan Cheng
74164098ff Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo 12/14/2005 hbd failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24717 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:28:18 +00:00
Evan Cheng
8c75ef9228 Added predicate !NoExcessFPPrecision to FMADD, FMADDS, FMSUB, and FMSUBS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24716 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:07:12 +00:00
Evan Cheng
58e84a69f5 Added support to specify predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24715 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:02:59 +00:00
Evan Cheng
2b52426441 Fixed extload type profile. The 4th operand is a ValueType node with type
OtherVT, it cannot be compare to type of 1st operand which is an integer type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24713 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 19:40:54 +00:00
Chris Lattner
d4771840fd When folding loads into ops, immediately replace uses of the op with the
load.  This reduces number of worklist iterations and avoid missing optimizations
depending on folding of things into sext_inreg nodes (which aren't supported by
all targets).
Tested by Regression/CodeGen/X86/extend.ll:test2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24712 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 19:25:30 +00:00
Chris Lattner
ad25d4e2df Fix the (zext (zextload)) case to trigger, similarly for sign extends.
Allow (zext (truncate)) to apply after legalize if the target supports
AND (which all do).

This compiles
short %foo() {
        %tmp.0 = load ubyte* %X         ; <ubyte> [#uses=1]
        %tmp.3 = cast ubyte %tmp.0 to short             ; <short> [#uses=1]
        ret short %tmp.3
}

to:
_foo:
        movzbl _X, %eax
        ret

instead of:

_foo:
        movzbl _X, %eax
        movzbl %al, %eax
        ret

thanks to Evan for pointing this out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24709 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 19:05:06 +00:00
Chris Lattner
6860f6a01c Fix Transforms/ScalarRepl/2005-12-14-UnionPromoteCrash.ll, a crash on undefined
behavior in 126.gcc on big-endian systems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24708 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 17:23:59 +00:00
Chris Lattner
00cb95c9be Fix a miscompilation in crafty due to a recent patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24706 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 07:58:38 +00:00
Evan Cheng
7a7e8375a9 Added sext and zext patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24705 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 02:22:27 +00:00
Evan Cheng
3d2331dba7 Added sextld + zextld DAG nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24703 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 02:21:01 +00:00
Evan Cheng
110dec2000 Fold (zext (load x) to (zextload x).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24702 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 02:19:23 +00:00
Nate Begeman
3fb6877cb4 Add support for fmul node of type v4f32.
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = mul <4 x float> %tmp1, %tmp1
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

Is selected to:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vxor v1, v1, v1
        vmaddfp v0, v0, v0, v1
        stvx v0, r2, r3
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24701 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 00:34:09 +00:00
Nate Begeman
993aeb2ed9 Prepare support for AltiVec multiply, divide, and sqrt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24700 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 22:55:22 +00:00
Reid Spencer
328ead9fce Adjust the constructor to the Linker class to take an argument that names
the module being constructed. This is used to correctly name the module.
Previously the name of the linker tool was used which produces confusing
output when the module identifier is used in an error message.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24699 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 20:00:37 +00:00
Reid Spencer
2f1890792c Improve ResolveFunctions to:
a) use better local variable names (OldMT -> OldFT) where "M" is used to
   mean "Function" (perhaps it was previously "Method"?)
b) print out the module identifier in a warning message so that it is
   possible to track down in which module the error occurred.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24698 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 19:56:51 +00:00
Chris Lattner
86cb643801 Don't lump the filename and working dir together
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24697 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 17:40:33 +00:00
Evan Cheng
85dd889ed6 Add load + store folding srl and sra patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24696 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 07:24:22 +00:00
Chris Lattner
d1239b7c69 Use the shared asmprinter code for printing special llvm globals
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24695 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 06:32:50 +00:00
Chris Lattner
ed13893ff7 Add a couple more fields, move ctor init list to .cpp file, add support
for emitting the ctor/dtor list for common targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24694 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 06:32:10 +00:00
Chris Lattner
a046e0d79f Add ELF and darwin support for static ctors and dtors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24693 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 04:53:51 +00:00
Chris Lattner
deea416570 reindent a loop, unswitch a loop. No functionality changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24692 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 04:33:58 +00:00
Nate Begeman
d7d746f603 Lowering constant pool entries on ppc exposed a bug in the recently added
ConstantVec legalizing code, which would return constantpool nodes that
were not of the target's pointer type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24691 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 03:03:23 +00:00
Evan Cheng
c937ffafba Beautify a few patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24690 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 02:40:18 +00:00
Evan Cheng
763b029b28 Some shl patterns which do load + store folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24689 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 02:34:51 +00:00
Evan Cheng
605c415046 A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 addr:$src). Only to improve readibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24688 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 01:57:51 +00:00
Evan Cheng
0ef3a77bdf Add and, or, and xor patterns which fold load + stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24687 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 01:41:36 +00:00
Evan Cheng
6cad276c90 Add inc + dec patterns which fold load + stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24686 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 01:02:47 +00:00
Evan Cheng
5ce4edb967 Add neg and not patterns which fold load + stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24685 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:54:44 +00:00
Evan Cheng
5a38e0210d Missed a couple redundant explicit type casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24684 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:25:07 +00:00
Evan Cheng
9b6b642647 Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24683 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:14:11 +00:00
Evan Cheng
b3558540b6 * Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands.
This enables the removal of some explicit type casts.
* Rename immZExt8 to i16ZExt8 as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24682 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13 00:01:09 +00:00
Evan Cheng
f281e02cbd Add some integer mul patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24681 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 23:47:46 +00:00
Chris Lattner
ac22c83e68 Accept and ignore prefetches for now
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24678 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 22:51:16 +00:00
Chris Lattner
58f7963b8b Fix CodeGen/Generic/2005-12-12-ExpandSextInreg.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24677 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 22:27:43 +00:00
Evan Cheng
d160d48a2b Add some sub patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24675 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 21:54:05 +00:00
Evan Cheng
e5280536a3 When SelectLEAAddr() fails, it shouldn't cause the side effect of having the
base or index operands being selected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24674 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 21:49:40 +00:00
Evan Cheng
cbd6ed4d6b For ISD::RET, if # of operands >= 2, try selection the real data dep. operand
first before the chain.
e.g.
int X;

int foo(int x)
{
  x += X + 37;
  return x;
}

If chain operand is selected first, we would generate:
	movl X, %eax
	movl 4(%esp), %ecx
	leal 37(%ecx,%eax), %eax

rather than
	movl $37, %eax
	addl 4(%esp), %eax
	addl X, %eax

which does not require %ecx. (Due to ADD32rm not matching.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24673 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 20:32:18 +00:00
Andrew Lenharth
110f2243fc fix FP selects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24672 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 20:30:09 +00:00
Chris Lattner
a763969837 remove some never-completed and now-obsolete code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24671 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 20:12:20 +00:00
Evan Cheng
ee93f9db87 Add a few more add / store patterns. e.g. ADD32mi8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24670 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 19:45:23 +00:00
Andrew Lenharth
361f45a557 restore a more restricted select
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24668 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 17:43:52 +00:00
Chris Lattner
a188894d67 Implement a little hack for parity with GCC on crafty. This speeds up
186.crafty by about 16% (from 15.109s to 13.045s) on my system.

This turns allocas with unions/casts into scalars.  For example crafty has
something like this:

    union doub {
      unsigned short i[4];
      long long d;
    };
int f(long long a) {
  return ((union doub){.d=a}).i[1];
}

Instead of generating loads and stores to an alloca, we now promote the
whole thing to a scalar long value.

This implements: Transforms/ScalarRepl/AggregatePromote.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24667 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 07:19:13 +00:00
Chris Lattner
d2c339cca7 Fix typo :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24664 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 18:43:13 +00:00
Chris Lattner
3802c2552f Minor tweak to get isel opt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24663 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 09:05:13 +00:00
Chris Lattner
3aed79eadb add selectcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24662 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 08:35:54 +00:00
Chris Lattner
d717b19933 Remove type casts that are no longer needed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24661 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 07:45:47 +00:00
Chris Lattner
84384546e2 Realize the constant pool & global addrs must always be ptr type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24660 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 07:45:04 +00:00
Chris Lattner
e54645a6fb Fix the JIT failures from last night.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24659 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 07:37:41 +00:00
Andrew Lenharth
e41419f51e FP select improvements (and likely breakage), oh and crazy people might want to *return* floating point values. Don't see why myself
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24658 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11 03:54:31 +00:00
Nate Begeman
28a6b02626 Add support for TargetConstantPool nodes to the dag isel emitter, and use
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24657 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 02:36:00 +00:00
Evan Cheng
b612ff9569 Use SDTCisPtrTy type property for store address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24656 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 01:59:36 +00:00
Evan Cheng
b51a059b2c * Added X86 store patterns.
* Added X86 dec patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24654 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 00:48:20 +00:00
Evan Cheng
7038daf342 Added new getNode and getTargetNode variants for X86 stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24653 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 00:37:58 +00:00
Nate Begeman
0976122abc Add support patterns to many load and store instructions which will
hopefully use patterns in the near future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24651 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 23:54:18 +00:00
Chris Lattner
d8fe3b3272 Add SDTCisPtrTy and use it for loads, to indicate that the operand of a load
must be a pointer.  This removes a type check out of the code generated by
tblgen for load matching.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24650 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 22:58:42 +00:00
Evan Cheng
ab24ed2a32 Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24648 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 22:48:48 +00:00
Chris Lattner
42a80fedad Avoid emitting two tabs when switching to a named section
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24646 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 19:28:49 +00:00
Chris Lattner
646f7afb79 Teach the PPC backend about the ctor and dtor list when not using __main and
linking the entire program into one bc file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24645 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 18:24:29 +00:00
Chris Lattner
5e3c5b4e13 Teach legalize how to promote sext_inreg to fix a problem Andrew pointed
out to me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24644 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 17:32:47 +00:00
Andrew Lenharth
dd3ccde9ea it helps if your conditionals are not reversed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24641 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 00:45:42 +00:00
Chris Lattner
c78b0b740b improve code insertion in two ways:
1. Only forward subst offsets into loads and stores, not into arbitrary
   things, where it will likely become a load.
2. If the source is a cast from pointer, forward subst the cast as well,
   allowing us to fold the cast away (improving cases when the cast is
   from an alloca or global).

This hasn't been fully tested, but does appear to further reduce register
pressure and improve code.  Lets let the testers grind on it a bit. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24640 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 08:00:12 +00:00
Chris Lattner
62c08dd4a1 Add another important case we miss
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24639 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 07:13:28 +00:00
Evan Cheng
f20da7e1a7 Added support for ComplexPattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24638 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 04:28:48 +00:00
Evan Cheng
670fd8f8dd Added explicit type field to ComplexPattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24637 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:15:07 +00:00
Evan Cheng
ec693f77c0 * Added intelligence to X86 LEA addressing mode matching routine so it returns
false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24635 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:01:35 +00:00
Nate Begeman
cc827e60b6 Fix a crash where ConstantVec nodes were being generated with the wrong
type when the target did not support them.  Also teach Legalize how to
expand ConstantVecs.

This allows us to generate

_test:
        lwz r2, 12(r3)
        lwz r4, 8(r3)
        lwz r5, 4(r3)
        lwz r6, 0(r3)
        addi r2, r2, 4
        addi r4, r4, 3
        addi r5, r5, 2
        addi r6, r6, 1
        stw r2, 12(r3)
        stw r4, 8(r3)
        stw r5, 4(r3)
        stw r6, 0(r3)
        blr

For:

void %test(%v4i *%P) {
        %T = load %v4i* %P
        %S = add %v4i %T, <int 1, int 2, int 3, int 4>
        store %v4i %S, %v4i * %P
        ret void
}

On PowerPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24633 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07 19:48:11 +00:00
Chris Lattner
cc2210b4fa Only transform (sext (truncate x)) -> (sextinreg x) if before legalize or
if the target supports the resultant sextinreg


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24632 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07 18:02:05 +00:00
Chris Lattner
e80242a948 X86 doesn't support sextinreg for 8-bit things either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24631 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07 17:59:14 +00:00
Chris Lattner
b14ab8a10d Teach the dag combiner to turn a truncate/sign_extend pair into a sextinreg
when the types match up.  This allows the X86 backend to compile:

sbyte %toggle_value(sbyte* %tmp.1) {
        %tmp.2 = load sbyte* %tmp.1
        ret sbyte %tmp.2
}

to this:

_toggle_value:
        mov %EAX, DWORD PTR [%ESP + 4]
        movsx %EAX, BYTE PTR [%EAX]
        ret

instead of this:

_toggle_value:
        mov %EAX, DWORD PTR [%ESP + 4]
        movsx %EAX, BYTE PTR [%EAX]
        movsx %EAX, %AL
        ret

noticed in Shootout/objinst.

-Chris


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24630 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07 07:11:03 +00:00
Andrew Lenharth
bbe1225bf4 fix divide and remainder
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24628 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 23:27:39 +00:00
Chris Lattner
85961d5ec1 Silence another annoying GCC warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24627 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 20:56:18 +00:00
Andrew Lenharth
f88471ded7 more decent branches for FP. I might have to make some intermediate nodes to actually be able to use the DAG for FPcmp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24625 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 20:43:30 +00:00
Andrew Lenharth
cfb2815695 OK, this does wonders for broken stuff
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24624 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 20:40:34 +00:00
Sumant Kowshik
8a3802d5b2 Collapsing node if variable length struct with final field of length zero
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24621 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 18:04:30 +00:00
Chris Lattner
ed74a4ef3b Fix test/Regression/Linker/2005-12-06-AppendingZeroLengthArrays.ll and
PR662.  Thanks to Markus for providing me with a ton of files to
reproduce the problem!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24619 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 17:30:58 +00:00
Nate Begeman
8cfa57b1b4 Teach the SelectionDAG ISel how to turn ConstantPacked values into
constant nodes with vector types.  Also teach the asm printer how to print
ConstantPacked constant pool entries.  This allows us to generate altivec
code such as the following, which adds a vector constantto a packed float.

LCPI1_0:  <4 x float> < float 0.0e+0, float 0.0e+0, float 0.0e+0, float 1.0e+0 >
        .space  4
        .space  4
        .space  4
        .long   1065353216      ; float 1
        .text
        .align  4
        .globl  _foo
_foo:
        lis r2, ha16(LCPI1_0)
        la r2, lo16(LCPI1_0)(r2)
        li r4, 0
        lvx v0, r4, r2
        lvx v1, r4, r3
        vaddfp v0, v1, v0
        stvx v0, r4, r3
        blr

For the llvm code:

void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = add <4 x float> %tmp1, < float 0.0, float 0.0, float 0.0, float 1.0 >
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24616 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 06:18:55 +00:00
Chris Lattner
4172b10ca1 Use new PPC-specific nodes to represent shifts which require the 6-bit
amount handling that PPC provides.  These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits.  This fixes a miscompilation of crafty with
the new front-end.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24615 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 02:10:38 +00:00
Andrew Lenharth
eda80a0dec added instructions with inverted immediates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24614 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 00:33:53 +00:00
Andrew Lenharth
8a3a5fc9ba yea, it helps to have your path set right when testing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24613 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:41:45 +00:00
Andrew Lenharth
5de36f95da These never trigger, but whatever
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24612 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:19:44 +00:00
Evan Cheng
8d202230b4 Remove unnecessary let hasCtrlDep=1 now it can be inferred.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24611 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:09:43 +00:00
Andrew Lenharth
7962065fdb move this over to the dag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24609 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 20:50:53 +00:00
Chris Lattner
e08dc62b1a getRawValue zero extens for unsigned values, use getsextvalue so that we
know that small negative values fit into the immediate field of addressing
modes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24608 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 18:23:57 +00:00
Andrew Lenharth
b457a93123 fix constant pool loads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24607 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 17:51:02 +00:00
Chris Lattner
c88d8e944d Fix the #1 code quality problem that I have seen on X86 (and it also affects
PPC and other targets).  In a particular, consider code like this:

struct Vector3 { double x, y, z; };
struct Matrix3 { Vector3 a, b, c; };
double dot(Vector3 &a, Vector3 &b) {
   return a.x * b.x  +  a.y * b.y  +  a.z * b.z;
}
Vector3 mul(Vector3 &a, Matrix3 &b) {
   Vector3 r;
   r.x = dot( a, b.a );
   r.y = dot( a, b.b );
   r.z = dot( a, b.c );
   return r;
}
void transform(Matrix3 &m, Vector3 *x, int n) {
   for (int i = 0; i < n; i++)
      x[i] = mul( x[i], m );
}

we compile transform to a loop with all of the GEP instructions for indexing
into 'm' pulled out of the loop (9 of them).  Because isel occurs a bb at a time
we are unable to fold the constant index into the loads in the loop, leading to
PPC code that looks like this:

LBB3_1: ; no_exit.preheader
        li r2, 0
        addi r6, r3, 64        ;; 9 values live across the loop body!
        addi r7, r3, 56
        addi r8, r3, 48
        addi r9, r3, 40
        addi r10, r3, 32
        addi r11, r3, 24
        addi r12, r3, 16
        addi r30, r3, 8
LBB3_2: ; no_exit
        lfd f0, 0(r30)
        lfd f1, 8(r4)
        fmul f0, f1, f0
        lfd f2, 0(r3)        ;; no constant indices folded into the loads!
        lfd f3, 0(r4)
        lfd f4, 0(r10)
        lfd f5, 0(r6)
        lfd f6, 0(r7)
        lfd f7, 0(r8)
        lfd f8, 0(r9)
        lfd f9, 0(r11)
        lfd f10, 0(r12)
        lfd f11, 16(r4)
        fmadd f0, f3, f2, f0
        fmul f2, f1, f4
        fmadd f0, f11, f10, f0
        fmadd f2, f3, f9, f2
        fmul f1, f1, f6
        stfd f0, 0(r4)
        fmadd f0, f11, f8, f2
        fmadd f1, f3, f7, f1
        stfd f0, 8(r4)
        fmadd f0, f11, f5, f1
        addi r29, r4, 24
        stfd f0, 16(r4)
        addi r2, r2, 1
        cmpw cr0, r2, r5
        or r4, r29, r29
        bne cr0, LBB3_2 ; no_exit

uh, yuck.  With this patch, we now sink the constant offsets into the loop, producing
this code:

LBB3_1: ; no_exit.preheader
        li r2, 0
LBB3_2: ; no_exit
        lfd f0, 8(r3)
        lfd f1, 8(r4)
        fmul f0, f1, f0
        lfd f2, 0(r3)
        lfd f3, 0(r4)
        lfd f4, 32(r3)       ;; much nicer.
        lfd f5, 64(r3)
        lfd f6, 56(r3)
        lfd f7, 48(r3)
        lfd f8, 40(r3)
        lfd f9, 24(r3)
        lfd f10, 16(r3)
        lfd f11, 16(r4)
        fmadd f0, f3, f2, f0
        fmul f2, f1, f4
        fmadd f0, f11, f10, f0
        fmadd f2, f3, f9, f2
        fmul f1, f1, f6
        stfd f0, 0(r4)
        fmadd f0, f11, f8, f2
        fmadd f1, f3, f7, f1
        stfd f0, 8(r4)
        fmadd f0, f11, f5, f1
        addi r6, r4, 24
        stfd f0, 16(r4)
        addi r2, r2, 1
        cmpw cr0, r2, r5
        or r4, r6, r6
        bne cr0, LBB3_2 ; no_exit

This is much nicer as it reduces register pressure in the loop a lot.  On X86,
this takes the function from having 9 spilled registers to 2.  This should help
some spec programs on X86 (gzip?)

This is currently only enabled with -enable-gep-isel-opt to allow perf testing
tonight.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24606 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 07:10:48 +00:00
Chris Lattner
30614675f4 Add a flag to Module::getGlobalVariable to allow it to return vars with
internal linkage.

Patch provided by Evan Jones, thanks!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24604 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 05:30:21 +00:00
Chris Lattner
6b44ba2803 Wrap a long line, never internalize llvm.used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24602 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 05:07:38 +00:00
Chris Lattner
3d36a9f6f4 Several things:
1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly.  The port number really
   *is* a 16-bit value, but the patterns should only match if the number
   is 0-255.  Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
   i8, not an i16 as they were believed to be before.  This previous fib
   stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24599 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:40:25 +00:00
Chris Lattner
68bfd9c1e8 On some targets (e.g. X86), shift amounts are not the same as the value
being shifted.  Don't assume they are.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24598 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:37:26 +00:00
Chris Lattner
b5d01436e3 Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24595 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:34:29 +00:00
Chris Lattner
bd05982b48 Add some explicit type casts so that tblgen knows the type of the shift
amount, which is not necessarily the same as the type being shifted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24594 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:34:05 +00:00
Chris Lattner
bead6612a5 The basic fneg cases are already autogen'd
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24592 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 19:04:38 +00:00
Chris Lattner
937a79dbe3 Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen
improvements.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24591 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 19:01:59 +00:00
Chris Lattner
60a4ab2d5c Finish moving uncond br over to .td file, remove from .cpp file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24590 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 18:48:01 +00:00
Chris Lattner
1e48478557 Define BR in the .td file now that Evan made tblgen smarter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24589 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 18:42:54 +00:00
Evan Cheng
d35b8c1adb Added isel patterns for RET, JMP, and WRITEPORT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24588 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 08:19:43 +00:00
Evan Cheng
f8ac814957 * Added instruction property hasCtrlDep for those which r/w control-flow
chains.
* Added DAG node property SDNPHasChain for nodes which r/w control-flow
  chains.
* Renamed SDTVT to SDTOther.
* Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT.
* Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24586 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 08:13:17 +00:00
Chris Lattner
df65de42cf Fix PR672 another way which should be more robust
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24585 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 06:03:50 +00:00