6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-23 01:30:19 +00:00
Code Issues Projects Releases Wiki Activity
76,504 Commits 39 Branches 0 Tags 277 MiB
90b6e346ee
Commit Graph

50120 Commits

Author SHA1 Message Date
Owen Anderson
2dafe200ca Remove extraneous commit garbage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140581 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 23:14:02 +00:00
Andrew Trick
7d11bd850f LSR cost metric minor fix and verification. 
The minor bug heuristic was noticed by inspection. I added the
isLoser/isValid helpers because they will become more
important with subsequent checkins.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140580 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 23:11:04 +00:00
Akira Hatanaka
f40de9d287 Set register class of a register according to value of HasMips64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140570 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 21:55:17 +00:00
Akira Hatanaka
8b4198da9d Define variable HasMips64 in MipsTargetLowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140569 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 21:47:02 +00:00
Akira Hatanaka
09dd60feef In single float mode, double precision FP arguments are passed in integer 
registers, so there is no need to check here.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140568 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 21:37:50 +00:00
Owen Anderson
0afa0094af ASR #32 is not allowed on Thumb2 USAT and SSAT instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140560 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 21:06:22 +00:00
Eli Friedman
46cb5afdcd Enhance alias analysis for atomic instructions a bit. Upgrade a couple alias-analysis tests to the new atomic instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140557 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 20:15:28 +00:00
Justin Holewinski
22d54da918 PTX: Fix memcpy intrinsic to handle 64-bit pointers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140556 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 19:19:48 +00:00
Justin Holewinski
bc97f4402b PTX: Implement PTXSelectionDAGInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140549 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 18:57:27 +00:00
Justin Holewinski
63bce90c0d PTX: Implement ISD::ANY_EXTEND 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140548 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 18:57:24 +00:00
Justin Holewinski
63602ed876 PTX: Fix detection of stack load/store vs. global load/store, as well as fix the 
printing of local offsets

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140547 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 18:57:22 +00:00
James Molloy
439780eeae Fix emission of debug data for global variables. getContext() on DIGlobalVariables is not valid any more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140539 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 17:40:42 +00:00
Justin Holewinski
22f3c59ec3 PTX: SM > 2.0 implies +double 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140536 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 16:20:36 +00:00
Justin Holewinski
58788503b8 PTX: Fix some lingering issues with stack allocation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140535 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 16:20:34 +00:00
Justin Holewinski
d5c3920f8d PTX: Split up the TableGen instruction definitions into logical units 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140534 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 16:20:31 +00:00
Justin Holewinski
c1d8fbd41a PTX: Unify handling of loads/stores 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140533 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 16:20:28 +00:00
Justin Holewinski
6b8990df42 PTX: Handle FrameIndex nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140532 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 16:20:25 +00:00
David Meyer
8f418b11d2 PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140516 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 06:13:20 +00:00
Craig Topper
100d86ada5 Fix VEX decoding in i386 mode. Fixes PR11008. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140515 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 05:12:43 +00:00
Jakob Stoklund Olesen
c291e2f578 Add target hook for pseudo instruction expansion. 
Many targets use pseudo instructions to help register allocation.  Like
the COPY instruction, these pseudos can be expanded after register
allocation.  The early expansion can make life easier for PEI and the
post-ra scheduler.

This patch adds a hook that is called for all remaining pseudo
instructions from the ExpandPostRAPseudos pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140472 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-25 19:21:35 +00:00
Nadav Rotem
0eba4fe292 [vector-select] Address one of the issues in pr10902. EXTRACT_VECTOR_ELEMENT 
SDNodes may return values which are wider than the incoming element types. In
this patch we fix the integer promotion of these nodes.

Fixes spill-q.ll when running -promote-elements.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140471 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-25 18:59:42 +00:00
Jakob Stoklund Olesen
74e2d6ea66 Clean up code after renaming LowerSubregs -> ExpandPostRAPseudos. 
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140470 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-25 16:46:08 +00:00
Jakob Stoklund Olesen
fb96574fca Rename LowerSubregs to ExpandPostRAPseudos. 
I'll fix the file contents in the next commit.

This pass is currently expanding the COPY and SUBREG_TO_REG pseudos. I
am going to add a hook so targets can expand more pseudo-instructions
after register allocation.

Many targets have pseudo-instructions that assist the register
allocator.  They can be expanded after register allocation, before PEI
and PostRA scheduling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140469 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-25 16:46:00 +00:00
Benjamin Kramer
dd16400033 Sort CMakeLists.txt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140465 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-24 22:06:35 +00:00
Nadav Rotem
17e76bda55 Implement Duncan's suggestion to use the result of getSetCCResultType if it is legal 
(this is always the case for scalars), otherwise use the promoted result type.

Fix test/CodeGen/X86/vsplit-and.ll when promote-elements is enabled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140464 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-24 19:48:19 +00:00
Nadav Rotem
0d5357e3d5 [Vector-Select] Address one of the problems in 10902. 
When generating the trunc-store of i1's, we need to use the vector type and not
the scalar type.

This patch fixes the assertion in CodeGen/Generic/bool-vector.ll when
running with -promote-elements.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140463 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-24 18:32:19 +00:00
Akira Hatanaka
8aa4b4cb6f Add .td file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140446 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-24 01:40:18 +00:00
Akira Hatanaka
95934844e3 Preparation for adding simple Mips64 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140443 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-24 01:34:44 +00:00
Jakob Stoklund Olesen
51f0c76419 Only run MF.verify() with EXPENSIVE_CHECKS=1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140441 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-24 01:11:19 +00:00
Daniel Dunbar
bb0a6126cf sys::Process: Add a SetWorkingDirectory method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140433 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 23:23:36 +00:00
Andrew Trick
b5b7c96ce4 LSR minor bug fix in RateRegister. 
No test case. Noticed by inspection and I doubt it ever affects the
outcome of the overall heuristic, let alone final codegen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140431 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 23:05:19 +00:00
Jakob Stoklund Olesen
5adc07ebe8 Verify that terminators follow non-terminators. 
This exposes a -segmented-stacks bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140429 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 22:45:39 +00:00
Eli Friedman
bde81d5be9 PR10998: It is not legal to sink an instruction past the terminator of a block; make sure we don't do that. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140428 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 22:41:57 +00:00
Owen Anderson
4d2a00147d Teach the Thumb2 AsmParser to accept pre-indexed loads/stores with an offset of #-0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140426 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 22:25:02 +00:00
Jakob Stoklund Olesen
11ebe3d7c1 Also match negative offsets for addrmode3 and addrmode5. 
Math is hard, and isScaledConstantInRange() always returned false for
negative constants.  It was doing unsigned division of negative numbers
before casting back to signed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140425 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 22:10:33 +00:00
Owen Anderson
4a713570b6 Add more fixed bits to USAT16 encoding to filter out incorrect decodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140422 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 21:57:50 +00:00
Owen Anderson
0781c1f700 Post-index loads/stores in still need to print the post-indexed immediate, even if it's zero, to distinguish them from non-post-indexed instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140420 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 21:26:40 +00:00
Owen Anderson
31d485ec9a Reapply r140412 (Thumb2 reg-reg loads cannot target SP or PC), with invalid testcases updated. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140415 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 21:07:25 +00:00
Owen Anderson
df0caeb6ec Revert r140412. This affects more instructions than intended. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140413 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 21:02:01 +00:00
Owen Anderson
d256056581 Thumb2 register-shifted-register loads cannot target the PC or the SP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140412 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 21:00:32 +00:00
Akira Hatanaka
45b73e2f3f Implement N32/64 calling convention. Patch by Liu. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140401 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 19:08:15 +00:00
Akira Hatanaka
792016bc22 Make FGR64RegisterClass available if target is Mips64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140397 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 18:28:39 +00:00
Akira Hatanaka
b1dcff0fe3 Add definitions of 64-bit register files. Add code for returning Mips64's sets of 
callee-saved registers and reserved registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140395 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 18:11:56 +00:00
Justin Holewinski
a5745569b6 PTX: Fix parameter order bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140394 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 17:59:11 +00:00
Wesley Peck
2e3441e5e5 Fix a couple of 80 column violations. 
patch contributed by Jia Liu!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140391 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 17:24:41 +00:00
Justin Holewinski
dc0baf9b40 PTX: Cleanup unused code in PTXMachineFunctionInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140390 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 17:15:53 +00:00
Justin Holewinski
d7070fe6df PTX: Fix another 80-column violation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140387 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 16:50:35 +00:00
Justin Holewinski
75d809599b PTX: Handle function call return values 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140386 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 16:48:41 +00:00
Richard Osborne
0353dab90e Fix 80 column violations. 
Original patch by Liu.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140385 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 16:28:10 +00:00
Duncan Sands
04aa4aee89 Implement Chris's suggestion of legalizing the various SSE and AVX 
hadd/hsub intrinsics into the new fhadd/fhsub X86 node.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140383 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 16:10:22 +00:00
Justin Holewinski
e953a64cb5 PTX: Start fixing function calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140378 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 14:31:12 +00:00
Justin Holewinski
d3dec06447 PTX: Remove PTX calling convention files 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140377 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 14:18:27 +00:00
Justin Holewinski
1cde87d202 [PATCH 2/2] PTXInstrInfo.td PTXIntrinsicInstrInfo.td 80 columns 
From 5936c03172e251f12a0332d1033de5718e6e2091 Mon Sep 17 00:00:00 2001
---
 lib/Target/PTX/PTXInstrInfo.td          |  165 ++++++++++++++++++++----------
 lib/Target/PTX/PTXIntrinsicInstrInfo.td |   88 +++++++++++------
 2 files changed, 167 insertions(+), 86 deletions(-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140376 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 14:18:24 +00:00
Justin Holewinski
27f08fc619 PTX: Generalize handling of .param types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140375 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 14:18:22 +00:00
Justin Holewinski
04b5ebc74c PTX: Cleanup unused code in the PTXMFInfoExtract pass 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140374 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 14:18:19 +00:00
Duncan Sands
4c19e12d28 Tweak the handling of MERGE_VALUES nodes: remove the need for 
DecomposeMERGE_VALUES to "know" that results are legalized in
a particular order, by passing it the number of the result
being legalized (the type legalization core provides this, it
just needs to be passed on).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140373 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 13:59:22 +00:00
Nadav Rotem
c56d65f63c Vector-Select: Address one of the problems in pr10902. Add handling for the 
integer-promotion of CONCAT_VECTORS.

Test: test/CodeGen/X86/widen_shuffle-1.ll

This patch fixes the above tests (when running in with -promote-elements).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140372 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 09:33:24 +00:00
Akira Hatanaka
aaa9fc2e37 Add definitions of 64-bit int registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140366 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 02:33:15 +00:00
Akira Hatanaka
373e3a4091 Do not rely on the enum values of argument registers A0-A3 being consecutive. 
Define function getNextIntArgReg, which takes a register as a parameter and
returns the next O32 argument integer register. Use this function when double
precision floating point arguments are passed in two integer registers.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140363 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 00:58:33 +00:00
Eli Friedman
7666c7e4d2 PR10989: Don't print .hidden on Windows. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140356 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-23 00:13:02 +00:00
Eli Friedman
a6176adc8a PR10991: make fast-isel correctly check whether accessing a global through an alias involves thread-local storage. (I'm not entirely sure how this is supposed to work, but this patch makes fast-isel consistent with the normal isel path.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140355 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 23:41:28 +00:00
Akira Hatanaka
40eda4626d Make changes in instruction and pattern definitions so that tablegen does not 
complain it cannot infer types in patterns. Fix a mistake in definition of 
SDT_MipsExtractElementF64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140354 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 23:31:54 +00:00
Owen Anderson
db01cdd06b Add new files to CMake. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140352 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 23:20:48 +00:00
Dan Gohman
7b316c9327 Fix SimplifySelectCC to add newly created nodes to the DAGCombiner 
worklist, as it may be possible to perform further optimization on them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140349 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 23:01:29 +00:00
Jakob Stoklund Olesen
4bd89873be Add support for GR32 <-> FR32 cross class copies. 
We already support GR64 <-> VR128 copies.  All of these copies break
partial register dependencies by zeroing the high part of the target
register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140348 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 22:45:24 +00:00
Benjamin Kramer
da7d6ccef5 Update CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140347 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 22:38:34 +00:00
Owen Anderson
124e182103 Start stubbing out MCModule and MCAtom, which provide an API for accessing the rich disassembly of a complete object or executable. 
These are very much a work in progress, and not really useful yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140345 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 22:32:22 +00:00
Jakob Stoklund Olesen
08f5cdf5b3 Constrain register classes instead of emitting copies. 
Sometimes register class constraints are trivial, like GR32->GR32_NOSP,
or GPR->rGPR.  Teach InstrEmitter to simply constrain the virtual
register instead of emitting a copy in these cases.

Normally, these copies are handled by the coalescer.  This saves some
coalescer work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140340 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 21:39:34 +00:00
Jakob Stoklund Olesen
91fb536a34 Add a MinNumRegs argument to MRI::constrainRegClass(). 
The function will refuse to use a register class with fewer registers
than MinNumRegs.  This can be used by clients to avoid accidentally
increase register pressure too much.

The default value of MinNumRegs=0 doesn't affect how constrainRegClass()
works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140339 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 21:39:31 +00:00
Duncan Sands
17470bee5f Synthesize SSE3/AVX 128 bit horizontal add/sub instructions from 
floating point add/sub of appropriate shuffle vectors.  Does not
synthesize the 256 bit AVX versions because they work differently.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140332 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 20:15:48 +00:00
Eli Friedman
d102a03b36 PR10987: add a missed safety check to isSafePHIToSpeculate in scalarrepl. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140327 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 18:56:30 +00:00
Akira Hatanaka
98f49c4413 Print parentheses in next line. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140325 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 18:29:29 +00:00
Akira Hatanaka
ebb90dbb54 Change subreg index of AFPR64 from sub_fpeven to sub_32 per Jakob's comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140324 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 18:24:21 +00:00
Akira Hatanaka
95a091a0b6 Define a new sub-register index sub_32 for accessing the 32-bit sub-register of 
a 64-bit integer register. Move the subreg index definitions to the beginning
of the file.





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140319 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 17:57:32 +00:00
Bill Wendling
711395527e Use the C personality function instead of the C++ personality function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140318 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 17:56:40 +00:00
Akira Hatanaka
26bcc701a2 Print three closing parentheses when Kind is either VK_Mips_GPOFF_HI or 
VK_Mips_GPOFF_LO.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140316 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 17:44:37 +00:00
Akira Hatanaka
d27fda49c4 Add F31 to the set of callee-saved registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140315 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 17:35:03 +00:00
Akira Hatanaka
4e41416359 Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140313 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 17:26:58 +00:00
Justin Holewinski
7c9dd62441 PTX: Remove physical register defs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140310 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 16:45:48 +00:00
Justin Holewinski
5422a0f166 PTX: Use .param space for device function return values on SM 2.0+, and attempt 
to fix up parameter passing on SM < 2.0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140309 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 16:45:46 +00:00
Justin Holewinski
05591be5ed PTX: Fix style issues 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140308 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 16:45:43 +00:00
Justin Holewinski
297984d7c6 PTX: Fixup codegen to handle emission of virtual registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140307 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 16:45:40 +00:00
Justin Holewinski
40466cc758 PTX: Customize codegen passes in backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140306 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 16:45:37 +00:00
Justin Holewinski
247ee00bce PTX: Add new PTX-specific register allocator that keeps virtual registers 
instead of allocating physical registers.

This is part of a work-in-progress overhaul of the PTX register allocation scheme.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140305 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 16:45:33 +00:00
Craig Topper
adf01b3f18 Fix register printing in disassembling of push/pop of segment registers and in/out in Intel syntax mode. Fixes PR10960 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140299 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 07:01:50 +00:00
Akira Hatanaka
bb7d289aeb Add definition of 64-bit floating registers used for Mips64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140297 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 03:48:47 +00:00
Benjamin Kramer
2c2ccbf108 The SSE version differences for fmin/fmax are more involved than I thought. 
- x87: no min or max.
- SSE1: min/max for single precision scalars and vectors.
- SSE2: min/max for single and double precision scalars and vectors.
- AVX: as SSE2, but also supports the wider ymm vectors. (this is covered by the isTypeLegal check)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140296 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 03:27:22 +00:00
Akira Hatanaka
e33ca9ce1f Add enums and functions for symbols Mips64 uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140295 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 03:09:07 +00:00
Benjamin Kramer
74f3501d15 X86: Don't form min/max nodes if the target is missing SSE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140294 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 03:01:42 +00:00
Akira Hatanaka
459cad2dfd Mips64 aligns stack on 16-byte boundary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140292 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 02:53:37 +00:00
Akira Hatanaka
c56f5ea4c3 Remove unnecessary condition check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140291 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 02:41:29 +00:00
Owen Anderson
6126870193 Turns out that Thumb2 ADR doesn't need special printing like LDR does. Fix other test failures I caused. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140284 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 23:53:44 +00:00
Owen Anderson
e136872970 Print out immediate offset versions of PC-relative load/store instructions as [pc, #123] rather than simply #123. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140283 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 23:44:46 +00:00
Devang Patel
1dd4e56d55 Do not unnecessarily use AT_specification DIE because it does not add any value. 
Few weeks ago, llvm completely inverted the debug info graph. Earlier each debug info node used to keep track of its compile unit, now compile unit keeps track of important nodes. One impact of this change is that the global variable's do not have any context, which should be checked before deciding to use AT_specification DIE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140282 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 23:41:11 +00:00
Galina Kistanova
ef01f32d07 Fix for DbgInfoPrinter.cpp:174:12: warning: ‘LineNo’ may be used uninitialized in this function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140281 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 23:34:23 +00:00
Bill Wendling
cccfd194ec The last verification check for the new EH model. 
This makes sure that the unwind destination of an invoke is a landing pad.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140280 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 22:57:02 +00:00
Bill Wendling
3ca2ad1156 Attempt to update the shadow stack GC pass to the new EH model. 
This inserts a cleanup landingpad instruction and a resume to mimic the old
unwind instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140277 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 22:14:28 +00:00
Benjamin Kramer
15c9a1f60c X86Disassembler: if verbose logging is going to nulls(), disable logging completely. 
Otherwise we'll spend a ridiculous amount of time pretty printing debug output and then discarding it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140276 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 21:47:35 +00:00
Jim Grosbach
fe59d853c6 Tidy up. Whitepsace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140275 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 21:36:53 +00:00
Wesley Peck
91b60c1487 Fix some simple copy-paste errors in MBlaze ASM Parser and Makefile. 
patch contributed by Jia Liu!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140273 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 19:23:46 +00:00
Owen Anderson
519020adf1 These do not need to be conditional on the presence of CommentStream, as they have a fallback path now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140267 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 17:58:45 +00:00
Akira Hatanaka
0e64f810a5 Undo a change made in r140254. 
MipsArchVersion needs to be initialized to Mips32.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140261 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 17:31:45 +00:00
Benjamin Kramer
1d13d9ed96 DWARF: avoid unnecessary map lookups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140260 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 17:31:42 +00:00
Nadav Rotem
64ac73bb15 fix comment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140258 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 17:14:40 +00:00
Akira Hatanaka
47c40a2cf9 MipsArchVersion does not need to be in the initialization list and MipsABI 
should be initialized to UnknownABI.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140254 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 16:41:43 +00:00
Nadav Rotem
1147248e6f [VECTOR-SELECT] Address one of the bugs in pr10902. 
Vector SetCC result types need to be type-legalized.
This code worked before because scalar result types are known to be legal.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140249 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 14:34:38 +00:00
Nadav Rotem
9c6cdf4c1c Insert a sanity check on the combining of x86 truncing-store nodes. This comes to replace the problematic check that was removed in r139995. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140246 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 08:45:10 +00:00
Richard Trieu
23946fcaae Change: 
assert(!"error message");

To:

  assert(0 && "error message");

which is more consistant across the code base.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140234 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 03:09:09 +00:00
Akira Hatanaka
2464810ac2 Add a base class for Mips TargetMachines and add Mips64 TargetMachines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140233 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 03:00:58 +00:00
Akira Hatanaka
8c1b4bf066 Set ABI if it hasn't been set on the command line. 
Check if architecture & ABI combination is valid.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140230 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 02:45:29 +00:00
Akira Hatanaka
50fa74e8d2 Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140229 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 02:24:25 +00:00
Andrew Trick
3be654f808 Lower ARM adds/subs to add/sub after adding optional CPSR operand. 
This is still a hack until we can teach tblgen to generate the
optional CPSR operand rather than an implicit CPSR def. But the
strangeness is now limited to the selection DAG. ADD/SUB MI's no
longer have implicit CPSR defs, nor do we allow flag setting variants
of these opcodes in machine code. There are several corner cases to
consider, and getting one wrong would previously lead to nasty
miscompilation. It's not the first time I've debugged one, so this
time I added enough verification to ensure it won't happen again.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140228 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 02:20:46 +00:00
Andrew Trick
e23dc9c0ef whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140227 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 02:17:37 +00:00
Owen Anderson
317eaf1993 In the disassembler C API, be careful not to confuse the comment streamer that the disassembler outputs annotations on with the streamer that the InstPrinter will print them on. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140217 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-21 00:25:23 +00:00
Akira Hatanaka
5663344127 Change the names of functions isMips* to hasMips*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140214 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 23:53:09 +00:00
Eli Friedman
79782fc864 Make sure IPSCCP never marks a tracked call as overdefined in SCCPSolver::ResolvedUndefsIn. If we do, we can end up in a situation where a function is resolved to return a constant, but the caller is marked overdefined, which confuses the code later. 
<rdar://problem/9956541> (again).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140210 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 23:28:51 +00:00
Bruno Cardoso Lopes
e97190fdf8 Add a DAGCombine for subvector extracts to remove useless chains of 
subvector inserts and extracts. Initial patch by Rackover, Zvi with
some tweak done by me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140204 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 23:19:33 +00:00
Bruno Cardoso Lopes
f4b841d4e2 Revert r140097, working on a better approach 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140203 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 23:19:29 +00:00
Ivan Krasin
5f2318e065 lib/Linker: add support of deps which does not end with ".so". 
It happens (for example) when you want to have a dependency on the .so
with the specific version, like liblzma.so.1.0.0 or
libcrypto.so.0.9.8.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140201 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 22:52:35 +00:00
Bruno Cardoso Lopes
149f29f1fd Simplify max/minp[s|d] dagcombine matching 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140199 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 22:34:45 +00:00
Bill Wendling
f0dc257a8f Relax this condition. 
Some passes require breaking critical edges before they're called. Don't
segfault because of that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140196 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 22:28:17 +00:00
Bill Wendling
b7e807f9a9 Place the check for an exit landing pad where it will be run on both code paths through the if-then-else. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140195 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 22:27:16 +00:00
Bill Wendling
84b6706d90 Omit extracting a loop if one of the exits is a landing pad. 
The landing pad must accompany the invoke when it's extracted. However, if it
does, then the loop isn't properly extracted. I.e., the resulting extraction has
a loop in it. The extracted function is then extracted, etc. resulting in an
infinite loop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140193 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 22:23:09 +00:00
Bob Wilson
aabc6a9b79 Remove the hack to check UNAME_RELEASE when identifying the Darwin version. 
This was only needed to locate llvm-gcc's installation directory when clang
falls back to run llvm-gcc for i386 kexts.  As of clang svn r140187, we're
now just searching paths with several different Darwin versions on either
side of the current version, so this is no longer needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140188 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 22:05:56 +00:00
Bruno Cardoso Lopes
4e42335972 Tidy up a bit more, fix tab and remove trailing whitespaces 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140186 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 21:45:26 +00:00
Bruno Cardoso Lopes
448d986858 The wrong relocation was being emitted for several SSSE3 instructions. 
This fixes PR10963. Thanks to Benjamin for finding the wrong tablegen
declaration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140184 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 21:39:21 +00:00
Bruno Cardoso Lopes
77169a9197 Tidy up code! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140183 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 21:39:06 +00:00
Evan Cheng
0d18174f0f Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does not support Thumb2 dsp instructions. rdar://10152911. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140181 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 21:38:18 +00:00
Akira Hatanaka
1daa5bea58 Initial Mips64 support. Patch by Liu with some modifications. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140178 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 20:28:08 +00:00
Bill Wendling
8c93d5b602 Check the terminator, not the basic block. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140176 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 20:20:50 +00:00
Bill Wendling
2f1cd85598 When extracting a basic block that ends in an 'invoke' instruction, we need to 
extract its associated landing pad block as well. However, that landing pad
block may have more than one predecessor. So split the landing pad block so that
individual landing pads have only one predecessor.

This type of transformation may produce a false positive with bugpoint.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140173 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 19:10:24 +00:00
Bill Wendling
9e7013a506 Use ArrayRef instead of an explicit 'const std::vector &'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140172 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 19:05:04 +00:00
Devang Patel
680018ff89 If simple ownership works then friendship is not required. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140169 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 18:48:56 +00:00
Bill Wendling
51bae90289 Use ArrayRef instead of 'const std::vector' to pass around the list of basic blocks to extract. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140168 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 18:42:07 +00:00
Devang Patel
16c19a155c Update GCOVLines to provide interfaces to write line table and calculate complete length. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140167 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 18:35:00 +00:00
Douglas Gregor
f34fa6f34e U is good enough 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140166 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 18:33:29 +00:00
Bill Wendling
b6777eae58 Fix comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140164 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 18:24:46 +00:00
Andrew Trick
83a8031336 Restore hasPostISelHook tblgen flag. 
No functionality change. The hook makes it explicit which patterns
require "special" handling. i.e. it self-documents tblgen
deficiencies. I plan to add verification in ExpandISelPseudos and
Thumb2SizeReduce to catch any missing hasPostISelHooks. Otherwise it's
too fragile.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140160 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 18:22:31 +00:00
Douglas Gregor
f83f0f8246 Eliminate sign-comparison warnings in APInt 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140158 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 18:11:52 +00:00
Akira Hatanaka
70303688bc Add mips64 & mips64el to Triple. Patch by Liu with modifications. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140157 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 18:09:37 +00:00
Devang Patel
29d9610f23 Update comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140156 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 18:05:45 +00:00
Devang Patel
68155d31cd Use StringRef instead of std::string. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140154 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 17:55:19 +00:00
Devang Patel
865375ca7f Eliminate unnecessary copy of FileName from GCOVLines. 
GCOVLines is always accessed through a StringMap where the key is FileName.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140151 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 17:43:14 +00:00
Devang Patel
ec6f2559fe There is no need to write a local utility routine to find subprogram info if the utility routine is already available in DebugInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140145 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 15:57:19 +00:00
Craig Topper
3699261d3f Extend changes from r139986 to produce 256-bit AVX minps/minpd/maxps/maxpd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140140 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 07:38:59 +00:00
Andrew Trick
4815d56bb2 ARM isel bug fix for adds/subs operands. 
Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the
full gamut of CPSR defs/uses including instructins whose "optional"
cc_out operand is not really optional. This allowed removal of the
hasPostISelHook to simplify the .td files and make the implementation
more robust.
Fixes rdar://10137436: sqlite3 miscompile


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140134 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 03:17:40 +00:00
Andrew Trick
3af7a67629 whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140133 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 03:06:13 +00:00
Jim Grosbach
50f1c37123 Thumb2 assembly parsing and encoding for UXTAB/UXTAB16/UXTH/UXTB/UXTB16/UXTH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140125 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 00:46:54 +00:00
Eric Christopher
33fe8eb46c Remove from cmake too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140122 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 00:38:04 +00:00
Eric Christopher
eae5a13078 Remove more of llvmc and dependencies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140121 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-20 00:34:27 +00:00