Jim Grosbach
86fdff0fa7
ARM assembly parsing support for RSB instruction.
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Add two-operand instruction aliases. Add parsing and encoding tests for
variants of the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135712 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 22:37:43 +00:00
Jim Grosbach
43d3b31cda
Tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135706 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 21:26:05 +00:00
Nicolas Geoffray
a056d20167
Update generated CPP code with the new API on CallInst::Create and ConstantExpr::getGetElementPtr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135704 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 20:59:21 +00:00
Jim Grosbach
10c7d70a4e
ARM assembly parsing POP/PUSH mnemonics.
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Aliases for LDM/STM. The single-register versions should encode to LDR/STR
with writeback, but we don't (yet) get that correct. Neither does Darwin's
system assembler, though, so that's not a deal-breaker of a limitation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135702 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 19:57:11 +00:00
Oscar Fuentes
45e11c7cc7
Fix CMake build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135698 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 19:10:57 +00:00
Owen Anderson
92a202213b
Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowing us to distinguish the encodings that use shifted registers from those that use shifted immediates. This is necessary to allow the fixed-length decoder to distinguish things like BICS vs LDRH.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135693 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 18:54:16 +00:00
Andrew Trick
a305fe7545
Cleanup: make std::pair usage slightly less indecipherable without actually naming variables!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135684 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 17:37:39 +00:00
Jim Grosbach
f6c0525d42
ARM assembly parsing and encoding for PKHBT and PKHTB instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 17:23:04 +00:00
Bruno Cardoso Lopes
dca6cdd6a1
Added the infrastructute necessary for MIPS JIT support. Patch by Vladimir
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Stefanovic. I removed the part that actually emits the instructions cause
I want that to get in better shape first and in incremental steps. This
also makes it easier to review the upcoming parts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135678 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 16:28:51 +00:00
Jay Foad
4b5e207bf2
Make better use of ConstantExpr::getGetElementPtr's InBounds parameter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135676 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 15:15:37 +00:00
Jay Foad
dab3d29605
Convert ConstantExpr::getGetElementPtr and
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ConstantExpr::getInBoundsGetElementPtr to use ArrayRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135673 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 14:31:17 +00:00
Chris Lattner
c30a38f34b
move tier out of an anonymous namespace, it doesn't make sense
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to for it to be an an anon namespace and be in a header.
Eliminate some extraenous uses of tie.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135669 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 06:21:31 +00:00
Bruno Cardoso Lopes
dbd4fe2b0a
- Register v16i16 as valid VR256 register class
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- Add more bitcasts for v16i16
- Since 135661 and 135662 already added the splat logic,
just add one more splat test for v16i16
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135663 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 02:24:08 +00:00
Bruno Cardoso Lopes
65b74e1d00
Add support for 256-bit versions of VPERMIL instruction. This is a new
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instruction introduced in AVX, which can operate on 128 and 256-bit vectors.
It considers a 256-bit vector as two independent 128-bit lanes. It can permute
any 32 or 64 elements inside a lane, and restricts the second lane to
have the same permutation of the first one. With the improved splat support
introduced early today, adding codegen for this instruction enable more
efficient 256-bit code:
Instead of:
vextractf128 $0, %ymm0, %xmm0
punpcklbw %xmm0, %xmm0
punpckhbw %xmm0, %xmm0
vinsertf128 $0, %xmm0, %ymm0, %ymm1
vinsertf128 $1, %xmm0, %ymm1, %ymm0
vextractf128 $1, %ymm0, %xmm1
shufps $1, %xmm1, %xmm1
movss %xmm1, 28(%rsp)
movss %xmm1, 24(%rsp)
movss %xmm1, 20(%rsp)
movss %xmm1, 16(%rsp)
vextractf128 $0, %ymm0, %xmm0
shufps $1, %xmm0, %xmm0
movss %xmm0, 12(%rsp)
movss %xmm0, 8(%rsp)
movss %xmm0, 4(%rsp)
movss %xmm0, (%rsp)
vmovaps (%rsp), %ymm0
We get:
vextractf128 $0, %ymm0, %xmm0
punpcklbw %xmm0, %xmm0
punpckhbw %xmm0, %xmm0
vinsertf128 $0, %xmm0, %ymm0, %ymm1
vinsertf128 $1, %xmm0, %ymm1, %ymm0
vpermilps $85, %ymm0, %ymm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135662 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 01:55:47 +00:00
Bruno Cardoso Lopes
9283b668a1
Improve splat promotion to handle AVX types: v32i8 and v16i16. Also
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refactor the code and add a bunch of comments. The final shuffle
emitted by handling 256-bit types is suitable for the VPERM shuffle
instruction which is going to be introduced in a next commit (with
a testcase which cover this commit)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135661 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 01:55:42 +00:00
Bruno Cardoso Lopes
0e87805074
Add aditional patterns for vextractf128 instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135660 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 01:55:39 +00:00
Bruno Cardoso Lopes
df0e03ceb8
Add aditional patterns for vinsertf128 instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135659 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 01:55:36 +00:00
Bruno Cardoso Lopes
11bbb2003a
Add v16i16 type to VR256 class
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135658 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 01:55:33 +00:00
Bruno Cardoso Lopes
bca4781b61
Move code around. No functionality changes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135657 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 01:55:30 +00:00
Bruno Cardoso Lopes
67727cac2f
Tidy up code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135656 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 01:55:27 +00:00
Andrew Trick
c205a094bd
LSR, correct fix for rdar://9786536. Silly casting bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 01:45:54 +00:00
Andrew Trick
c2c988e5e0
LSR must sometimes sign-extend before generating double constants.
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rdar://9786536
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135650 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 01:05:01 +00:00
Bill Wendling
fb4eb165d6
Mark instructions which are part of the frame setup with the MachineInstr::FrameSetup flag.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135645 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 00:44:56 +00:00
Andrew Trick
37eb38d3f8
LSR crashes on an empty IVUsers list.
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rdar://9786536
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135644 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 00:40:04 +00:00
Evan Cheng
36c62d3cbe
X86 is the only target that uses coff format. This should fixes test failures running on Windows, Cygwin, or MingW hosts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135639 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 23:53:54 +00:00
Evan Cheng
ee04a6d3a4
Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ARM MC code from target.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 23:34:39 +00:00
Bill Wendling
7bc3178182
Remove unused function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135635 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 23:07:42 +00:00
Bill Wendling
16da7366d5
Remove the now defunct getCompactUnwindEncoding method from the frame lowering code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135634 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 23:04:09 +00:00
Devang Patel
3737b89098
Refactor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135633 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 23:00:27 +00:00
Devang Patel
40c7e4142e
There are two ways to map a variable to its lexical scope. Lexical scope information is embedded in MDNode describing the variable. It is also available as a part of DebugLoc attached with DBG_VALUE instruction. DebugLoc attached with an instruction is less reliable in optimized code so use information embedded in the MDNode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135629 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 22:18:50 +00:00
Eli Friedman
747032522f
Clean up includes of llvm/Analysis/ConstantFolding.h so it's included where it's used and not included where it isn't.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135628 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 21:57:23 +00:00
Devang Patel
4ec14b0dee
While emitting constant value, look through derived type and use underlying basic type to determine size and signness of the constant value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135627 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 21:57:04 +00:00
Jim Grosbach
dde038af59
ARM PKH shift ammount operand printing tweaks.
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Move the shift operator and special value (32 encoded as 0 for PKHTB) handling
into the instruction printer. This cleans up a bit of the disassembler
special casing for these instructions, more easily handles not printing the
operand at all for "lsl #0 " and prepares for correct asm parsing of these
operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135626 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 21:40:26 +00:00
Eli Friedman
73bfa4aecf
Bring LICM into compliance with the new "Memory Model for Concurrent Operations" in LangRef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135625 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 21:37:47 +00:00
Jim Grosbach
1769a3df4a
Tidy up a bit.
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Move common definitions for ARM and Thumb2 into ARMInstrFormats.td and rename
them to be a bit more descriptive that they're for the PKH instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135617 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 20:49:03 +00:00
Jim Grosbach
a0472dc420
ARM: Tidy up representation of PKH instruction.
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The shift type is implied by the instruction (PKHBT vs. PKHTB) and so shouldn't
be also encoded as part of the shift value immediate. Otherwise we're able to
represent invalid instructions, plus it needlessly complicates the
representation. Preparatory work for asm parsing of these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135616 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 20:32:09 +00:00
Benjamin Kramer
aeb7de764a
Fix cmake again :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135613 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 20:00:06 +00:00
Evan Cheng
203576aa0c
Goodbye TargetAsmInfo. This eliminate last bit of CodeGen and Target in llvm-mc.
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There is still a bit more refactoring left to do in Targets. But we are now very
close to fixing all the layering issues in MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135611 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 19:50:42 +00:00
Eli Friedman
a4d0bd84f7
Extend the hack for _GLOBAL_OFFSET_TABLE_ slightly; PR10389.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135607 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 19:36:11 +00:00
Jim Grosbach
ab40f4b737
ARM assembly parsing of MUL instruction.
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Correctly handle 's' bit and predication suffices. Add parsing and encoding
tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135596 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 18:20:31 +00:00
Eli Friedman
0381c21d2d
PR10421: Fix a straightforward bug in the widening logic for CONCAT_VECTORS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135595 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 18:14:33 +00:00
Benjamin Kramer
9d999f58e3
Initialize the EHFrameSection pointer to zero.
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This should fix the spurious buildbot errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135594 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 18:13:23 +00:00
Jay Foad
626f52d43d
Fix a GCC warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135581 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 08:15:21 +00:00
Evan Cheng
34ad6db8b9
- Move CodeModel from a TargetMachine global option to MCCodeGenInfo.
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- Introduce JITDefault code model. This tells targets to set different default
code model for JIT. This eliminates the ugly hack in TargetMachine where
code model is changed after construction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135580 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 07:51:56 +00:00
Evan Cheng
4c8164813c
Include MCRegisterInfo to eliminate a compilation warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135575 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 06:54:19 +00:00
Francois Pichet
59458483a5
Fix the CMake build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135573 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 06:35:24 +00:00
Evan Cheng
e76a33b956
Add MCObjectFileInfo and sink the MCSections initialization code from
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TargetLoweringObjectFileImpl down to MCObjectFileInfo.
TargetAsmInfo is done to one last method. It's *almost* gone!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135569 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 05:58:47 +00:00
Andrew Trick
86c98145b2
indvars: Added getInsertPointForUses to find a valid place to truncate the IV.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135568 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 05:32:06 +00:00
Andrew Trick
13bcf2e68a
indvars -disable-iv-rewrite: Add NarrowIVDefUse to cache def-use
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info. Holding Use* pointers is bad form even though it happened to
work in this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135566 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 04:39:24 +00:00
NAKAMURA Takumi
e3345c4e4a
X86Subtarget.h: Assume "x86_64-cygwin", though it has not been released yet, to appease test/CodeGen/X86 on cygwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135564 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 04:02:20 +00:00
Eric Christopher
cf1e967df2
Extra semi-colon.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135561 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 02:44:39 +00:00
Andrew Trick
f22d95749a
indvars -disable-iv-rewrite fix: derived GEP IVs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135558 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 02:08:58 +00:00
Benjamin Kramer
e236dc6553
Don't leak CodeGenInfos.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135555 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 01:27:58 +00:00
Akira Hatanaka
de9416e261
Change name of class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135550 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 00:53:09 +00:00
Akira Hatanaka
32b7ebb163
Define classes for definitions of atomic instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135546 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-20 00:23:01 +00:00
Akira Hatanaka
db54826f20
Lower memory barriers to sync instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135537 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 23:30:50 +00:00
Evan Cheng
70955c2d12
Fix an obvious typo that's preventing x86 (32-bit) from using .literal16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135535 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 23:14:32 +00:00
Eli Friedman
3610604086
PR10386: Don't try to split an edge from an indirectbr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 22:59:41 +00:00
Jim Grosbach
b29b4dd988
Tweak ARM assembly parsing and printing of MSR instruction.
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The system register spec should be case insensitive. The preferred form for
output with mask values of 4, 8, and 12 references APSR rather than CPSR.
Update and tidy up tests accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135532 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 22:45:10 +00:00
Devang Patel
c8fcfc9cd9
Distinguish between two copies of one inlined variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135528 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 22:31:15 +00:00
Jim Grosbach
80d01dd3d1
ARM assembly parsing of MRS instruction.
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Teach the parser to recognize the APSR and SPSR system register names. Add
and update tests accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135527 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 21:59:29 +00:00
Owen Anderson
f1a0090073
Enhance the FixedLengthDecoder to be able to generate plausible-looking decoders for ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135524 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 21:06:00 +00:00
Akira Hatanaka
bdd83fe382
Change variable name.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135522 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 20:56:53 +00:00
Jim Grosbach
ccfd9313d1
ARM assembly parsing for MRC/MRC2/MRRC/MRRC2.
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Add range checking to the immediate operands. Update tests accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135521 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 20:35:35 +00:00
Akira Hatanaka
cc7ecc7290
Use the correct opcodes: SLLV/SRLV or AND must be used instead of SLL/SRL or
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ANDi, when the instruction does not have any immediate operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135520 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 20:34:00 +00:00
Akira Hatanaka
4061da1403
Use descriptive variable names.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135514 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 20:11:17 +00:00
Jim Grosbach
5f16057d1e
ARM assembly parsing for MOV (register).
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Correct the handling of the 's' suffix when parsing ARM mode. It's only a
truly separate opcode in Thumb. Add test cases to make sure we handle
the s and condition suffices correctly, including diagnostics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135513 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 20:10:31 +00:00
Jim Grosbach
558b66d3cd
Tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135507 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 19:47:11 +00:00
Jim Grosbach
731f209794
Tighten conditional for 'mov' cc_out.
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Make sure we only clobber the cc_out operand if it is indeed a default
non-setting operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135506 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 19:45:44 +00:00
Devang Patel
23336b449e
Reapply r135457. This needs llvm-gcc change, that I forgot to check-in yesterday.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135504 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 19:41:54 +00:00
Jim Grosbach
ffa3225e26
ARM assembly parsing for MOV (immediate).
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Add range checking for the immediate operand and handle the "mov" mnemonic
choosing between encodings based on the value of the immediate. Add tests
for fixups, encoding choice and values, and diagnostic for out of range values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135500 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 19:13:28 +00:00
Jim Grosbach
5a18700470
Remove unused code.
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cc_out and pred operands are added during parsing via custom C++ now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135497 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 18:32:48 +00:00
Akira Hatanaka
29af0918ce
Fix comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135496 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 18:19:40 +00:00
Akira Hatanaka
70564a9c19
Remove redundant instructions.
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- In EmitAtomicBinaryPartword, mask incr in loopMBB only if atomic.swap is the
instruction being expanded, instead of masking it in thisMBB.
- Remove redundant Or in EmitAtomicCmpSwap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135495 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 18:14:26 +00:00
Akira Hatanaka
81b441151f
Separate code that modifies control flow from code that adds instruction to
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basic blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135490 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 17:09:53 +00:00
Jim Grosbach
6bc1dbc376
ARM range checking for so_imm operands in assembly parsing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135489 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 16:50:30 +00:00
Bob Wilson
f51bb7cef8
Revert "Make a provision to encode inline location in a variable. This will enable dwarf writer to easily distinguish between two instances of a inlined variable in one basic block."
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This reverts commit 9fec5e346e
.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135486 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 16:32:50 +00:00
Jay Foad
7fc52e2d95
Convert ConstantFoldGetElementPtr to use ArrayRef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135483 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 15:30:30 +00:00
Jay Foad
b9b54ebfed
Convert SimplifyGEPInst to use ArrayRef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135482 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 15:07:52 +00:00
Jay Foad
ca12a2139e
Convert gep_type_begin and gep_type_end to use ArrayRef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135481 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 14:42:50 +00:00
Jay Foad
8fbbb39807
Convert TargetData::getIndexedOffset to use ArrayRef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135478 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 14:01:37 +00:00
Jay Foad
1d2f569c34
Use ArrayRef in ConstantFoldInstOperands and ConstantFoldCall.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135477 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 13:32:40 +00:00
Richard Osborne
c8007ab582
Add intrinsics for the zext / sext instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135476 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 13:28:50 +00:00
Richard Osborne
829bef1a46
Add intrinsics for the testct, testwct instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135475 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 13:00:40 +00:00
Richard Osborne
dee3dd9129
Add intrinsics for the peek and endin instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135474 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 12:50:25 +00:00
Evan Cheng
439661395f
Introduce MCCodeGenInfo, which keeps information that can affect codegen
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(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135468 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 06:37:02 +00:00
Akira Hatanaka
939ece1b5c
Make EmitAtomic functions return the correct MachineBasicBlocks so that
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ExpandISelPseudos::runOnMachineFunction does not visit instructions that have
just been added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135465 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 03:42:13 +00:00
Akira Hatanaka
a308c670b4
Do not insert instructions in reverse order.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135464 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 03:14:58 +00:00
Devang Patel
9fec5e346e
Make a provision to encode inline location in a variable. This will enable dwarf writer to easily distinguish between two instances of a inlined variable in one basic block.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 01:03:32 +00:00
Devang Patel
497a397f3e
Revert r135423.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135454 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 00:28:24 +00:00
Bill Wendling
6c2f7e2398
Micro-opt: Only emit compact unwind if there is a compact unwind encoding to emit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135452 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 00:09:25 +00:00
Bill Wendling
e52e3f2c02
Use the CompactUnwindEncoding from the Frame, if it's defined.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135451 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 00:06:12 +00:00
Bill Wendling
e060a5cd06
Add a frame with the compact unwind encoding if it exists.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135450 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 00:02:51 +00:00
Bill Wendling
d967578a8c
Add a method to set compact unwind encoding information in a frame.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135449 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 00:01:42 +00:00
Bill Wendling
7d36534d22
Rename CompactEncoding to CompactUnwindEncoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135448 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 00:00:58 +00:00
Sean Callanan
c872143d6a
Fixed a bug where the MC subtarget information
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wasn't being initialized by the enhanced disassembler,
leading to assertion failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135447 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-19 00:00:41 +00:00
Bill Wendling
a67dcea072
Move the compact encoding from the target-specific library to the code-gen
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library.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135443 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 23:38:40 +00:00
Owen Anderson
565a036697
Revamp our handling of tLDMIA[_UPD] and tSTMIA[_UPD] to avoid having multiple instructions with the same encoding. This resolves another conflict when bringing up the new-style disassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135442 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 23:25:34 +00:00
Evan Cheng
c8c3acfea4
Eliminate TargetAsmInfo::getCompactUnwindEncoding. This get rid of the
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use of TargetFrameLowering in TargetAsmInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135439 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 22:32:12 +00:00
Evan Cheng
2d28617de2
Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for
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better location welcome).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135438 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 22:29:13 +00:00
Owen Anderson
91614aec48
Mark the Darwin assembler workout as isCodeGenOnly, so that it doesn't cause decoding conflicts in the new-style disassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135434 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 22:14:02 +00:00
Jeffrey Yasskin
3ba292dbc2
Add APInt(numBits, ArrayRef<uint64_t> bigVal) constructor to prevent future ambiguity
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errors like the one corrected by r135261. Migrate all LLVM callers of the old
constructor to the new one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 21:45:40 +00:00
Andrew Trick
41e0d4e788
Compiler warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135426 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 21:15:03 +00:00
Evan Cheng
0e6a052331
Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down
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to MCRegisterInfo. Also initialize the mapping at construction time.
This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135424 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 20:57:22 +00:00
Devang Patel
1360bc8eb0
During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases.
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[take 2]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135423 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 20:55:23 +00:00
Andrew Trick
fc933c073e
indvars: LinearFunctionTestReplace for non-canonical IVs.
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For -disable-iv-rewrite, perform LFTR without generating a new
"canonical" induction variable. Instead find the "best" existing
induction variable for use in the loop exit test and compute the final
value of that IV for use in the new loop exit test. In short,
convert to a simple eq/ne exit test as long as it's cheap to do so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135420 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 20:32:31 +00:00
Akira Hatanaka
a921164f39
Do not treat atomic.load.sub differently than other atomic binary intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135418 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 19:58:59 +00:00
Akira Hatanaka
0d7d0b5cb7
Set mayLoad or mayStore flags for SC and LL in order to prevent LICM from
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moving them out of the loop. Previously, stores and loads to a stack frame
object were inserted to accomplish this. Remove the code that was needed to do
this. Patch by Sasa Stankovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135415 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 18:52:12 +00:00
Owen Anderson
0af0dc8ac6
Re-apply r135319 with a fix for the constant island pass.
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Original Log: Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tBLXr, using pseudo-instructions to lower to the single final opcode. Update the ARM disassembler for this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135414 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 18:50:52 +00:00
Jakob Stoklund Olesen
fc47933db5
Fix a crash when building 177.mesa for armv6.
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When splitting a live range immediately before an LDR_POST instruction
that redefines the address register, make sure to use the correct value
number in leaveIntvBefore.
We need the value number entering the instruction.
<rdar://problem/9793765>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 18:47:13 +00:00
Andrew Trick
f6a0dbaaf4
indvars: Added verification that LFTR and other indvars goodness does
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not interfere with BackedgeTakenCount computation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135412 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 18:44:20 +00:00
Andrew Trick
5241b79ebc
indvars: Added isHighCostExpansion. Avoid generating extra ops in the
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preheader for the sole purpose of LFTR, since LFTR itself is usually not
a clear optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 18:21:35 +00:00
Bruno Cardoso Lopes
3f6a8dd4ce
Be more smart with VCVTSS2SD. Also place the patterns close to the
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definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135407 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 18:11:25 +00:00
Bruno Cardoso Lopes
3aaa010ece
Add AVX 128-bit sqrt versions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 17:51:40 +00:00
Akira Hatanaka
45473c1b15
Change destination register operands of SC instructions so that unique
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virtual registers are used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135403 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 17:44:27 +00:00
Frits van Bommel
39b5abf507
Migrate LLVM and Clang to use the new makeArrayRef(...) functions where previously explicit non-default constructors were used.
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Mostly mechanical with some manual reformatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135390 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 12:00:32 +00:00
Jakob Stoklund Olesen
7941350101
Fix PR10387.
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When trying to rematerialize a value before an instruction that has an
early-clobber redefine of the virtual register, make sure to look up the
correct value number.
Early-clobber defs are moved one slot back, so getBaseIndex is needed to
find the used value number.
Bugpoint was unable to reduce the test case for this, see PR10388.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135378 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 05:31:59 +00:00
Chris Lattner
db125cfaf5
land David Blaikie's patch to de-constify Type, with a few tweaks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135375 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 04:54:35 +00:00
Chris Lattner
840635741f
fix a warning in TinyPtrVector, adopt it in SSAUpdater, saving some
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mallocs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135366 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 01:43:58 +00:00
Benjamin Kramer
8d4dd79526
Simplify & microoptimize code. No intended functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135364 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-18 00:00:20 +00:00
Nadav Rotem
811ad8690b
Minor code cleanups
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135362 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-17 19:05:00 +00:00
Chris Lattner
3e19473af3
tidy up
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135360 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-17 06:01:30 +00:00
Benjamin Kramer
93a896e2e3
Silence compiler warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135358 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16 22:26:27 +00:00
Jakub Staszak
975eb99cf3
Remove unused LoopRanges from RegAllocGreedy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135354 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16 20:43:00 +00:00
Jakub Staszak
12af93ae86
Remove "LoopInfo.h" include from BranchProbabilityInfo.h.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135353 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16 20:31:15 +00:00
Jakub Staszak
59a9dab4d8
Add MachineBlockFrequency analysis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135352 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16 20:23:20 +00:00
Owen Anderson
91ddfc4723
Revert r135319 in an attempt to get to unbreak testers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135343 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16 09:17:43 +00:00
Matt Beaumont-Gay
f9d7fb6b3c
Silence unused variable warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16 04:18:47 +00:00
Andrew Trick
5614769d55
indvars: fix a pass-sensitivity issue that would hit the SCEVExpander
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assertion I added in r135333. Check for the existence of a preheader
before expanding a recurrence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135335 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16 01:18:53 +00:00
Andrew Trick
6f684b0bec
indvars: remove ExprToIVMap because it won't be needed by LFTR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135334 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16 01:06:48 +00:00
Andrew Trick
d152d03a47
Fix SCEVEXpander to handle arbitrary phi expansion. Includes two
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related bug fixes and corresponding assertions for uninitialized data
and missing NULL check. Test cases will be included with the new LFTR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135333 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16 00:59:39 +00:00
Bruno Cardoso Lopes
4201ecae92
Add AVX 128-bit patterns for sint_to_fp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135332 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16 00:50:20 +00:00
Jakob Stoklund Olesen
af4e40c2f4
He said *before* the last split point.
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This should unbreak the build-self-4-mingw32 tester. I have a very
complicated test case that I will try to clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135329 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-16 00:13:30 +00:00
Chris Lattner
7305c55a80
fix rdar://9776316 - type remapping needed for inline asm blobs,
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fixing some objc llvm-test crashes with LTO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135324 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 23:18:40 +00:00
Chris Lattner
c1d414ad71
deconstify getType()'s.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 23:15:45 +00:00
Dan Gohman
e63e5ab50a
LegalizeDAG doesn't need its own copy of this enum.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135320 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 22:51:43 +00:00
Owen Anderson
49e163b6c7
Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tBLXr, using pseudo-instructions to lower to the single final opcode. Update the ARM disassembler for this change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135319 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 22:49:31 +00:00
Dan Gohman
75b10047fc
Delete LegalizeDAG's own version of isTypeLegal and getTypeAction
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and just use the ones from TargetLowering directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 22:39:09 +00:00
Bruno Cardoso Lopes
5bc37dd131
Fix a couple of things:
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1) Make non-legal 256-bit loads to be promoted to v4i64. This lets us
canonize the loads and handle things the same way we use to handle
for 128-bit registers. Despite of what one of the removed comments
explained, the load promotion would not mess with VPERM, it's only a
matter of doing the appropriate bitcasts when this instructions comes
to be introduced. Also make LOAD v8i32 legal.
2) Doing 1) exposed two bugs:
- v4i64 was being promoted to itself for several opcodes (introduced
in r124447 by David Greene) causing endless recursion and the stack to
explode.
- there was no support for allOnes BUILD_VECTORs and ANDNP would fail to
match because it was generating early target constant pools during
lowering.
3) The testcases are already checked-in, doing 1) exposed the
bugs in the current testcases.
4) Tidy up code to be more clear and explicit about AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 22:24:33 +00:00
Bruno Cardoso Lopes
983d19dd10
Add a few patterns for 256-bit bitcasts. No testcases now, they are
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comming together with other tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135312 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 22:24:17 +00:00
Dan Gohman
ea0270298d
Delete an unused variable and a redundant assert.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135311 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 22:19:02 +00:00
Jakob Stoklund Olesen
b4ddedce59
Extract parts of RAGreedy::splitAroundRegion as SplitKit methods.
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This gets rid of some of the gory splitting details in RAGreedy and
makes them available to future SplitKit clients.
Slightly generalize the functionality to support multi-way splitting.
Specifically, SplitEditor::splitLiveThroughBlock() supports switching
between different register intervals in a block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135307 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 21:47:57 +00:00
Dan Gohman
6a109f9d70
Modernize comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135305 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 21:42:20 +00:00
Eli Friedman
5232cc675c
PR10370: Make sure we know how to relax push correctly on x86-64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135303 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 21:28:39 +00:00
Devang Patel
133b09953c
Use DebugLoc directly to map inlined functions' instructions to respective lexical scope.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135302 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 21:25:44 +00:00
Jakub Staszak
d7932ca962
Fix pointer heuristic. Check whether predicator is ICMP_NE instead of if it is
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not isEquality().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135296 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 20:51:06 +00:00
Owen Anderson
43967a97cf
Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues to simplify the path towards an auto-generated disassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135290 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 18:46:47 +00:00
Benjamin Kramer
07ea23aa2d
ObjectFile: Add a method to check whether a section contains a symbol.
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- No ELF or COFF implementation yet, I don't have a way to test that.
Should be straightforward to add though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135288 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 18:39:21 +00:00
Chad Rosier
71400b6afa
Disable loop idiom recognition of memset/memcpy if the function being compiled
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is named after a common idiom (i.e., memset/memcpy). Otherwise, we can run into
infinite recursion. Ideally, the user should use the correct -fno-builtin flag,
but in case they don't we should play nicely.
rdar://9763412
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135286 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 18:25:04 +00:00
Owen Anderson
167eb1f903
Remove unnecessary duplicate instruction definitions that simply overloaded the type of VEXT. This can be achieved with a Pat definition, and is much more disassembler friendly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135283 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-15 17:48:05 +00:00