Chris Lattner
72fe0af68f
remove reference to this pass
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24088 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-29 05:28:34 +00:00
Duraid Madina
274ecfb782
add shladd
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24080 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-29 04:13:40 +00:00
Nate Begeman
167f1e2651
New case to handle someday
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24075 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 23:26:57 +00:00
Chris Lattner
7d7b96746c
Don't emit "32" for unordered comparison
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2005-10-28 22:58:07 +00:00
Chris Lattner
ed048c067d
add a hack to get code with ordered comparisons working. This hack is
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tracked as PR642
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2005-10-28 20:49:47 +00:00
Chris Lattner
6df2507121
add support for branch on ordered/unordered.
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2005-10-28 20:32:44 +00:00
Chris Lattner
f02a916d82
Do not globalize internal symbols
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2005-10-28 18:44:07 +00:00
Chris Lattner
aee436bcc0
These are autogenerated
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2005-10-28 18:26:52 +00:00
Duraid Madina
f2db9b88da
DAG->DAG instruction selection for ia64! "hello world" works, not much else.
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use -enable-ia64-dag-isel to turn this on
TODO: delete lowering stuff from the pattern isel
: get operations on predicate bits working
: get other bits of pseudocode going
: use sampo's mulh/mull-using divide-by-constant magic
: *so* many patterns ("extr", "tbit" and "dep" will be fun :)
: add FP
: add a JIT!
: get it working 100%
in short: this'll be happier in a couple of weeks, but it's here now so
the tester can make me feel guilty sooner.
OTHER: there are a couple of fixes to the pattern isel, in particular
making the linker happy with big blobs of fun like pypy.
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2005-10-28 17:46:35 +00:00
Chris Lattner
4bd4a54d57
remove dead stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24054 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 04:58:24 +00:00
Chris Lattner
a411bef105
Eliminate getClass, it is not needed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24053 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 04:57:11 +00:00
Chris Lattner
0195910558
a bad case for bitfield insert
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2005-10-28 00:20:45 +00:00
Andrew Lenharth
2012cc013c
int comparison patterns
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2005-10-26 18:44:45 +00:00
Jim Laskey
2cbc207c76
Typo made worse x 2 - take 2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24018 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-26 18:07:50 +00:00
Chris Lattner
85fd97dc88
Fix an assert compiling MallocBench/gs
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2005-10-26 18:01:11 +00:00
Jim Laskey
ff2fcee846
Typo x 2
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2005-10-26 17:50:22 +00:00
Andrew Lenharth
641b64aa4b
Simplify instinfo, set random bits on more fp insts, and fix 1 opcode
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2005-10-26 17:41:46 +00:00
Jim Laskey
581a8f79bc
Give full control of subtarget features over to table generated code.
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2005-10-26 17:30:34 +00:00
Jim Laskey
f0c2be4d2b
Add attribute name and type to SubtargetFeatures.
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2005-10-26 17:28:23 +00:00
Chris Lattner
1f426deade
Add nodes for CondCodeSDNode and setcc, and add a bunch of pattern fragments
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to make it easy to use them. This lets you write patterns like:
(set PRRC:$rd, (setne GPRC:$rS, imm:$SH))
and stuff.
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2005-10-26 17:00:25 +00:00
Nate Begeman
5cd61ce1be
Add a note about some bitfield stuff we could be doing better.
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2005-10-25 23:50:02 +00:00
Nate Begeman
ae749a9bb5
Correctly Expand or Promote FP_TO_UINT based on the capabilities of the
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machine. This allows us to generate great code for i32 FP_TO_UINT now on
targets with 64 bit extensions.
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2005-10-25 23:48:36 +00:00
Chris Lattner
6e61ca6fa7
autogen undef
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2005-10-25 21:03:41 +00:00
Chris Lattner
978982628a
Add undef
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2005-10-25 21:03:14 +00:00
Chris Lattner
3075a4e94d
Allow pseudos to have patterns, no functionality change
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2005-10-25 20:58:43 +00:00
Chris Lattner
9c73f095bb
Autogen fsel
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2005-10-25 20:55:47 +00:00
Chris Lattner
eb255f2b83
Expose the fextend on the DAG instead of doing it in the matcher
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2005-10-25 20:54:57 +00:00
Chris Lattner
e6115b370a
Autogen a few new ppc-specific nodes
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2005-10-25 20:41:46 +00:00
Chris Lattner
8ecedbe2c3
The dag isel generator generates this now
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2005-10-25 20:36:10 +00:00
Chris Lattner
99ea9da872
Be a bit more paranoid about calling SelectNodeTo
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2005-10-25 20:26:41 +00:00
Chris Lattner
3393e80a06
Fix a couple of minor bugs. The first fixes povray, the second fixes things
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if the dag combiner isn't run
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2005-10-25 19:32:37 +00:00
Jim Laskey
34bd5d5d87
Preparation of supporting scheduling info. Need to find info based on selected
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CPU.
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2005-10-25 15:15:28 +00:00
Chris Lattner
08a6b3cf7e
do not wrap this whole file in namespace llvm
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2005-10-24 06:38:35 +00:00
Chris Lattner
02d608bd5f
Make this build with GCC 4.1, patch contributed by Vladimir A. Merzliakov!
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2005-10-24 04:51:35 +00:00
Chris Lattner
f36aeedaa3
DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now
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2005-10-24 02:26:13 +00:00
Chris Lattner
aa9b596c5d
only build .a version of this library
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2005-10-24 02:14:49 +00:00
Chris Lattner
635df00b02
There is no need to build an archive version of this library
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2005-10-24 02:09:03 +00:00
Chris Lattner
11686f1c07
This file is hopelessly out of date
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2005-10-24 02:07:08 +00:00
Chris Lattner
2224dcc88c
Simplify this, matching changes in the tblgen emitter
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2005-10-23 22:34:25 +00:00
Chris Lattner
8ec9f331d2
Simplify this due to changes in the tblgen side
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2005-10-23 22:33:22 +00:00
Chris Lattner
aa38be17c8
mark this as beta
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2005-10-23 22:23:45 +00:00
Chris Lattner
3e808a45b3
If a user requests help, give them help on both features and processors
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2005-10-23 22:23:13 +00:00
Chris Lattner
ed465f5407
Autogen subtarget information from .td files.
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2005-10-23 22:15:34 +00:00
Chris Lattner
5882e40ded
Add subtarget feature/processor defns to the .td file
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2005-10-23 22:08:45 +00:00
Chris Lattner
c8d28890f6
rearrange things a bit so that instructions can use subtarget features in the
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future.
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2005-10-23 22:08:13 +00:00
Chris Lattner
f690e6f3f6
add a marker
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2005-10-23 22:07:20 +00:00
Chris Lattner
ffff6175ef
add a note that Nate mentioned last week
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2005-10-23 21:44:59 +00:00
Chris Lattner
1171ff4fd7
Put some of my random notes somewhere public
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2005-10-23 19:52:42 +00:00
Chris Lattner
ba76c21858
Improve help output.
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2005-10-23 05:33:39 +00:00
Chris Lattner
2e1f823aed
improve -help output
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2005-10-23 05:28:51 +00:00
Chris Lattner
54195c1a9d
Move static functions from .h file, reduce #includes, pass strings by const&,
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use LowercaseString from StringExtras.h, remove extraneous space from help
output.
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2005-10-23 05:26:26 +00:00
Andrew Lenharth
8b7f14e970
Add several things.
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loads
branches
setcc
working calls
Global address
External addresses
now I can manage malloc calls.
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2005-10-23 03:43:48 +00:00
Andrew Lenharth
756fbeb905
Well, the Constant matching pattern works. Can't say much about calls or globals yet.
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2005-10-22 22:06:58 +00:00
Chris Lattner
5ef4d8dd6d
This file is entirely ifdef'd out
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2005-10-22 19:37:08 +00:00
Jim Laskey
5476b9bfce
Add g3 back to the mix and reorder to irritate them anal folk. Actually, it's
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to group appropriately and provide cues to maintainers that the lists don't
need to be ordered.
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2005-10-22 08:04:24 +00:00
Chris Lattner
4245f1d790
64-bit reg support should not be enabled by default, as support isn't complete.
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2005-10-21 22:15:43 +00:00
Chris Lattner
dabb8291e8
Instead of aborting if not a case we can handle specially, break out and
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let the generic code handle it. This fixes CodeGen/Generic/2005-10-21-longlonggtu.ll on ppc.
also, reindent this code
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2005-10-21 21:17:10 +00:00
Jim Laskey
f5fc2cbd6b
Plugin new subtarget backend into the build.
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2005-10-21 19:05:19 +00:00
Chris Lattner
d2fc54edc4
silence a release mode warning
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2005-10-21 16:01:26 +00:00
Nate Begeman
ae1641c39f
Match rotate. This does actually match the rotates in an rc5 cipher, but I
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haven't seen it fire on our testsuite.
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2005-10-21 06:36:18 +00:00
Nate Begeman
d5ce204c5f
Don't generate operations that aren't yet supported
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2005-10-21 01:52:45 +00:00
Nate Begeman
0b2973aef2
Kill some now-dead code.
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2005-10-21 01:52:20 +00:00
Andrew Lenharth
fe9234db9b
byte zap not immediate goodness
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2005-10-21 01:24:05 +00:00
Nate Begeman
405e3ecb56
Invert the TargetLowering flag that controls divide by consant expansion.
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Add a new flag to TargetLowering indicating if the target has really cheap
signed division by powers of two, make ppc use it. This will probably go
away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.
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2005-10-21 00:02:42 +00:00
Andrew Lenharth
1f347a318c
Inst cleanup. As a bonus, operands are in the correct order for cmovs. Expect new stuff to pass in the JIT tonight
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2005-10-20 23:58:36 +00:00
Chris Lattner
eae6d648da
Use a literal to define ineg instead of immzero
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2005-10-20 23:30:37 +00:00
Andrew Lenharth
964b6aacb4
added a few 1 operand form stuff. Seems to break regalloc on alpha. sigh
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2005-10-20 19:39:24 +00:00
Andrew Lenharth
d684e1a64d
add cttz and ctpop
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2005-10-20 19:38:11 +00:00
Andrew Lenharth
892ade722a
Sounds good, finish the intop conversion.
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2005-10-20 14:42:48 +00:00
Nate Begeman
12a923408c
Add some more patterns for i64 on ppc
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2005-10-20 07:51:08 +00:00
Chris Lattner
ae4be981b1
Add some pattern fragments to simplify the repetitive parts of the patterns
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for some common ops and use them for a few examples. Andrew, if you like
this, feel free to convert the rest over, if you hate it, feel free to
revert.
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2005-10-20 04:21:06 +00:00
Chris Lattner
d7cc4c407d
simplify this a bit by using immediates
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2005-10-20 03:57:03 +00:00
Nate Begeman
6957523b9d
Move the target constant divide optimization up into the dag combiner, so
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that the nodes can be folded with other nodes, and we can not duplicate
code in every backend. Alpha will probably want this too.
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2005-10-20 02:15:44 +00:00
Andrew Lenharth
d97591a961
forgot this one
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2005-10-20 00:29:02 +00:00
Andrew Lenharth
4907d22a90
ret 0; works, not much else
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still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.
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2005-10-20 00:28:31 +00:00
John Criswell
9811ea4567
This fixes PR638:
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Regression/CodeGen/Generic/2004-02-08-UnwindSupport.llx
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2005-10-19 20:07:15 +00:00
Jim Laskey
538421411a
Added InstrSchedClass to each of the PowerPC Instructions.
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Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23830 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 19:51:16 +00:00
Nate Begeman
2d5aff761d
Write patterns for the various shl and srl patterns that don't involve
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doing something clever.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23824 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 18:42:01 +00:00
Jim Laskey
0de8796e68
Push processor descriptions to the top of target and add command line info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23820 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 13:34:52 +00:00
Chris Lattner
f6cd147471
now that tblgen is smarter, use integers directly. This should help Andrew too
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23818 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 04:32:04 +00:00
Chris Lattner
14c09b81ea
teach ppc backend these are copies
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23813 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:50:36 +00:00
Chris Lattner
8be1fa5dc5
Convert these cases to patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23811 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:38:02 +00:00
Nate Begeman
8d94832394
Woo, it kinda works. We now generate this atrociously bad, but correct,
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code for long long foo(long long a, long long b) { return a + b; }
_foo:
or r2, r3, r3
or r3, r4, r4
or r4, r5, r5
or r5, r6, r6
rldicr r2, r2, 32, 31
rldicl r3, r3, 0, 32
rldicr r4, r4, 32, 31
rldicl r5, r5, 0, 32
or r2, r3, r2
or r3, r5, r4
add r4, r3, r2
rldicl r2, r4, 32, 32
or r4, r4, r4
or r3, r2, r2
blr
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2005-10-19 01:12:32 +00:00
Chris Lattner
e5468305a0
apply some tblgen majik to simplify the X register definitions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 00:17:55 +00:00
Nate Begeman
da32c9eed6
Make a new reg class for 64 bit regs that aliases the 32 bit regs. This
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will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.
Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG. Something wll have to be
figured out.
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2005-10-19 00:05:37 +00:00
Nate Begeman
4a95945fa5
Add the ability to lower return instructions to TargetLowering. This
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allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23802 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 23:23:37 +00:00
Jim Laskey
21f587ca24
Simple edits; remove unimplimented cases and clarify long haul SLU cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23788 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:59:23 +00:00
Chris Lattner
841d12d9ac
Fix the JIT encoding of LWA, LD, STD, and STDU.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23787 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:51:22 +00:00
Jim Laskey
076866c50f
Checking in first round of scheduling tablegen files. Not tied in as yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23786 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:23:40 +00:00
Chris Lattner
3d8df55fed
add a case
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23785 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 06:30:51 +00:00
Nate Begeman
9d2b817fcb
Do the right thing and enable 64 bit regs under the control of a subtarget
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option. Currently the only way to enable this is to specify the
64bitregs mattr flag. It is never enabled by default on any config yet.
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2005-10-18 00:56:42 +00:00
Nate Begeman
1d9d7427c4
First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is
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purely mechanical.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23778 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 00:28:58 +00:00
Nate Begeman
21e463b2bf
More PPC32 -> PPC changes, as well as merging some classes that were
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redundant after the change.
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2005-10-16 05:39:50 +00:00
Nate Begeman
34f342e36f
Remove some dead code now that the dag combiner exists.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23754 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 22:08:02 +00:00
Chris Lattner
4cb5a1b896
Remove some dead code: the ORI/ORIS cases are autogen'd. This makes
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SelectIntImmediateExpr dead.
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2005-10-15 22:06:18 +00:00
Chris Lattner
de123822e5
prune #includes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23752 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:58:54 +00:00
Chris Lattner
75c9f67370
These instructions are now autogenerated
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23751 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:44:56 +00:00
Chris Lattner
e0b2e6372f
Add a pattern for FSQRTS
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23750 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:44:15 +00:00
Chris Lattner
651dea74f6
remove dead code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23749 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:40:12 +00:00
Chris Lattner
d242419e17
remove broken SRA/rlwimi case
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23746 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 19:04:48 +00:00