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970 Commits

Author SHA1 Message Date
Chris Lattner
4ce42a776a * Move information about Implicit Defs/Uses into X86InstrInfo.def. 
* Expose information about implicit defs/uses of register through the
  MachineInstrInfo.h file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4877 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-03 05:42:53 +00:00
Chris Lattner
6af204077c Initialize implicit uses/defs fields for sparc backend to empty list 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4876 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-03 05:41:54 +00:00
Brian Gaeke
bb25f2f08d brg 
X86Implicit.cpp, X86Implicit.h: New files.
InstSelectSimple.cpp: Add some clarifications in visitCallInst comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4874 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-03 00:51:09 +00:00
Chris Lattner
8f04b0981f More support for machine code emission: raw instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4872 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-02 21:56:18 +00:00
Chris Lattner
b0f99b90df Expose explicit type 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4871 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-02 21:50:41 +00:00
Chris Lattner
76041ce515 Start implementing MachineCodeEmitter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4870 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-02 21:44:34 +00:00
Chris Lattner
4aff92860d Eliminate OtherFrm 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4868 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-02 21:40:58 +00:00
Chris Lattner
a5855c829b Remove comment 
Remove handling of OtherFrm


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4867 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-02 21:40:46 +00:00
Chris Lattner
40ead95928 Initial support for machine code emission 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4866 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-02 21:24:12 +00:00
Misha Brukman
6877dd3fb0 Fix order of operands on a store from reg to [reg+offset]. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4857 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-02 21:10:35 +00:00
Chris Lattner
f8bafe8fdb Add rawfrm flags 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4841 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-01 23:25:59 +00:00
Chris Lattner
a4978ccbcb Don't add implicit regs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4840 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-01 23:24:58 +00:00
Brian Gaeke
c2505985ce brg 
InstSelectSimple.cpp: Refactor out conversion of byte, short -> int
  from visitReturnInst() to new method, promote32().
 Use it in both visitReturnInst() and visitCallInst().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4839 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-30 11:57:28 +00:00
Brian Gaeke
18a20212d9 brg 
InstSelectSimple.cpp: First draft of visitCallInst method, handling
 int/float args.
X86InstrInfo.def: Add entries for CALL with 32-bit pc relative arg, and
 PUSH with 32-bit reg arg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4838 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-29 12:01:58 +00:00
Brian Gaeke
c11232a8c4 brg 
InstSelectSimple.cpp: Add some comments that say what I'm going to do for
 calls and casts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4832 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-26 10:43:30 +00:00
Misha Brukman
8b938664f2 Oops. Got the MOVrm and MOVmr mixed up. Fixed. We can now print out 
instructions correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4830 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-22 23:15:27 +00:00
Misha Brukman
f88a2853c8 Enable the register allocator pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4829 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-22 22:45:07 +00:00
Misha Brukman
cf2b9ac204 Added methods to read/write values to stack in .h, fixed implementation in 
.cpp to return the iterator correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4827 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-22 22:43:47 +00:00
Misha Brukman
a85d6bc2bc Added -*- C++ -*- mode to the comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4826 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-22 22:42:50 +00:00
Misha Brukman
faf0b8c401 Add a simple way to add memory locations of format [reg+offset] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4825 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-22 22:42:12 +00:00
Brian Gaeke
fa8d571bd4 lib/Target/X86/InstSelectSimple.cpp: Add visitCallInst, visitCastInst. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4821 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-22 11:07:01 +00:00
Chris Lattner
1d53ce4067 Handle cmp Reg, 0 correctly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4819 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 23:30:00 +00:00
Chris Lattner
7ef33a9076 Printing support for more stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4818 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 22:49:46 +00:00
Chris Lattner
3a9a693987 Don't add implicit operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4817 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 22:49:20 +00:00
Chris Lattner
128a7a96f0 Fix off by one bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4816 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 22:48:15 +00:00
Chris Lattner
15207f45db Add fixme 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4815 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 22:48:01 +00:00
Chris Lattner
47b4a9b2e0 Minor code cleanups 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4814 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 21:04:50 +00:00
Chris Lattner
1804233ca5 Implement printing of store instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4813 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 21:03:39 +00:00
Chris Lattner
3d3067bf6b The big change here is to handle printing/emission of X86II::MRMSrcMem 
instructions.  Right now the only users are load instructions, and Misha's
spill code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4812 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 20:44:15 +00:00
Chris Lattner
92845e37f5 Remove implicit information from instruction selector 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4811 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 18:54:29 +00:00
Chris Lattner
457adb55f9 Add printing information for MUL and DIV 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4810 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 18:54:14 +00:00
Chris Lattner
94e8ee2282 Fix a bug that prevented compilation of multiple functions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4809 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 17:26:58 +00:00
Chris Lattner
d3e0faca06 Remove opcode information for instructions that are completely defined now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4805 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 17:12:55 +00:00
Chris Lattner
644e3261d1 Add printing support for sahf & setcc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4804 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 17:10:57 +00:00
Chris Lattner
675dd2cc47 Add printing support for /0 /1 type instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4803 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 17:09:01 +00:00
Chris Lattner
85b39f229f Add support for /0 /1, etc type instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4802 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 17:08:49 +00:00
Chris Lattner
4b4e9dd937 Rename the SetCC X86 instructions to reflect the fact that they are the 
register versions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4800 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 16:19:42 +00:00
Chris Lattner
05093a51b4 Simplify setcc code a bit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4799 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 15:52:38 +00:00
Chris Lattner
77875d88d0 Support Registers of the form (B8+ rd) for example 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4798 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 02:00:20 +00:00
Chris Lattner
97ad9e1fea Dont' set flags 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4797 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 01:59:50 +00:00
Chris Lattner
233ad71051 Implement printing more, implement opcode output more 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4796 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 01:33:44 +00:00
Chris Lattner
0dc20dda5b Huge diff do to reindeinting comments. 
Basically just adds OpSize flags for instructions that need them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4795 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 01:33:28 +00:00
Chris Lattner
11e53e3c38 Add new prefix flag 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4794 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 01:32:55 +00:00
Chris Lattner
644e1abae4 Print another class of instructions correctly, giving us: xorl EDX, EDX 
for example.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4793 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 00:30:01 +00:00
Misha Brukman
7c58925050 Booleans are types too. And they get stored in bytes. And InstructionSelection 
doesn't assert fail. And everyone's happy. Yay!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4792 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 00:25:56 +00:00
Chris Lattner
900c23ced0 X86 target builds fine now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4786 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-20 20:17:03 +00:00
Misha Brukman
b83b28697c Add definitions for function headers from MRegisterInfo.h: 
Some functions are in X86RegisterInfo.cpp, others, because of the data they
need, are in X86RegisterClasses.cpp, which also defines some register classes:
byte, short, and int.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4784 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-20 18:59:43 +00:00
Misha Brukman
e1f0d8113a Check not only for MO_VirtualRegister, but MO_MachineRegister as well when 
printing out assembly. After all, we want the real thing too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4783 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-20 18:56:41 +00:00
Chris Lattner
cfe487296c Don't build X86 target yet 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4780 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-20 18:37:37 +00:00
Chris Lattner
6e6026b465 - Eliminated the deferred symbol table stuff in Module & Function, it really 
wasn't an optimization and it was causing lots of bugs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4779 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-20 18:36:02 +00:00
Misha Brukman
d2cc017f46 Add mapping in MachineFunction from SSA regs to Register Classes. Also, 
uncovered a bug where registers were not being put in a map if they were not
found...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4776 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-20 00:58:23 +00:00
Misha Brukman
90ed18c201 Sigh. Fixed some speling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4775 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-20 00:56:42 +00:00
Misha Brukman
602b9ff595 Thanks to the R8, R16, and R32 macros, I can now deal with registers that 
belong to different register classes easier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4773 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-20 00:47:40 +00:00
Brian Gaeke
c03a0cb01b Brian Gaeke says: 
lib/Target/X86/InstSelectSimple.cpp: Add a little something to
 visitBranchInst which supports conditional branches.
lib/Target/X86/X86InstrInfo.def: Add defs of JNE, JE, CMPri8


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4755 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-19 09:08:47 +00:00
Nick Hildenbrandt
a1a64f8f27 *** empty log message *** 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4754 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-18 22:21:52 +00:00
Nick Hildenbrandt
9850237536 *** empty log message *** 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4745 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-18 20:55:50 +00:00
Chris Lattner
f9f6088e17 Start trying to print instructions more correctly. For now we also print out the opcode for each instruction as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4743 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-18 06:56:51 +00:00
Chris Lattner
f21dfcddcf Expose base opcode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4742 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-18 06:56:24 +00:00
Chris Lattner
6aab9cf65c Start to add more information to instr.def 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4741 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-18 05:37:11 +00:00
Chris Lattner
239dcfd215 Add instruction annotation about whether it has a 0x0F opcode prefix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4740 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-18 01:59:28 +00:00
Chris Lattner
9213b73c19 Add more void flags 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4739 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-18 01:37:48 +00:00
Chris Lattner
92bd0f9c4d Set the void flag on instructions that should get it 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4738 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-18 01:34:36 +00:00
Chris Lattner
3b49394f4f Pass on a targetmachine 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4736 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 23:22:03 +00:00
Chris Lattner
927dd095c4 Arrange to have a TargetMachine available in X86InstrInfo::print 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4734 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 23:20:37 +00:00
Chris Lattner
e9b309ad13 Wow, I'm incapable of the simplest things today... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4732 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 23:05:21 +00:00
Chris Lattner
fb02a8b11f Rename registers to follow the intel style of all caps 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4731 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 23:03:46 +00:00
Chris Lattner
ebdc7f32e9 Fix misleading indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4730 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 22:57:23 +00:00
Chris Lattner
dbb61c6445 Reorganize printing interface a bit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4728 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 22:53:13 +00:00
Chris Lattner
a187ed92ae Add default implementation of printing interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4727 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 22:53:03 +00:00
Chris Lattner
71e83caecd Fix minor detail 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4725 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 22:33:26 +00:00
Chris Lattner
0692536b71 Fix Mul/Div clobbers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4718 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 21:56:38 +00:00
Chris Lattner
6fc3c52359 Fix a few typos, implement load/store 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4716 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 21:11:55 +00:00
Chris Lattner
9562add237 Add functions to buld X86 specific constructs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4714 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 21:03:35 +00:00
Chris Lattner
1411ba31ba Add information about memory index representation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4712 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 20:33:26 +00:00
Chris Lattner
e7236ffa94 Add load/store instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4711 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 20:33:12 +00:00
Chris Lattner
43189d17c3 Switch visitRet to use getClass() 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4710 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 20:07:45 +00:00
Brian Gaeke
6559bb96a9 include/llvm/CodeGen/MachineInstrBuilder.h: Add addClobber() inline 
convenience method.  Fix typo in comment.
lib/Target/X86/InstSelectSimple.cpp: Explicitly specify some implicit uses.
 Use MOVZX/MOVSX instead of MOV instructions with sign extend instructions.
 Take out LEAVE instructions.
 32-bit IDIV and DIV use CDQ, not CWQ (CWQ is a typo).
 Fix typo in comment and remove some FIXME comments.
lib/Target/X86/Printer.cpp: Include X86InstrInfo.h and llvm/Function.h.
 Add some simple code to Printer::runOnFunction to iterate over
  MachineBasicBlocks and call X86InstrInfo::print().
lib/Target/X86/X86InstrInfo.def: Make some more instructions with
 implicit defs "Void".  Add more sign/zero extending "move" insns
 (movsx, movzx).
lib/Target/X86/X86RegisterInfo.def: Add EFLAGS as a register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4707 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-14 22:32:30 +00:00
Brian Gaeke
20abb6bf45 InstSelectSimple.cpp: (visitReturnInst) Add return instructions with return 
values.
X86InstrInfo.def: add LEAVE instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4691 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-11 19:37:09 +00:00
Chris Lattner
0006bd7520 Fix warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4649 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-09 00:49:43 +00:00
Chris Lattner
9c1338b71c _REALLY_ fix the float constant problem 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4609 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-07 22:12:53 +00:00
Chris Lattner
eb6f8c757f Print out 'float' constants correctly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4607 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-07 19:43:59 +00:00
Brian Gaeke
1749d6359b Add instruction selection code and tests for setcc instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4603 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-07 17:59:21 +00:00
Nick Hildenbrandt
088b472eed Fixes escapeing bug in strings. Fixes test case test/Regression/CBackend/2002-11-06-PrintEscaped.c 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4583 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-06 21:40:23 +00:00
Nick Hildenbrandt
2cf2cbcefb Loads and stores can't be inlined. This fixes test/Singlesource/matrixTranspose 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4579 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-06 20:07:54 +00:00
Vikram S. Adve
c227a9a513 Remove a nasty little semi-colon someone introduced which 
prevented any machine instrs from being printed!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4557 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-06 00:34:26 +00:00
Chris Lattner
5da2e6ac70 Move function to cpp file from header 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4510 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 22:07:51 +00:00
Chris Lattner
f01729ea56 Implement signed and unsigned division and remainder 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4508 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 20:54:46 +00:00
Chris Lattner
ca9671d864 Implement multiply operator 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4506 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 20:28:58 +00:00
Chris Lattner
68aad93291 * Implement subtract 
* Merge add code into logical code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4503 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 20:13:22 +00:00
Chris Lattner
e2954c84e9 shuffle code around a bit, implement and, or, xor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4502 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 20:04:26 +00:00
Chris Lattner
51b49a9633 Add PHI node support, add comment for branch function 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4500 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 19:45:49 +00:00
Chris Lattner
2df035bb3c Implement unconditional branching support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4498 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 19:27:56 +00:00
Chris Lattner
e9913f2cff * Fix nonconstant shift case 
* Turn table into 2d table


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4496 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 01:41:55 +00:00
Chris Lattner
b1761fc4df Use a more table driven approach to handling types. Seems to simplify the 
code a bit


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4493 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 01:15:18 +00:00
Chris Lattner
d5a87f80b7 Make switch statements denser, but only because of the follow-on patch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4492 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 00:49:56 +00:00
Chris Lattner
796df73e6e * Remove dead variable 
* Shift amount is always guaranteed to be 8 bits


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4491 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 00:44:25 +00:00
Nick Hildenbrandt
7e9fea736d Fixed bug in Regression/CBackend/2002-10-30-FunctionPointerAlloca.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4486 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-01 17:37:09 +00:00
Chris Lattner
ec3e2f41cd New iostream definitions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4482 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-01 16:46:05 +00:00
Brian Gaeke
a1719c9130 InstSelectSimple.cpp: Include llvm/iOther.h for ShiftInst. 
Add ISel::visitShiftInst() to instruction select shift instructions.
 Add a comment in visitAdd about how to do 64 bit adds.

X86InstrInfo.def: Add register-to-register move opcodes and shift opcodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4477 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-31 23:03:59 +00:00
Chris Lattner
59b2b86f35 Reassociate pass now works 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4473 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-31 17:16:18 +00:00