Commit Graph

496 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
c6fcdeb8f9 Move SSE3 Move patterns to a more appropriate section
Add AVX SSE3 packed horizontal and & sub instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107405 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 17:35:02 +00:00
Bruno Cardoso Lopes
7144821c61 Add AVX SSE3 packed addsub instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 17:08:18 +00:00
Bruno Cardoso Lopes
79b634c244 Add AVX SSE3 replicate and convert instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107375 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 02:33:39 +00:00
Bruno Cardoso Lopes
6596a62076 - Add AVX SSE2 Move doubleword and quadword instructions.
- Add encode bits for VEX_W
- All 128-bit SSE 1 & SSE2 instructions that are described
  in the .td file now have a AVX encoded form already working.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107365 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-01 01:20:06 +00:00
Bruno Cardoso Lopes
e26f14d150 Add AVX SSE2 mask creation and conditional store instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 18:38:10 +00:00
Bruno Cardoso Lopes
1e4b723b20 Add AVX SSE2 packed integer extract/insert instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 17:03:03 +00:00
Bruno Cardoso Lopes
876085dcfa Add AVX SSE2 integer unpack instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107246 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 04:06:39 +00:00
Bruno Cardoso Lopes
d252fec7ae Add AVX SSE2 packed integer shuffle instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107245 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 03:47:56 +00:00
Bruno Cardoso Lopes
6d5d2b5de2 Add AVX SSE2 pack with saturation integer instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107241 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 02:30:25 +00:00
Bruno Cardoso Lopes
c0ea94a37c Add AVX SSE2 integer packed compare instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107240 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 02:21:09 +00:00
Bruno Cardoso Lopes
5a3a476750 - Add AVX form of all SSE2 logical instructions
- Add VEX encoding bits to x86 MRM0r-MRM7r


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107238 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-30 01:58:37 +00:00
Bruno Cardoso Lopes
6c9fa43716 Add *several* AVX integer packed binop instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107225 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 23:47:49 +00:00
Bruno Cardoso Lopes
147b7cad2f Add AVX ld/st XCSR register.
Add VEX encoding bits for MRMXm x86 form



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 20:35:48 +00:00
Bruno Cardoso Lopes
721ef73d88 Add AVX non-temporal stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107178 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 18:22:01 +00:00
Bruno Cardoso Lopes
ea86423cbd Add sqrt, rsqrt and rcp AVX instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107166 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 17:26:30 +00:00
Bruno Cardoso Lopes
4548260ab5 Described the missing AVX forms of SSE2 convert instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 00:36:02 +00:00
Bruno Cardoso Lopes
bdffc16d65 Add AVX convert CVTSS2SI{rr,rm} and CVTDQ2PS{rr,rm} instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106917 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 23:47:23 +00:00
Bruno Cardoso Lopes
161476ec34 Reapply r106896:
Add several AVX MOV flavors
Support VEX encoding for MRMDestReg



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106912 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 23:33:42 +00:00
Bruno Cardoso Lopes
95325b08a3 revert this now, it's using avx instead of sse :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106906 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 23:04:29 +00:00
Bruno Cardoso Lopes
544a95d716 Add several AVX MOV flavors
Support VEX encoding for MRMDestReg



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106896 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 22:27:51 +00:00
Bruno Cardoso Lopes
a0ae87fd5d Add some AVX convert instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106815 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 00:39:30 +00:00
Bruno Cardoso Lopes
788184365a - Add AVX COMI{SS,SD}{rr,rm} and UCOMI{SS,SD}{rr,rm}.
- Fix a small VEX encoding issue.
- Move compare instructions to their appropriate place.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106787 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 20:48:23 +00:00
Chris Lattner
645b209c4a Teach the x86 mc assembler that %dr6 = %db6, this implements
rdar://8013734


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106725 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 07:29:18 +00:00
Bruno Cardoso Lopes
6539dc6e6c Add AVX CMP{SS,SD}{rr,rm} instructions and encoding testcases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106705 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 00:32:06 +00:00
Bruno Cardoso Lopes
e93e300ad0 Add AVX MOVMSK{PS,PD}rr instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106683 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 21:30:27 +00:00
Bruno Cardoso Lopes
428256b818 Add tests for different AVX cmp opcodes, also teach the x86 asm parser to understand the vcmp instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106678 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 21:10:57 +00:00
Bruno Cardoso Lopes
7dbfd07e32 Add AVX SHUF{PS,PD}{rr,rm} instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106672 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 20:07:15 +00:00
Nico Weber
50b9efc2a8 Add support for the x86 instructions "pusha" and "popa".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 20:00:58 +00:00
Bruno Cardoso Lopes
62a76c6401 Add AVX compare packed instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106600 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 23:37:59 +00:00
Bruno Cardoso Lopes
0caca3967b Reapply support for AVX unpack and interleave instructions, with
testcases this time.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106593 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 23:02:38 +00:00
Bruno Cardoso Lopes
c3d57b179c Add AVX MOV{SS,SD}{rr,rm} instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 22:38:56 +00:00
Eric Christopher
97994e0262 Move a 64-bit test to the 64-bit file. Fixes an llvm-mc assertion
during test runs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106577 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 21:11:51 +00:00
Bruno Cardoso Lopes
f4f4bad696 Refactor aliased packed logical instructions, also add
AVX AND,OR,XOR,NAND{P}{S,D}{rr,rm} instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106374 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 02:44:01 +00:00
Bruno Cardoso Lopes
be4d595afd Shrink down code and add for free AVX {MIN,MAX}P{S,D}{rm,rr} instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106366 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 00:37:31 +00:00
Chris Lattner
1cf44fc051 fix rdar://7873482 by teaching the instruction encoder to emit
segment prefixes.  Daniel wrote most of this patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106364 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-19 00:34:00 +00:00
Bruno Cardoso Lopes
d7f9cc4de7 Add {mix,max}{ss,sd}{rr,rm} AVX forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106264 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 01:12:56 +00:00
Bruno Cardoso Lopes
cf125d02a0 More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105870 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-12 01:53:48 +00:00
Bruno Cardoso Lopes
7be0d2c8e9 More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rr
Handle OpSize TSFlag for AVX



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-12 01:23:26 +00:00
Bruno Cardoso Lopes
c902a59f4c More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm)
Introduce the VEX_X field


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-11 23:50:47 +00:00
Bruno Cardoso Lopes
99405df044 Reapply r105521, this time appending "LLU" to 64 bit
immediates to avoid breaking the build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105652 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-08 22:51:23 +00:00
Chris Lattner
1087f54ddb revert r105521, which is breaking the buildbots with stuff like this:
In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105524 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 04:17:30 +00:00
Bruno Cardoso Lopes
3eca98bb3a Initial AVX support for some instructions. No patterns matched
yet, only assembly encoding support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105521 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-05 03:53:24 +00:00
Kevin Enderby
31cc9655b6 MC/X86: Add alias for movzx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105005 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28 21:20:21 +00:00
Kevin Enderby
5e394429ab MC/X86: Add alias for fwait.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105001 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28 20:59:10 +00:00
Kevin Enderby
31b6c5b2f3 Fix the use of x86 control and debug registers so that the assertion failure in
getX86RegNum() does not happen.  Patch by Shantonu Sen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104994 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28 19:01:27 +00:00
Kevin Enderby
bd658918df MC/X86: Add aliases for Jcc variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 21:33:19 +00:00
Eric Christopher
bd3ba537cd Add a quick test of relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104794 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 00:53:40 +00:00
Kevin Enderby
b106543592 Fix the x86 move to/from segment register instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104731 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 20:10:45 +00:00
Eric Christopher
02b46bc942 Add support for initialized global data for darwin tls. Update comments
and testcases accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104635 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 21:28:50 +00:00
Kevin Enderby
cf50a5390c Changed the encoding of X86 floating point stack operations where both operands
are st(0).  These can be encoded using an opcode for storing in st(0) or using
an opcode for storing in st(i), where i can also be 0.  To allow testing with
the darwin assembler and get a matching binary the opcode for storing in st(0)
is now used.  To do this the same logical trick is use from the darwin assembler
in converting things like this:

fmul %st(0), %st

into this:

fmul %st(0)

by looking for the second operand being X86::ST0 for specific floating point
mnemonics then removing the second X86::ST0 operand.  This also has the add
benefit to allow things like:

fmul %st(1), %st

that llvm-mc did not assemble.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 20:52:34 +00:00
Daniel Dunbar
39e2dd7bab MC/X86: Add a hack to allow recognizing 'cmpltps' and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104626 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 19:49:32 +00:00
Daniel Dunbar
79373680ed MC/X86: Define explicit immediate forms of cmp{ss,sd,ps,pd}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104622 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 18:40:53 +00:00
Kevin Enderby
04ac770be9 The BT64ri8 record in X86Instr64bit.td was missing a REX_W which is required
for the 64-bit version of the Bit Test instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104621 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 18:16:58 +00:00
Eric Christopher
7e2f5aaa67 Make sure aeskeygenassist uses an unsigned immediate field.
Fixes rdar://8017638


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104617 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 17:33:22 +00:00
Dan Gohman
e350690e3b Fix an mmx movd encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104552 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 20:51:08 +00:00
Kevin Enderby
ca956dc0f6 MC/X86: Add aliases for CMOVcc variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104549 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 20:32:23 +00:00
Daniel Dunbar
62e4c671b6 MC/X86: Subdivide immediates a bit more, so that we properly recognize immediates based on the width of the target instruction. For example:
addw $0xFFFF, %ax
should match the same as
  addw $-1, %ax
but we used to match it to the longer encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104453 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22 21:02:33 +00:00
Daniel Dunbar
4c361972fd MC/X86: Add alias for setz, setnz, jz, jnz.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22 06:37:33 +00:00
Kevin Enderby
9d31d79493 Added retl for 32-bit x86 and added retq for 64-bit x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21 23:01:38 +00:00
Daniel Dunbar
4e7f8390c0 MC/X86: Add movq alias for movabsq, to allow matching 64-bit immediates with movq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104275 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 20:36:29 +00:00
Dan Gohman
e5e4ff974d Fix assembly parsing and encoding of the pushf and popf family of
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104231 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 16:16:00 +00:00
Dan Gohman
14aaeac5cf Define the x86 pause instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 01:35:50 +00:00
Dan Gohman
ee5673b622 Fix the sfence instruction to use MRM_F8 instead of MRM7r, since it
doesn't have a register operand. Also, use I instead of PSI, for
consistency with mfence and lfence.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104203 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-20 01:23:41 +00:00
Chris Lattner
a7f1354eb5 fix rdar://7986634 - match instruction opcodes case insensitively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104183 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 23:34:33 +00:00
Eric Christopher
591466baff A more combo tls testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104163 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 21:19:42 +00:00
Eric Christopher
aa6c72ec95 Few more simple tls testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104148 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 20:35:15 +00:00
Eric Christopher
b4e876e37e Quick test to make sure we're emitting the tbss section correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104063 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 21:40:20 +00:00
Kevin Enderby
d8ba292c9b Fixed the problem with a branch to "0b" that was not parsed by llvm-mc
correctly.  The Lexer was incorrectly eating the newline casusing it to branch
to address 0.  Updated the test case to use a "0:" label and a branch to "0b".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104038 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 17:51:35 +00:00
Daniel Dunbar
2ae4bfd769 MC/Mach-O: Implement support for setting indirect symbol table offset in section header.
Also, create symbol data for LHS of assignment, to match 'as' symbol ordering better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104033 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-18 17:28:24 +00:00
Kevin Enderby
ebe7fcd041 Added support in MC for Directional Local Labels.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103989 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 23:08:19 +00:00
Eric Christopher
c6177a4531 More data/parsing support for tls directives. Add a few more testcases
and cleanup comments as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103985 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 22:53:55 +00:00
Daniel Dunbar
648ac5153e MC/Mach-O/x86: Optimal nop sequences should only be used for the .text sections, not all sections in the text segment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103981 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 21:54:30 +00:00
Daniel Dunbar
db9014dd8b MC/Mach-O: Reverse order of SymbolData scanning when emitting instructions.
- This fixes a string table mismatch with 'as' when two new symbols are defined
   in a single instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103979 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 21:19:59 +00:00
Daniel Dunbar
b18d2dd115 MC/Mach-O: Fix some differences in symbol flag handling.
- Don't clear weak reference flag, 'as' was only "trying" to do this, it wasn't
   actually succeeding.
 - Clear the "lazy bound" bit when we mark something external. This corresponds
   roughly to the lazy clearing of the bit that 'as' implements in
   symbol_table_lookup.
 - The exact meaning of these flags appears pretty loose, since 'as' isn't very
   consistent. For now we just try to match 'as', we will clean this up one day
   hopefully.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103964 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 20:12:31 +00:00
Daniel Dunbar
525a3a67c1 llvm-mc: Support reassignment of variables in one special case, when the
variable has not yet been used in an expression. This allows us to support a few
cases that show up in real code (mostly because gcc generates it for Objective-C
on Darwin), without giving up a reasonable semantic model for assignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 17:46:23 +00:00
Eric Christopher
d04d98d24f Assume that we'll handle mangling the symbols earlier and just put the
symbol to the file as we have it.  Simplifies out tbss handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103928 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17 02:13:02 +00:00
Kevin Enderby
c3ce05c594 Fix so "int3" is correctly accepted, added "into" and fixed "int" with an
argument, like "int $4", to not get an Assertion error.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103791 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 19:16:02 +00:00
Daniel Dunbar
f0f6cdb6b4 MC/Mach-O/x86_64: Darwin's special "signed_N" relocation types should only be
used to replace a normal relocation, not a reference to a GOT entry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103789 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 18:53:40 +00:00
Eric Christopher
482eba054a Add AsmParser support for darwin tbss directive.
Nothing uses this yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103757 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14 01:50:28 +00:00
Daniel Dunbar
2f93667f0b MC/Mach-O: Add another zerofill test to improve coverage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103691 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13 01:10:28 +00:00
Chris Lattner
7bb7c55a61 fix rdar://7965971 and a fixme: use ParseIdentifier in
ParseDirectiveDarwinZerofill instead of hard coding the
check for identifier. This allows quoted symbol names to
be used.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103682 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13 00:10:34 +00:00
Chris Lattner
b5505d0ee3 reapply r103668 with a fix. Never make "minor syntax changes"
after testing before committing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103681 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13 00:02:47 +00:00
Chris Lattner
3519f9d7d1 revert r103668 for now, it is apparently breaking things.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 23:40:59 +00:00
Chris Lattner
0de8e3f10a moffset forms of moves are x86-32 only, make the parser
lower them to the correct x86-64 instructions since we 
don't have a clean way to handle this in td files yet.
rdar://7947184


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103668 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 23:13:36 +00:00
Chris Lattner
2745f6e920 fix the encoding of the obscure "moffset" forms of moves, i386
part first.  rdar://7947184


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103660 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 22:48:24 +00:00
Daniel Dunbar
0481449a05 MC/X86: Extend suffix matching hack to match 'q' suffix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103535 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 00:54:20 +00:00
Daniel Dunbar
a5f1d57f65 MC/Mach-O/x86_64: Add a new hook for checking whether a particular section can
be diced into atoms, and adjust getAtom() to take this into account.
 - This fixes relocations to symbols in fixed size literal sections, for
   example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103532 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12 00:38:17 +00:00
Daniel Dunbar
db4c7e606f MC/Mach-O/x86_64: Fix PCrel adjustment for x86_64, which was using the fixup
offset instead of the fixup address as intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103527 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11 23:53:11 +00:00
Daniel Dunbar
651804c3d6 MC/Mach-O x86_64: Switch to using fragment atom symbol.
- This eliminates getAtomForAddress() (which was a linear search) and
   simplifies getAtom().
 - This also fixes some correctness problems where local labels at the same
   address as non-local labels could be assigned to the wrong atom.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103480 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11 17:22:50 +00:00
Daniel Dunbar
a8251fac10 MC/Mach-O: Fix another mismatch with .weak_definition, we shouldn't use a
scattered relocation entry with a .weak_definition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103443 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-10 23:15:20 +00:00
Kevin Enderby
a6eeb6e226 Fix i386 relocations to Weak Definitions. The relocation entries should be
external and the item to be relocated should not have the address of the
symbol added in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103302 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-07 21:44:23 +00:00
Daniel Dunbar
c26ae5ab7e MC/X86: X86AbsMemAsmOperand is subclass of X86NoSegMemAsmOperand.
- This fixes "leal 0, %eax", for example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103205 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 22:39:14 +00:00
Chris Lattner
e1611f26e3 fix rdar://7947167 - llvm-mc doesn't match movsq
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103199 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 21:48:14 +00:00
Sean Callanan
1a8b789a4b Eliminated the classification of control registers into %ecr_
and %rcr_, leaving just %cr_ which is what people expect.
Updated the disassembler to support this unified register set.
Added a testcase to verify that the registers continue to be
decoded correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103196 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 20:59:00 +00:00
Daniel Dunbar
5fe03c023c Revert r103137, fix for $ in labels. It looks like we can't actually handle this
at the token level. Consider the following horrible test case:

  a = 1
  .globl $a
  movl ($a), %eax
  movl $a, %eax
  movl $$a, %eax

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103178 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 14:46:38 +00:00
Chris Lattner
851f87c6c9 fix rdar://7946934 - in some limited cases, the assembler should
allow $ at the start of a symbol name.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103137 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 23:51:28 +00:00
Daniel Dunbar
2d7fd61e94 MC/Mach-O: Mark absolute variable's appropriately, and add Mach-O support for
writing them.
 - <rdar://problem/7885351> integrated assembler broken for i386 objc code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103112 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 19:01:05 +00:00
Daniel Dunbar
ae7fb0b03e MC/Mach-O/x86_64: Relocations in debug sections should use local relocations
when possible.
 - <rdar://problem/7934873>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103092 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 17:22:39 +00:00
Daniel Dunbar
e9f0fb4179 MC/X86: Chris pointed that 'as' isn't consistent in accepting the long form of
instructions which have no direct register usage.

Darwin 'as' accepts:
  add $0, (%rax)
but rejects
  mov $0, (%rax)
for example.

Given that, only accept suffix matches which match exactly one form. We still
need to emit nice diagnostics for failures...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103015 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04 17:31:02 +00:00
Daniel Dunbar
c918d6043b MC/X86: Add "support" for matching ATT style mnemonic prefixes.
- The idea is that when a match fails, we just try to match each of +'b', +'w',
   +'l'. If exactly one matches, we assume this is a mnemonic prefix and accept
   it. If all match, we assume it is width generic, and take the 'l' form.

 - This would be a horrible hack, if it weren't so simple. Therefore it is an
   elegant solution! Chris gets the credit for this particular elegant
   solution. :)

 - Next step to making this more robust is to have the X86 matcher generate the
   mnemonic prefix information. Ideally we would also compute up-front exactly
   which mnemonic to attempt to match, but this may require more custom code in
   the matcher than is really worth it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103012 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04 16:12:42 +00:00
Kevin Enderby
9d0838fba8 Changed llvm-mc to use the same suffixes with floating point compare
instructions as the Mac OS X darwin assembler.  Some of which like 'fcoml'
assembled to different opcodes.  While some of the suffixes were just different.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102958 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 21:31:40 +00:00
Kevin Enderby
eb612347f4 Fixed the encoding of two of the X86 movq instuctions. The Move quadword from
mm to mm/m64 and the Move quadword from xmm2/mem64 to xmm1 had the incorrect
encodings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102952 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 21:03:31 +00:00
Kevin Enderby
3c979b06c0 Fixed the encoding of the x86 push instructions. Using a 32-bit immediate value
caused the a pushl instruction to be incorrectly encoding using only two bytes
of immediate, causing the following 2 instruction bytes to be part of the 32-bit
immediate value.  Also fixed the one byte form of push to be used when the
immediate would fit in a signed extended byte.  Lastly changed the names to not
include the 32 of PUSH32 since they actually push the size of the stack pointer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 20:45:05 +00:00
Kevin Enderby
9ac7282117 Fixed the word sized Bit Scan Forward/Reverse instructions, they needed the
Operand size override prefix to be part of their records.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102556 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 23:20:40 +00:00
Johnny Chen
52d2b0ed00 Thumb instructions which have reglist operands at the end and predicate operands
before reglist were not properly handled with respect to IT Block.  Fix that by
creating a new method ARMBasicMCBuilder::DoPredicateOperands() used by those
instructions for disassembly.  Add a test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101974 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 01:01:19 +00:00
Johnny Chen
56a1afb6b0 When doing Thumb disassembly, there's no need to consider t2ADDrSPi12/t2SUBrSPi12,
as their generic counterparts t2ADDri12/t2SUBri12 should suffice.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101929 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 18:45:24 +00:00
Johnny Chen
ef37e3abb7 For t2LDRT, t2LDRBT, t2LDRHT, t2LDRSBT, and t2LDRSHT, if Rn(Inst{19-16})=='1111',
transform the Opcode to the corresponding t2LDR*pci counterpart.

Ref: A8.6.86 LDRT, A8.6.65 LDRBT, A8.6.77 LDRHT, A8.6.81 LDRSBT, A8.6.85 LDRSHT


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101915 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 17:28:50 +00:00
Johnny Chen
22e401f5d4 According to A8.6.16 B (Encoding T3) and A8.3 Conditional execution -- A8.3.1
Pseudocode details of conditional, Condition bits '111x' indicate the
instruction is always executed.  That is, '1111' is a leagl condition field
value, which is now mapped to ARMCC::AL.

Also add a test case for condition field '1111'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101817 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19 21:19:52 +00:00
Johnny Chen
4b7df442a8 ARM disassembler did not react to recent changes to the NEON instruction table.
VLD1q*_UPD and VST1q*_UPD have the ${dst:dregpair} operand now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101784 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-19 16:20:34 +00:00
Chris Lattner
eef6d78be1 teach the x86 asm parser how to handle segment prefixes
in memory operands.  rdar://7874844


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101661 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 18:56:34 +00:00
Chris Lattner
0fb372a497 testcase for r101538, patch by Nico Schmidt!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101642 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 17:22:06 +00:00
Chris Lattner
65de1b9eb3 a bunch of ssse3 instructions are misencoded to think they have an
i8 field when they really do not.  This fixes rdar://7840289


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101629 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 07:38:24 +00:00
Johnny Chen
f7e2bc80d1 Minor change to make the test case comply with Vd<0> == '0' when Q == '1'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101559 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 22:48:31 +00:00
Johnny Chen
c7b65914e0 Fixed a bug in DisassembleN1RegModImmFrm() where a break stmt was missing for a
case.  Also, the 0xFF hex literal involved in the shift for ESize64 should be
suffixed "ul" to preserve the shift result.

Implemented printHex*ImmOperand() by copying from ARMAsmPrinter.cpp and added a
test case for DisassembleN1RegModImmFrm()/printHex64ImmOperand().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101557 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 22:40:20 +00:00
Johnny Chen
16fda6982b In the same spirit of r101524, which removed the assert() from printAddrMode2OffsetOperand(),
this patch removes the assert() from printAddrMode3OffsetOperand() and adds a test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 19:57:21 +00:00
Johnny Chen
2fb10f17d8 Multiclass LdStCop was using pre-UAL syntax LDC<c>L for the L fragment. Changed
to the UAL syntax of LDCL<c>, instead.

Add a test case for this change which also tests the removal of assert() from
printAddrMode2OffsetOperand().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101527 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 19:33:23 +00:00
Johnny Chen
cd52932dce Added another test case for am3offset operand, testing Rn, #+/-imm8.
Previous checkin tested Rn, #+/-Rm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101418 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15 23:23:40 +00:00
Johnny Chen
1cfa094562 Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, not
am2offset.  Modified the instruction table entry and added a new test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101415 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15 23:12:47 +00:00
Daniel Dunbar
4c7276a4eb tests: MC/Disassembler tests depend on ARM support being compiler in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101337 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15 03:47:20 +00:00
Chris Lattner
d305035155 implement mc asmparser support for '.', which gets the
current PC.  rdar://7834775

We now produce an identical .o file compared to the cctools
assembler for something like this:

_f0:
L0:
        jmp L1
        .long . - L0
L1:
        jmp A
        .long . - L1

        .zerofill __DATA,_bss,A,0



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101227 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-14 04:40:28 +00:00
Johnny Chen
bb6e9d8cf7 Fixed a crasher in arm disassembler within ARMInstPrinter.cpp after calling
ARM_AM::getSoImmVal(V) with a legitimate so_imm value: #245 rotate right by 2.
Introduce ARM_AM::getSOImmValOneOrNoRotate(unsigned Arg) which is called from
ARMInstPrinter.cpp's printSOImm() function, replacing ARM_AM::getSOImmVal(V).

[12:44:43] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ gdb Debug/bin/llvm-mc
GNU gdb 6.3.50-20050815 (Apple version gdb-1346) (Fri Sep 18 20:40:51 UTC 2009)
Copyright 2004 Free Software Foundation, Inc.
GDB is free software, covered by the GNU General Public License, and you are
welcome to change it and/or distribute copies of it under certain conditions.
Type "show copying" to see the conditions.
There is absolutely no warranty for GDB.  Type "show warranty" for details.
This GDB was configured as "x86_64-apple-darwin"...Reading symbols for shared libraries ... done

(gdb) set args  -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
(gdb) r
Starting program: /Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
Reading symbols for shared libraries ++. done
0xf5 0x71 0xf0 0x53
Opcode=201 Name=MVNi Format=ARM_FORMAT_DPFRM(4)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 0: 1: 0: 1| 0: 0: 1: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 1: 1: 1| 0: 0: 0: 1| 1: 1: 1: 1| 0: 1: 0: 1|
-------------------------------------------------------------------------------------------------

	mvnpls	r7, Assertion failed: (V != -1 && "Not a valid so_imm value!"), function printSOImm, file ARMInstPrinter.cpp, line 229.

Program received signal SIGABRT, Aborted.
0x00007fff88c65886 in __kill ()
(gdb) bt
#0  0x00007fff88c65886 in __kill ()
#1  0x00007fff88d05eae in abort ()
#2  0x00007fff88cf2ef0 in __assert_rtn ()
#3  0x000000010020e422 in printSOImm (O=@0x1010bdf80, V=-1, VerboseAsm=false, MAI=0x1020106d0) at ARMInstPrinter.cpp:229
#4  0x000000010020e5fe in llvm::ARMInstPrinter::printSOImmOperand (this=0x1020107e0, MI=0x7fff5fbfee70, OpNum=1, O=@0x1010bdf80) at ARMInstPrinter.cpp:254
#5  0x00000001001ffbc0 in llvm::ARMInstPrinter::printInstruction (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMGenAsmWriter.inc:3236
#6  0x000000010020c27c in llvm::ARMInstPrinter::printInst (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMInstPrinter.cpp:182
#7  0x000000010003cbff in PrintInsts (DisAsm=@0x10200f4e0, Printer=@0x1020107e0, Bytes=@0x7fff5fbff060, SM=@0x7fff5fbff078) at Disassembler.cpp:65
#8  0x000000010003c8b4 in llvm::Disassembler::disassemble (T=@0x1010c13c0, Triple=@0x1010b6798, Buffer=@0x102010690) at Disassembler.cpp:153
#9  0x000000010004095c in DisassembleInput (ProgName=0x7fff5fbff3f0 "/Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc") at llvm-mc.cpp:347
#10 0x000000010003eefb in main (argc=4, argv=0x7fff5fbff298) at llvm-mc.cpp:374
(gdb) q
The program is running.  Exit anyway? (y or n) y
[13:36:26] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101053 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-12 18:46:53 +00:00
Benjamin Kramer
447b19543b unXFAIL, arm disassembler was reenabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100692 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 21:19:41 +00:00
Evan Cheng
1b0194d646 Reverting 100265 to try to get buildbots green again. Lots of self-hosting buildbots started complaining since this commit. Also xfail ARM disassembly tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100378 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 01:04:27 +00:00
Johnny Chen
b68a3ee82a Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgen
backend (ARMDecoderEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Reviewed by Chris Latter and Bob Wilson.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100233 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 22:27:38 +00:00
Daniel Dunbar
1de558b71f MC/Mach-O/x86_64: Support @GOTPCREL on symbols, even for non-PCrel relocations!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99853 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-29 23:56:40 +00:00
Bob Wilson
86afec7730 Reapply Kevin's change 94440, now that Chris has fixed the limitation on
opcode values fitting in one byte (svn r99494).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99514 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-25 16:36:14 +00:00
Daniel Dunbar
e9cfd685f5 MC: Fix refacto in MCExpr evaluation, I mistakenly replaced a fragment address with a symbol address.
- This fixes the integrated-as nightly test regressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99466 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-25 01:03:17 +00:00
Bob Wilson
014dc4e720 Speculatively revert this to see if it fixes buildbot failures.
--- Reverse-merging r99440 into '.':
U    test/MC/AsmParser/X86/x86_32-bit_cat.s
U    test/MC/AsmParser/X86/x86_32-encoding.s
U    include/llvm/IntrinsicsX86.td
U    include/llvm/CodeGen/SelectionDAGNodes.h
U    lib/Target/X86/X86InstrSSE.td
U    lib/Target/X86/X86ISelLowering.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99450 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24 23:26:29 +00:00
Kevin Enderby
760c2f34d9 Added the Advanced Encryption Standard (AES) Instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99440 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24 22:33:33 +00:00
Kevin Enderby
044be39090 Fixed the SS42AI template for the SSE 4.2 instructions with TA prefix so it does
not get an "Unknown immediate size" assert failure when used.  All instructions 
of this form have an 8-bit immediate.  Also added a test case of an example
instruction that is of this form.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24 22:28:42 +00:00
Daniel Dunbar
78fcf53a18 MC/Mach-O: Remove Darwin host specific tests, we don't need them anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99100 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20 22:36:32 +00:00
Daniel Dunbar
57a49a202f MC/Mach-O: Tweak optimal_nop test to be host independent.
- This also avoids us running valgrind on /usr/bin/as, which has leaks. :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99099 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20 22:36:29 +00:00
Kevin Enderby
b46b03b36f Fixed the encoding problems of the crc32 instructions. All had the Operand size
override prefix and only the r/m16 forms should have had that.  Also for variant
one, the AT&T syntax, added suffixes to all forms.  Also added the missing
64-bit form for 'CRC32 r64, r/m8'.  Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98980 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 20:04:42 +00:00
Daniel Dunbar
602b40f0d0 MC/Mach-O/x86_64: Add relocation support.
- This is "extraordinarily" Darwin 'as' compatible. See the litany of FIXMEs littered about for more information.
 - There are a few cases which seem to clearly be 'as' bugs which I have left unsupported, and there is one cases where we diverge but should fix if it blocks diffing .o files (Darwin 'as' ends up widening a jump unnecessarily).
 - 403.gcc build, runs, and diffs equivalently to the 'as' built version now (using llvm-mc). However, it builds so slowly that I wouldn't recommend trying it quite yet. :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98974 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 18:07:55 +00:00
Daniel Dunbar
0180daee02 MC/X86: Rename alternate spellings of {ADD64,CMP64} and mark as "code gen only" so they don't get selected by the asm matcher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98972 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 18:07:48 +00:00
Daniel Dunbar
939f8d7ca2 MC/Mach-O: Factor out isScatteredFixupFullyResolvedSimple predicate, and fix some corner cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98924 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 03:18:12 +00:00
Daniel Dunbar
c28c7689fc X86: Fix encoding for TEST64rr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 01:15:03 +00:00
Daniel Dunbar
9fdac902d4 X86MCCodeEmitter: Fix two minor issues with reloc_riprel_4byte_movq_load, we
were missing it on some movq instructions and were not including the appropriate
PCrel bias.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98880 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 21:53:54 +00:00
Daniel Dunbar
f98bc6320b MC/X86/AsmMatcher: Use the new instruction cleanup routine to implement a
temporary workaround for matching inc/dec on x86_64 to the correct instruction.
 - This hack will eventually be replaced with a robust mechanism for handling
   matching instructions based on the available target features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 20:06:02 +00:00
Chris Lattner
618d0ed4bc fix an x86-64 encoding bug Daniel found.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98855 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 20:04:36 +00:00
Chris Lattner
0f53cf2236 add a special relocation type for movq loads for object
files that produce special relocation types where the 
linker changes movq's into lea's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98839 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 18:10:56 +00:00
Daniel Dunbar
d6e59084d0 MC/Mach-O/x86_64: Temporary labels in cstring sections require symbols (and external relocations, but we don't have x86_64 relocations yet).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98583 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15 21:56:50 +00:00
Chris Lattner
3b39f89006 xfail properly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98479 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14 07:55:34 +00:00
Chris Lattner
9e2dab7dbe xfail these tests temporarily to get teh buildbots back to happy land.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98476 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14 07:32:48 +00:00
Daniel Dunbar
859c9dc867 X86: Fix ADD64i32 encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98457 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 22:49:39 +00:00
Daniel Dunbar
5691e74f97 MC/X86_64: Symbol support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98456 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 22:49:35 +00:00
Daniel Dunbar
ee0d89245e MC/Mach-O: Initial x86_64 support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98454 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 22:10:17 +00:00
Daniel Dunbar
96e2cec9c7 MC/X86_64: Fix matching of leaq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98444 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 19:31:44 +00:00
Daniel Dunbar
989ac72981 MC/X86_64: Fix matching of callq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98443 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 19:31:38 +00:00
Daniel Dunbar
da3e9f760c MC/Mach-O: PCrel relocations weren't using the right base address, they are
relative to the fragment address, not its offset. This was masked by the text
section normally being at address 0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98420 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 02:38:00 +00:00
Daniel Dunbar
d5e7705a05 MC/X86: Add temporary hack to match shrl $1,%eax correctly, to support testing
other functionality on 403.gcc compiled at -O0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98405 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 00:47:29 +00:00
Daniel Dunbar
69c695ee47 MC/X86: Add an XFAIL test where we aren't matching the correct instruction
because we don't understand how the specific instruction is doing sign
extension.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 00:47:25 +00:00
Daniel Dunbar
f08fde41f3 MC/Mach-O: Implement initial support for relaxation.
- The implementation is currently very brain dead and inefficient, but I have a
   clear plan on how to fix it.

 - The good news is, it works and correctly assembles 403.gcc (when built with
   Clang, at '-Os', '-Os -g', and '-O3'). Even better, at '-Os' and '-Os -g',
   the resulting binary is exactly equivalent to that when built with the system
   assembler. So it probably works! :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-12 22:07:14 +00:00
Daniel Dunbar
979ba5b3c7 MC/Mach-O: Implement "absolutizing" semantics of .set, by evaluating the assembly time value of variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98241 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-11 05:53:37 +00:00
Daniel Dunbar
a015c1c876 MC/Mach-O: Use the SECTDIFF relocation type for (A - B + constant) where A is external.
- I'm not sure why, but this is what 'as' does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98115 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-10 00:58:25 +00:00
Daniel Dunbar
f291be3159 MC/X86: Rename alternate spellings of ADD{8,16,32} and mark as "code gen only" so they don't get selected by the asm matcher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98098 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09 22:50:46 +00:00
Daniel Dunbar
1e8ee89c21 MC/X86: Rename alternate spellings of CMP{8,16,32} and mark as "code gen only" so they don't get selected by the asm matcher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98097 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09 22:50:40 +00:00
Daniel Dunbar
f3a066f7c3 MC/Mach-O: For PCrel relocations, we need to compensate for the PCrel adjustment when determining if we need a scattered relocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98082 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09 21:27:58 +00:00
Kevin Enderby
0e822407b2 Fix the vmxon entry in the X86InstrInfo.td so it has the correct prefix bytes
for the encoding and is not the same as vmptrld.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97992 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08 22:17:26 +00:00
Daniel Dunbar
b2b4acd757 MC/Macho-O: Align the zerofill section itself to the maximum alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08 22:03:42 +00:00
Daniel Dunbar
37fad5ce4d MC/Mach-O: Fix address compution for zero fill sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08 21:10:42 +00:00
Daniel Dunbar
b93c72cda4 X86: Fix encoding for TEST{8,16,32}rr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97982 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08 21:10:36 +00:00
Kevin Enderby
d74acb0c78 This is a patch to the assembler frontend to detect when aligning a text
section with TextAlignFillValue and calls EmitCodeAlignment() instead of
calling EmitValueToAlignment().  This allows x86 assembly code to be aligned
with optimal nops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97158 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-25 18:46:04 +00:00
Chris Lattner
a08b587494 make pcrel immediate values relative to the start of the field,
not the end of the field, fixing rdar://7651978


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96330 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 05:03:17 +00:00
Chris Lattner
b779033a23 add encoder support and tests for rdtscp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96076 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 03:42:24 +00:00
Daniel Dunbar
e9a60eb498 MC/AsmParser: Attempt to constant fold expressions up-front. This ensures we avoid fixups for obvious cases like '-(16)'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 01:28:07 +00:00
Chris Lattner
f068304b1f rip out the 'heinous' x86 MCCodeEmitter implementation.
We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:49:29 +00:00
Chris Lattner
a599de2410 remove special cases for vmlaunch, vmresume, vmxoff, and swapgs
fix swapgs to be spelled right.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96058 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:41:14 +00:00
Daniel Dunbar
9c60f534cb MC/X86: Push immediate operands as immediates not expressions when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96055 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:17:21 +00:00
Chris Lattner
ca3eeb33a8 add some disassemble testcases for weird instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:46:48 +00:00
Chris Lattner
4a2e5edb94 implement the rest of correct x86-64 encoder support for
rip-relative addresses, and add a testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96040 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:24:09 +00:00
Chris Lattner
c4d3f662fc fix the encodings of monitor and mwait, which were completely
busted in both encoders.  I'm not bothering to fix it in the
old one at this point.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 01:06:22 +00:00
Kevin Enderby
1c5bcac7d5 Remove the few # TAILCALL comments that snuck in. As they may fail on linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95827 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 00:18:12 +00:00
Kevin Enderby
ac175e251d Update the X86 assembler matcher test case now that a few more things match
with some of the recent changes that have gone into llvm-mc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95826 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 00:13:43 +00:00
Daniel Dunbar
1b6c060591 MC/X86 AsmMatcher: Fix a use after free spotted by d0k, and de-XFAIL
x86_32-encoding.s in on expectation of it passing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95806 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 21:19:28 +00:00
Daniel Dunbar
ac6dd79a55 XFAIL this on linux until I figure out what is happening.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 21:01:04 +00:00
Kevin Enderby
d901690b82 Replace this file containing 4 tests of x86 32-bit encodings with a file
containing the subset of the full auto generated test case that currently
encodes correctly.  Again it is useful as we bring up the the new encoder
to make sure currently working stuff stays working.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95791 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 19:13:56 +00:00
Kevin Enderby
40fe18f66e Fix the encoding of the movntdqa X86 instruction. It was missing the 0x66
prefix which is part of the opcode encoding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95729 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 00:10:31 +00:00
Chris Lattner
9e8528fc5c fix X86 encoder to output [disp] only addresses with no SIB byte
in X86-32 mode.  This is still required in x86-64 mode to avoid
forming [disp+rip] encoding.  Rewrite the SIB byte decision logic
to be actually understandable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95693 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 21:47:19 +00:00
Chris Lattner
e16b0fc3cb Implement x86 asm parsing support for %st and %st(4)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 00:49:22 +00:00
Chris Lattner
8f60e4d679 fix incorrect encoding of SBB8mi that Kevin noticed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95448 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 22:56:11 +00:00
Chris Lattner
3f1118310e fix a case where we'd mis-encode fisttp because of an incorrect (and
redundant with a correct one) pattern that was added for the disassembler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95446 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 22:49:06 +00:00
Chris Lattner
c8296a0d59 remove fixme
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95444 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 22:46:46 +00:00
Kevin Enderby
12ce0de462 Added support for X86 instruction prefixes so llvm-mc can assemble them. The
Lock prefix, Repeat string operation prefixes and the Segment override prefixes.
Also added versions of the move string and store string instructions without the
repeat prefixes to X86InstrInfo.td. And finally marked the rep versions of
move/store string records in X86InstrInfo.td as isCodeGenOnly = 1 so tblgen is
happy building the disassembler files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95252 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 21:04:42 +00:00
Daniel Dunbar
e7070e9006 AsmParser/X86: Add temporary hack to allow parsing "sal". Eventually we need
some mechanism for specifying alternative syntaxes, but I'm not sure what form
that should take yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95158 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 23:46:47 +00:00
Chris Lattner
4105155231 remove the # TAILCALL markers, which was causing the to fail.
It's unclear if the matcher is nondeterminstic of what here,
but I'm getting matches without TAILCALL and some other hosts
are getting matches with it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95149 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 22:36:29 +00:00
Daniel Dunbar
197f1f0246 MCAssembler/Darwin: Add a test (on Darwin) that we assemble a bunch of
instructions exactly like 'as', and produce equivalent .o files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95143 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 22:00:15 +00:00
Daniel Dunbar
e1ec617c6a MC/Mach-O: Set SOME_INSTRUCTIONS bit for sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95135 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 21:44:01 +00:00
Chris Lattner
1de46a4ab5 this apparently depends on the host somehow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95122 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 20:57:28 +00:00
Chris Lattner
d56f80358b disable this test for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95120 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 20:41:39 +00:00
Kevin Enderby
82a5946939 Added another version of the X86 assembler matcher test case.
This test case is different subset of the full auto generated test case, and a
larger subset that is in x86_32-bit.s (that set will encode correctly).  These
instructions can pass though llvm-mc as it were a logical cat(1) and then
reassemble to the same instruction.  It is useful as we bring up the parser and
matcher so we don't break things that currently work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95107 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 19:05:57 +00:00
Daniel Dunbar
b834f5d13d MC/X86 AsmParser: Handle absolute memory operands correctly. We were doing
something totally broken and parsing them as immediates, but the .td file also
had the wrong match class so things sortof worked. Except, that is, that we
would parse
  movl $0, %eax
as
  movl 0, %eax
Feel free to guess how well that worked.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 01:02:48 +00:00
Daniel Dunbar
50459580e7 MC/X86: Add a nice X86 assembler matcher test case from Kevin Enderby.
- This test case is auto generated, and has been verified to round-trip
   correctly through llvm-mc by checking the assembled .o file before and after
   piping through llvm-mc. It will be extended over time as the matcher grows
   support for more instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94857 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-29 23:32:40 +00:00
Chris Lattner
d32e803073 wirte up .file and .file to the mc asmparser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94438 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-25 19:02:58 +00:00
Chris Lattner
75f265fbbb fix a parsing problem on instructions like:
movw	$8, (_cost_table_-L97$pb)+66(%eax)

After the parens, we could still have a binop.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94345 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-24 01:07:33 +00:00
Chris Lattner
12e555c36c teach MCAsmStreamer::EmitBytes to use .ascii and .asciz
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94259 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 00:15:00 +00:00
Daniel Dunbar
8a3ee718cd Mark EH_RETURN64 as CodeGenOnly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94205 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-22 20:16:37 +00:00
Chris Lattner
6113b3d323 add an MCAsmStreamer::EmitFill specialization of EmitFill that
emits one directive instead of N.  Not doing this would be a
significant regression on the # bytes generated by .fill.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 18:52:28 +00:00
Chris Lattner
f4d9a555ba only darwin has zerofill
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93866 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 06:21:23 +00:00
Chris Lattner
516088d4ae specify a triple to use, fixing the test on non-x86-64 hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91900 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 07:01:12 +00:00
Chris Lattner
665e947740 various cleanups, make the disassemble reject lines with too much
data on them, for example:

	addb	%al, (%rax)
simple-tests.txt:11:5: error: excess data detected in input
0 0 0 0 0 
    ^



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91896 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 06:56:51 +00:00
Chris Lattner
2adbef06a6 rewrite the file parser for the disassembler, implementing support for
comments.  Also, check in a simple testcase for the disassembler,
including a test for r91864


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91894 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 06:37:58 +00:00
Daniel Dunbar
db196e82a4 Force triple in tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84257 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 16:30:02 +00:00
Daniel Dunbar
75773ff00d MC: Tweak variable assignment diagnostics, and make reassignment of non-absolute
variables and symbols invalid.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84232 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 01:57:39 +00:00
Daniel Dunbar
fffff915d5 MC: When parsing a variable reference, substitute absolute variables immediately
since they are allowed to be redefined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84230 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-16 01:34:54 +00:00
Kevin Enderby
5440f6309d Fixed MCSectionMachO::ParseSectionSpecifier to allow an attribute of "none" so
that a symbol stub section with no attributes can be parsed as in:
.section __TEXT,__picsymbolstub4,symbol_stubs,none,16


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83488 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 20:57:20 +00:00
Daniel Dunbar
06e483dae0 Move ARM and X86 specific AsmParser tests into separate subdirectories, and only
run if appropriate target is supported.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82419 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-21 00:05:30 +00:00
Chris Lattner
e895c61515 Add an intel syntax MCInstPrinter implementation. You can now
transcode from AT&T to intel syntax with "llvm-mc foo.s -output-asm-variant=1"



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82385 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-20 07:17:49 +00:00
Kevin Enderby
ca9c42c4da Added the first bits of the ARM target assembler to llvm-mc. For now it only
parses the .word directive as 4 bytes and ARMAsmParser::ParseInstruction will
give an error is called.  Broke out the test of the .word directive into two
different test cases, one for x86 and one for arm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81817 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 00:27:25 +00:00
Chris Lattner
b92c36331d unbreak this test by working around an asmparser bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81724 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-13 22:28:17 +00:00
Dan Gohman
cd60c1fb74 Unbreak these tests. Chris, please verify that these changes are intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81217 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-08 14:14:24 +00:00
Chris Lattner
0892a6d7a9 use a darwin triple
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80900 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-03 06:15:11 +00:00
Chris Lattner
17b9abb799 adjust expected lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80898 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-03 06:13:45 +00:00
Chris Lattner
2f0adae973 update test for alignment value in hex
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80876 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-03 04:03:44 +00:00
Daniel Dunbar
821e3334ed llvm-mc: Pass values to MCStreamer as MCExprs, not MCValues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80578 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-31 08:09:28 +00:00
Daniel Dunbar
e2ace509fc llvm-mc: Simplify EmitAssignment ('.set' is identical to '=').
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80577 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-31 08:09:09 +00:00
Daniel Dunbar
8c2eebe407 llvm-mc: Switch MCInst to storing an MCExpr* instead of an MCValue.
Also, use MCInst::print instead of custom code in MCAsmPrinter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80575 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-31 08:08:38 +00:00
Daniel Dunbar
3a3cb6c59e Update test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80490 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-30 07:01:09 +00:00
Daniel Dunbar
7092c7e1dc llvm-mc: MCStreamer cleanups. - Remove EmitLocalSymbol, this is unsupported for now.
- Switch Emit{CommonSymbol,Zerofill} to take alignment in bytes (for consistency).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80484 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-30 06:17:16 +00:00
Daniel Dunbar
8f4d146c34 llvm-mc: Support .comm emission.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80351 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-28 07:08:35 +00:00
Daniel Dunbar
d5a8e98ef6 llvm-mc: Support .zerofill emission.
- I'm still trying to figure out the cleanest way to implement this and match the assembler, currently there are some substantial differences.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80347 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-28 05:49:21 +00:00
Daniel Dunbar
e6cdbf2f92 llvm-mc: Emit .lcomm as .zerofill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80343 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-28 05:48:46 +00:00
Daniel Dunbar
b1126e6f4a For now, only run MC tests if X86 is configured.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80213 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-27 06:11:15 +00:00
Daniel Dunbar
7c0a3348fb llvm-mc/Mach-O: Unique sections properly, so we don't get duplicate text
sections, etc.
 - The quick and dirty way, just clone the TargetLoweringObjectFile
   code. Eventually this should be shared... somehow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80168 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-26 22:49:51 +00:00
Daniel Dunbar
959fd88334 llvm-mc/Mach-O: Don't put assembler temporary labels in the symbol table.
- I moved section creation back into AsmParser. I think policy decisions like
   this should be pushed higher, not lower, when possible (in addition the
   assembler has flags which change this behavior, for example).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80162 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-26 22:13:22 +00:00
Daniel Dunbar
6009db486e llvm-mc/Mach-O: Set .subsections_via_symbols flag properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-26 21:22:22 +00:00
Daniel Dunbar
3f6a960f9c llvm-mc/Mach-O: Add support for relocations.
- I haven't really tried to find the "right" way to store the fixups or apply
   them, yet. This works, but isn't particularly elegant or fast.

 - Still no evaluation support, so we don't actually ever not turn a fixup into
   a relocation entry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80089 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-26 13:58:10 +00:00
Daniel Dunbar
573e53627e llvm-mc: Fix tests for python variations in int printing, sigh.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80069 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-26 04:28:45 +00:00
Daniel Dunbar
6742e34385 llvm-mc/Mach-O: Add section padding where needed (to align the next section).
Also, simplify some of Mach-O writer code which can now use section addresses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80067 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-26 04:13:32 +00:00
Daniel Dunbar
5e835967dd llvm-mc/Mach-O: Set addresses for symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-26 02:48:04 +00:00
Daniel Dunbar
ad7c3d5593 llvm-mc: Improve indirect symbol support (add the indirect index table).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80059 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-26 00:18:21 +00:00
Daniel Dunbar
6aff2fbd56 llvm-mc/Mach-O: Support symbol attributes.
- This is mostly complete, the main thing missing is .indirect_symbol support
   (which would be straight-forward, except that the way it is implemented in
   'as' makes getting an exact .o match interesting).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79899 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-24 08:40:12 +00:00
Daniel Dunbar
3edd9bb7a3 llvm-mc/Mach-O: Improve symbol table support:
- Honor .globl.

 - Set symbol type and section correctly ('nm' now works), and order symbols
   appropriately.

 - Take care to the string table so that the .o matches 'as' exactly (for ease
   of testing).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79740 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-22 11:41:10 +00:00
Daniel Dunbar
605187e596 Force triple for these tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79737 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-22 09:45:43 +00:00
Daniel Dunbar
2330df6b66 llvm-mc: Improve handling of implicit alignment for magic section directives
(e.g., .objc_message_refs).
 - Just emit a .align when we see the directive; this isn't exactly what 'as'
   does but in practice it should be ok, at least for now. See FIXME.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79697 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 23:30:15 +00:00
Daniel Dunbar
d6f761e0eb llvm-mc/Mach-O: Support .o emission for .org and .align.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79684 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 23:07:38 +00:00
Daniel Dunbar
0705fbf52f llvm-mc/Mach-O: Support byte and fill value emission.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79652 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 18:29:01 +00:00
Daniel Dunbar
bc38ca7321 llvm-mc: Accept .fill size of 8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79635 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 15:43:35 +00:00
Daniel Dunbar
fb4a6b3976 llvm-mc: Start MCAssembler and MCMachOStreamer.
- Together these form the (Mach-O) back end of the assembler.

 - MCAssembler is the actual assembler backend, which is designed to have a
   reasonable API. This will eventually grow to support multiple object file
   implementations, but for now its Mach-O/i386 only.

 - MCMachOStreamer adapts the MCStreamer "actions" API to the MCAssembler API,
   e.g. converting the various directives into fragments, managing state like
   the current section, and so on.

 - llvm-mc will use the new backend via '-filetype=obj', which may eventually
   be, but is not yet, since I hear that people like assemblers which actually
   assemble.

 - The only thing that works at the moment is changing sections. For the time
   being I have a Python Mach-O dumping tool in test/scripts so this stuff can
   be easily tested, eventually I expect to replace this with a real LLVM tool.

 - More doxyments to come.

I assume that since this stuff doesn't touch any of the things which are part of
2.6 that it is ok to put this in not so long before the freeze, but if someone
objects let me know, I can pull it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79612 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-21 09:11:24 +00:00
Daniel Dunbar
c21d5883ac Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79445 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 18:35:54 +00:00
Chris Lattner
6e579c6727 fix asmstreaming of 2/4 byte elements with pow-2 alignments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79408 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-19 06:35:36 +00:00
Daniel Dunbar
e44313e0ca llvm-mc: Fix bugs where bytes were unintentionally being printed as signed.
- We now print all of 403.gcc cleanly (llvm-mc -> 'as' as diffed to 'as'), minus two 
   'rep;movsl' instructions (which I missed before).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79031 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14 19:59:24 +00:00
Daniel Dunbar
b2d0b6b8c7 llvm-mc: When handling a .set, make sure to print subsequent references to the
symbol as the symbol name itself, not the expression it was defined to. These
have different semantics due to the quirky .set behavior (which absolutizes an
expression that would otherwise be treated as a relocation).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79025 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14 19:10:46 +00:00
Daniel Dunbar
12de0df59f llvm-mc: zerofill shouldn't print quotes around the section,segment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79017 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14 18:51:45 +00:00
Daniel Dunbar
1ab7594946 llvm-mc: Support escaped characters in string literals (for .ascii and .asciz)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79010 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14 18:19:52 +00:00
Daniel Dunbar
c22e0b2443 Update llvm-mc / MCAsmStreamer to print the instruction using the actual target
specific printer (this only works on x86, for now).
 - This makes it possible to do some correctness checking of the parsing and
   matching, since we can compare the results of 'as' on the original input, to
   those of 'as' on the output from llvm-mc.

 - In theory, we could now have an easy ATT -> Intel syntax converter. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-14 03:48:55 +00:00
Daniel Dunbar
1095f2ae26 llvm-mc/AsmParser: Match hard coded registers (e.g. 'shldl %cl, %eax, %eax')
We now match all of 403.gcc (as emitted by clang). :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78750 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 23:23:44 +00:00
Daniel Dunbar
b27a41b440 llvm-mc: Fix a crash on invalid due to a typo in relocatable expression
evaluation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78692 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 17:47:52 +00:00
Daniel Dunbar
0db68f4e3a llvm-mc/X86: Parse '*' correctly (in the way the matcher expects).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78642 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 05:00:25 +00:00
Daniel Dunbar
1e840b2c61 llvm-mc: Accept .word as a synonym for .short
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78641 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 04:44:00 +00:00