Commit Graph

2721 Commits

Author SHA1 Message Date
Misha Brukman
f5f70685b6 Disable PPC64 backend by default because LLC cannot choose automatically between
SparcV9 and PowerPC64 without target triples, since they are both 64-bit
big-endian targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15688 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 17:16:43 +00:00
Misha Brukman
a1b6ae9d7c * Correct 64-bit version: blr 1 (not 0)
* BuildMI() can build 0-param instructions (e.g., NOP)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15681 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 03:30:03 +00:00
Misha Brukman
e4d093c356 * Print out full names for non-GPR or -FPR registers
* BuildMI() really *does* handle 0 params!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15680 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 03:28:47 +00:00
Misha Brukman
cc6b01b1e6 * Pointers are 8 bytes, hence cLong type on 64-bit PPC
* Fix loading of GlobalValues


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15678 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 02:53:01 +00:00
Misha Brukman
8e63dcebcc Eliminate special-casing 14-bit immediate load/store opcodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15677 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 02:51:38 +00:00
Misha Brukman
c90f2963c4 Correctly print out ASCII literal strings on AIX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15674 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 01:01:13 +00:00
Misha Brukman
ef9468cfe5 Mark R2 as available for allocation on Darwin/PPC32, but not AIX/PPC64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15673 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-12 00:10:01 +00:00
Misha Brukman
1d3527edbf * Move AIX into the llvm namespace to be accessed from RegisterInfo
* Mark InstrInfo with 32 vs. 64 bit flag
* Enable the 64-bit isel and asm printer


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15672 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 23:47:08 +00:00
Misha Brukman
a6ecd9ee47 Set the is64bit flag and propagate it to PowerPCRegisterInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15671 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 23:45:43 +00:00
Misha Brukman
dceb457607 * Set the is64bit boolean flag in PowerPCRegisterInfo
* Doubles are 8 bytes in 64-bit PowerPC, and use the general register class
* Use double-word loads and stores for restoring from/saving to stack
* Do not allocate R2 if compiling for AIX


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15670 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 23:44:55 +00:00
Misha Brukman
ca9309f22e 64-bit instruction selector and AIX-specific 64-bit asm printer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15669 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 23:42:15 +00:00
Misha Brukman
55eee3dc7a Fix names of 64-bit CMP*D* opcodes, add LWA and STD* opcodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15668 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 23:33:34 +00:00
Misha Brukman
f1f6cef161 Add support for 64-bit CMPDI, CMPLDI, and CMPLD opcodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15667 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 20:56:14 +00:00
Misha Brukman
96b6110685 Add doubleword load/store (64-bit only).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15665 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 15:54:36 +00:00
Misha Brukman
9582822341 Hyphenate ##-bit and remove first-person from comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15663 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 13:35:44 +00:00
Nate Begeman
7a4fe9be7e Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15662 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 07:40:04 +00:00
Chris Lattner
74a806cd3d Fix a case where constantexprs could leak into the PPC isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15661 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 07:34:50 +00:00
Chris Lattner
c96bb817aa Remove a bunch of ad-hoc target-specific flags that were only used by the
old asmprinter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15660 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 07:12:04 +00:00
Chris Lattner
8e61d82528 Remove a dead method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15659 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 07:07:14 +00:00
Chris Lattner
2a998bdc7c Finally, the entire instruction asmprinter is now generated from tblgen, woo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15658 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 07:02:04 +00:00
Chris Lattner
e4ead0ce62 Add asmprintergen support for the last X86 instruction that needs it: pcrelative calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15657 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 06:59:12 +00:00
Chris Lattner
8198fcfc5d This file is long dead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15656 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 06:55:12 +00:00
Chris Lattner
9795b3a0e7 Scrunch memoperands, add a few more for floating point memops
Eliminate the FPI*m classes, converting them to use FPI instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15655 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 06:50:10 +00:00
Chris Lattner
8549429a78 Move hacks up
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15654 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 06:09:55 +00:00
Chris Lattner
0f38e6ccca Make FPI take asm string and operand list
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15653 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 05:54:16 +00:00
Chris Lattner
f5d3a83f65 Nuke the Im*i* patterns, by asmprintergenifying all users.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15652 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 05:31:07 +00:00
Chris Lattner
f29ed0937f X86 instructions that read-modify-write memory are not LLVM two-address instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15651 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 05:07:25 +00:00
Chris Lattner
57a02306c5 Get rid of the Im8, Im16, Im32 classes, converting more instructions over to
asmprintergeneration


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15650 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 04:31:00 +00:00
Nate Begeman
8d963e602b Fix 255.vortex by using getClassB instead of getClass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15648 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 03:30:55 +00:00
Chris Lattner
916f96ace0 Remove dead method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15647 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 02:26:39 +00:00
Chris Lattner
66fa1dcf90 Convert asmprinter to new style of instruction printer
Start asmprintergen'ifying machine instrs with memory operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15646 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 02:25:00 +00:00
Chris Lattner
52d2f14b3e Fill out immediate operand classes, add a new Operand class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15642 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 01:53:34 +00:00
Misha Brukman
0145881cb9 Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15636 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 00:11:25 +00:00
Misha Brukman
c0f6420b96 Breaking up the PowerPC target into 32- and 64-bit subparts: Part II: 64-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15635 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 00:10:41 +00:00
Misha Brukman
3d9a6c2842 Breaking up the PowerPC target into 32- and 64-bit subparts, Part I: 32-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15634 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 00:09:42 +00:00
Misha Brukman
167deff938 Implement new constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15633 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 23:10:25 +00:00
Misha Brukman
5b5708106e Renamed PPC32 (namespace for regs, opcodes) to PPC to include 64-bit targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15631 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 22:47:03 +00:00
Misha Brukman
698fbd5b94 * Fix file header to use tablegen emacs mode instead of c++
* Wrap long line to 80 cols


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15630 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 21:24:44 +00:00
Chris Lattner
36b689009d This is purely a formatting patch that gets us closer to the mecca of fitting
X86InstrInfo.td into 80 columns


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15629 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 21:21:30 +00:00
Chris Lattner
1b9e20e32f Drop the first argument of FPI, and asmprinterify fxch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15628 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 21:02:13 +00:00
Nate Begeman
b64af918cb Fix casts of float to unsigned long
Replace STDX (store 64 bit int indexed) with STFDX (store double indexed)
Fix latent bug in indexed load generation
Generate indexed loads and stores in many more cases


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15626 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 20:42:36 +00:00
Misha Brukman
91fdc01fe1 Fix file header comment: update filename, set tablegen emacs mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15625 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 20:28:13 +00:00
Chris Lattner
30bf2d8951 This purely mechanical patch gives the "I" tblgen class operand list and asm
string operands, and adjusts all users to pass them in instead of using II.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15624 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 20:17:41 +00:00
Chris Lattner
869f477f34 Convert Ii32 instructions over to use the asmprinter generator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15621 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 19:06:36 +00:00
Misha Brukman
42efb87410 DForm 5/6 extended mneumonics take 3 arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15620 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 19:03:31 +00:00
Misha Brukman
20887f8b13 * Instruction definitions moved to SparcV9InstrInfo.td for consistency
* Defined PHI instruction and SparcV9 subclass of Target


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15615 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 18:15:31 +00:00
Misha Brukman
36dd0c539b Renamed SparcV9_Reg.td -> SparcV9RegisterInfo.td for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15614 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 18:14:04 +00:00
Misha Brukman
a91f53634c Fix DForm_4: format is `op r, r, i'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15613 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 18:07:55 +00:00
Misha Brukman
7b71776401 Fix comment header, specify type of file `tablegen'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15612 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 17:37:14 +00:00
Chris Lattner
7d620d57a4 Convert the Ii16 instructions over
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15606 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 16:22:02 +00:00