llvm-6502/test/CodeGen/Mips
Reed Kotler 8453b3f66a The next phase of Mips16 hard float implementation.
Allow Mips16 routines to call Mips32 routines that have abi requirements
that either arguments or return values are passed in floating point 
registers. This handles only the pic case. We have not done non pic
for Mips16 yet in any form.

The libm functions are Mips32, so with this addition we have a complete
Mips16 hard float implementation.

We still are not able to complete mix Mip16 and Mips32 with hard float.
That will be the next phase which will have several steps. For Mips32
to freely call Mips16 some stub functions must be created.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173320 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-24 04:24:02 +00:00
..
2008-06-05-Carry.ll
2008-07-03-SRet.ll
2008-07-06-fadd64.ll
2008-07-07-Float2Int.ll
2008-07-07-FPExtend.ll
2008-07-07-IntDoubleConvertions.ll
2008-07-15-InternalConstant.ll
2008-07-15-SmallSection.ll
2008-07-16-SignExtInReg.ll
2008-07-22-Cstpool.ll
2008-07-23-fpcmp.ll Fix the remaining TCL-style quotes found in the testsuite. This is 2012-07-02 19:09:46 +00:00
2008-07-29-icmp.ll Fix the remaining TCL-style quotes found in the testsuite. This is 2012-07-02 19:09:46 +00:00
2008-07-31-fcopysign.ll
2008-08-01-AsmInline.ll
2008-08-03-fabs64.ll
2008-08-03-ReturnDouble.ll
2008-08-04-Bitconvert.ll
2008-08-06-Alloca.ll
2008-08-07-CC.ll
2008-08-07-FPRound.ll
2008-08-08-bswap.ll
2008-08-08-ctlz.ll
2008-10-13-LegalizerBug.ll
2008-11-10-xint_to_fp.ll
2009-11-16-CstPoolLoad.ll
2010-04-07-DbgValueOtherTargets.ll
2010-07-20-Switch.ll Fix test cases. 2012-06-14 01:21:00 +00:00
2010-11-09-CountLeading.ll
2010-11-09-Mul.ll
2011-05-26-BranchKillsVreg.ll
2012-12-12-ExpandMemcpy.ll Fix a logic bug in inline expansion of memcpy / memset with an overlapping 2012-12-12 20:43:23 +00:00
addc.ll
addressing-mode.ll Initial implementation of MipsTargetLowering::isLegalAddressingMode. 2012-11-17 00:25:41 +00:00
alloca16.ll fix most of remaining issues with large frames. 2012-12-20 04:07:42 +00:00
alloca.ll [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy 2012-12-20 04:06:06 +00:00
analyzebranch.ll Fix test cases. 2012-05-12 03:25:16 +00:00
and1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
asm-large-immediate.ll The inline asm operand modifier 'n' is suppose 2012-06-21 21:37:54 +00:00
atomic.ll [mips] Fix bug in test case. Disable machine LICM to prevent instruction from 2012-11-02 21:46:42 +00:00
atomicops.ll Expand all atomic ops for mips16. 2012-10-29 16:16:54 +00:00
biggot.ll [mips] Generate big GOT code. 2012-11-21 20:40:38 +00:00
blockaddr.ll
br-jmp.ll
brconeq.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconeqk.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconeqz.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconge.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brcongt.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconle.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconlt.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconne.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconnek.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brconnez.ll Add conditional branch instructions and their patterns. 2012-10-17 22:29:54 +00:00
brdelayslot.ll [mips] Fix delay slot filler so that instructions with register operand $1 are 2012-11-16 02:39:34 +00:00
brind.ll Implement brind operator for mips16. 2012-10-28 23:08:07 +00:00
bswap.ll
buildpairextractelementf64.ll
check-noat.ll [mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directive 2012-11-02 20:56:25 +00:00
cmov.ll Fix test cases in test/CodeGen/Mips. 2012-06-02 00:05:45 +00:00
constantfp0.ll
cprestore.ll Fix test cases. 2012-05-12 03:25:16 +00:00
div_rem.ll Div, Rem int/unsigned int 2012-10-12 02:01:09 +00:00
div.ll Div, Rem int/unsigned int 2012-10-12 02:01:09 +00:00
divrem.ll
divu_remu.ll Div, Rem int/unsigned int 2012-10-12 02:01:09 +00:00
divu.ll Div, Rem int/unsigned int 2012-10-12 02:01:09 +00:00
double2int.ll
dsp-r1.ll MIPS DSP: add operands to make sure instruction strings are being matched. 2012-09-28 21:23:16 +00:00
dsp-r2.ll MIPS DSP: add operands to make sure instruction strings are being matched. 2012-09-28 21:23:16 +00:00
eh-dwarf-cfa.ll [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node. 2012-11-07 19:10:58 +00:00
eh.ll Fix test cases. 2012-05-12 03:25:16 +00:00
ex2.ll Add test case for r170674 2012-12-21 00:55:10 +00:00
extins.ll
fabs.ll Add test triples to fix win32 failures. Revert workaround from r161292. 2012-08-08 20:31:37 +00:00
fastcc.ll Implement fastcc calling convention for MIPS. 2012-06-13 18:06:00 +00:00
fcopysign-f32-f64.ll
fcopysign.ll
fmadd1.ll
fneg.ll
fp-indexed-ls.ll Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as 2012-07-31 18:16:49 +00:00
fp-spill-reload.ll Make register FP allocatable if the compiled function does not have dynamic 2012-05-09 01:38:13 +00:00
fpbr.ll
frame-address.ll [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy 2012-12-20 04:06:06 +00:00
frem.ll
global-address.ll
global-pointer-reg.ll Make the following changes in MipsAsmPrinter.cpp: 2012-05-12 00:48:43 +00:00
gpreg-lazy-binding.ll [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy 2012-12-20 04:06:06 +00:00
gprestore.ll Fix test cases. 2012-05-12 03:25:16 +00:00
helloworld.ll Change mips16 delay slot jumps to non delay slot forms by default. 2012-10-30 00:54:49 +00:00
hf16_1.ll The next phase of Mips16 hard float implementation. 2013-01-24 04:24:02 +00:00
i32k.ll implement large (>16 bit) constant loading. 2012-10-26 03:09:34 +00:00
i64arg.ll [mips] Implement MipsRegisterInfo::getRegPressureLimit. 2013-01-22 21:34:25 +00:00
imm.ll
indirectcall.ll
init-array.ll Fix UseInitArray option for MIPS target. 2012-09-05 06:17:17 +00:00
inlineasm64.ll
inlineasm_constraint.ll Use regular expression to match register names. 2012-05-11 23:00:40 +00:00
inlineasm-cnstrnt-bad-I-1.ll
inlineasm-cnstrnt-bad-J.ll
inlineasm-cnstrnt-bad-K.ll
inlineasm-cnstrnt-bad-L.ll Add support for the 'L' inline asm constraint. 2012-05-07 05:46:37 +00:00
inlineasm-cnstrnt-bad-N.ll Add support for the 'N' inline asm constraint. 2012-05-07 05:46:43 +00:00
inlineasm-cnstrnt-bad-O.ll Add support for the 'O' constraint. 2012-05-07 05:46:48 +00:00
inlineasm-cnstrnt-bad-P.ll Add support for the 'P' constraint. 2012-05-07 06:25:02 +00:00
inlineasm-cnstrnt-reg64.ll
inlineasm-cnstrnt-reg.ll Add support for the 'l' constraint. 2012-05-07 06:25:15 +00:00
inlineasm-operand-code.ll Mips specific inline asm operand modifier 'M': 2012-07-18 06:41:36 +00:00
inlineasmmemop.ll Fix test cases. 2012-05-12 03:25:16 +00:00
internalfunc.ll Fix test cases. 2012-05-12 03:25:16 +00:00
largeimm1.ll [mips] Use register number instead of name to print register $AT. 2012-11-02 21:26:03 +00:00
largeimmprinting.ll [mips] Stop reserving register AT and use register scavenger when a scratch 2012-11-03 00:05:43 +00:00
lb1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
lbu1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
lh1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
lhu1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
lit.local.cfg
llcarry.ll Implement carry for subtract/add for mips16 2012-10-26 04:46:26 +00:00
load-store-left-right.ll Rename test/CodeGen/Mips/load-shift-left-right.ll. 2012-06-04 17:50:36 +00:00
longbranch.ll [mips] Use register number instead of name to print register $AT. 2012-11-02 21:26:03 +00:00
machineverifier.ll Make machine verifier check the first instruction of the last bundle instead of 2012-06-14 20:51:13 +00:00
madd-msub.ll
memcpy.ll Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp. 2012-06-13 19:33:32 +00:00
mips16ex.ll This patch is needed to make c++ exceptions work for mips16. 2012-12-16 04:00:45 +00:00
mips16fpe.ll This code implements most of mips16 hardfloat as it is done by gcc. 2012-12-15 00:20:05 +00:00
mips64-fp-indexed-ls.ll Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as 2012-07-31 18:16:49 +00:00
mips64-sret.ll [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy 2012-12-20 04:06:06 +00:00
mips64countleading.ll
mips64directive.ll
mips64ext.ll
mips64extins.ll
mips64fpimm0.ll
mips64fpldst.ll
mips64imm.ll
mips64instrs.ll
mips64intldst.ll
mips64lea.ll
mips64load-store-left-right.ll Add a test case for mips64 unaligned load/store instructions. 2012-06-04 17:57:06 +00:00
mips64muldiv.ll
mips64shift.ll
mipslopat.ll
misha.ll Implement patterns for extloadi8 and extloadi16 2012-10-29 19:39:04 +00:00
mul.ll Patch for integer multiply, signed/unsigned, long/long long. 2012-10-05 18:27:54 +00:00
mulll.ll Patch for integer multiply, signed/unsigned, long/long long. 2012-10-05 18:27:54 +00:00
mulull.ll Patch for integer multiply, signed/unsigned, long/long long. 2012-10-05 18:27:54 +00:00
neg1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
not1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
null.ll Change mips16 delay slot jumps to non delay slot forms by default. 2012-10-30 00:54:49 +00:00
o32_cc_byval.ll [mips] Implement MipsRegisterInfo::getRegPressureLimit. 2013-01-22 21:34:25 +00:00
o32_cc_vararg.ll Set transient stack alignment in constructor of MipsFrameLowering and re-enable 2012-08-02 18:15:13 +00:00
o32_cc.ll
or1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
private.ll
ra-allocatable.ll Make register Mips::RA allocatable if not in mips16 mode. 2012-07-10 00:19:06 +00:00
rdhwr-directives.ll test case for r159770. 2012-07-05 19:29:31 +00:00
rem.ll Div, Rem int/unsigned int 2012-10-12 02:01:09 +00:00
remat-immed-load.ll [mips] Set flag isAsCheapAsAMove flag on instruction LUi. 2012-11-03 00:26:02 +00:00
remu.ll Div, Rem int/unsigned int 2012-10-12 02:01:09 +00:00
return_address.ll [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy 2012-12-20 04:06:06 +00:00
return-vector-float4.ll Test case for r162008. 2012-08-16 03:48:41 +00:00
return-vector.ll Implement MipsTargetLowering::CanLowerReturn. 2012-10-10 01:27:09 +00:00
rotate.ll
sb1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
select.ll
selectcc.ll Fix function select_cc_f32 in test/CodeGen/Mips/selectcc.ll. 2012-07-16 23:56:51 +00:00
selpat.ll implement mips16 patterns for select nodes 2012-10-25 21:33:30 +00:00
seteq.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
seteqz.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setge.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setgek.ll fix test setgek.ll so that it will not give false "make check" 2012-10-26 01:29:42 +00:00
setle.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setlt.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setltk.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setne.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setuge.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setugt.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setule.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setult.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
setultk.ll implement setXX patterns 2012-10-23 01:35:48 +00:00
sh1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
shift-parts.ll Expand 64-bit shifts if target ABI is O32. 2012-05-09 00:55:21 +00:00
sitofp-selectcc-opt.ll Test case for r160036. 2012-07-11 19:50:46 +00:00
sll1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
sll2.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
small-section-reserve-gp.ll In MipsDAGToDAGISel::SelectAddr, fold add node into address operand, if its 2012-08-24 20:21:49 +00:00
sra1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
sra2.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
srl1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
srl2.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
stacksize.ll Test case for r159240. 2012-06-27 00:40:34 +00:00
stchar.ll This patch is for the implementation of mips16 complex pattern addr16. 2012-10-28 06:02:37 +00:00
stldst.ll checking test case for r164811. was an omission to not check this in. this was already approved 2012-10-01 21:35:06 +00:00
sub1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
sub2.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
swzero.ll Don't modify MO while use_iterator is still pointing to it. 2012-08-09 22:08:24 +00:00
tailcall.ll Test case for r167039. Check that tail-call optimization is disabled for 2012-10-31 17:25:23 +00:00
tls16_2.ll Implement MipsHi for mips16 2012-10-27 00:57:14 +00:00
tls16.ll implement mips16 tls global addr 2012-10-26 22:57:32 +00:00
tls-alias.ll Add option disable-mips-delay-filler. Turn on mips' delay slot filler by 2012-08-22 02:51:28 +00:00
tls-models.ll Extend the IL for selecting TLS models (PR9788) 2012-06-23 11:37:03 +00:00
tls.ll [mips] Implement MipsRegisterInfo::getRegPressureLimit. 2013-01-22 21:34:25 +00:00
uitofp.ll Fix bug 13532. 2012-08-28 02:12:42 +00:00
ul1.ll Handled unaligned load/stores properly in Mips16 2012-09-15 01:02:03 +00:00
unalignedload.ll Fix test cases in test/CodeGen/Mips. 2012-06-02 00:05:45 +00:00
vector-load-store.ll MIPS DSP: add vector load/store patterns. 2012-09-27 01:50:59 +00:00
vector-setcc.ll [mips] MipsTargetLowering::getSetCCResultType should return a vector type if 2013-01-04 20:06:01 +00:00
weak.ll
xor1.ll 1. Redo mips16 instructions to avoid multiple opcodes for same instruction. 2012-08-03 22:57:02 +00:00
zeroreg.ll Make the following changes in MipsAsmPrinter.cpp: 2012-05-12 00:48:43 +00:00