Apple-2-HW/GR8RAM
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Author SHA1 Message Date
Zane Kaminski
30e22606d2 Ignore Quartus stuff 2021-04-21 23:09:07 -04:00
Zane Kaminski
1d501dc888 Register Apple address bus on PHI0 rising edge 2021-04-21 20:06:56 -04:00
Zane Kaminski
fb67c0d06b Change IOROMEN logic back to synchronous reset 2021-04-21 09:21:35 -04:00
Zane Kaminski
f4801e7838 Output read data on falling edge to get more hold time 2021-04-21 09:19:57 -04:00
Zane Kaminski
2d951956ab Revert "Updated slew rate/current strength assignments" 
This reverts commit 5db5490f52.
 2021-04-20 05:50:09 -04:00
Zane Kaminski
5db5490f52 Updated slew rate/current strength assignments 2021-04-20 05:43:37 -04:00
Zane Kaminski
111d823b0c Latch config DIP switches at boot 
Also rearranged GR8RAM.v
 2021-04-20 04:23:57 -04:00
Zane Kaminski
5de728771b Works better? 2021-04-20 04:10:26 -04:00
Zane Kaminski
35f01c4071 Documentation update 2021-04-20 01:49:44 -04:00
Zane Kaminski
48101a6912 Add "ZK, GF" to board 2021-04-20 01:47:09 -04:00
Zane Kaminski
fa3f658174 Fabbed 2021-04-19 05:43:21 -04:00
Zane Kaminski
6d4228d92a Sorta works 2021-04-19 02:57:51 -04:00
Zane Kaminski
7e36c7e23b Added CKE back 2021-04-18 20:24:58 -04:00
Zane Kaminski
6dd1a845ec Sorta works 2021-04-18 06:01:08 -04:00
Zane Kaminski
be4511a53d Remove CKE 2021-04-18 03:59:56 -04:00
Zane Kaminski
b207b22521 Make apple boot 
Apple boots but SDRAM not working. Register R/W/increment works
 2021-04-18 03:54:45 -04:00
Zane Kaminski
32025498f8 Update RAM Map 2021-04-12 03:46:33 -04:00
Zane Kaminski
d8a5dc069d idk 2021-04-11 15:39:19 -04:00
Zane Kaminski
fc2e875ac2 Works? 2021-04-03 03:44:42 -04:00
Zane Kaminski
763861e444 ugh 2021-03-19 16:38:48 -04:00
Zane Kaminski
e4bfc93b1f before remove UFM 2021-03-19 14:23:33 -04:00
Zane Kaminski
a336f5969b hmm 2021-03-19 06:59:22 -04:00
Zane Kaminski
4defba0f50 better 2021-03-19 06:45:31 -04:00
Zane Kaminski
72851cefc5 ugh 2021-03-19 02:56:20 -04:00
Zane Kaminski
686fac229e idk 2021-03-15 13:40:59 -04:00
Zane Kaminski
fdbc92725a Remove old CPLD stuff 2021-03-15 13:40:41 -04:00
Zane Kaminski
0a649d68ac Fabbed 2021-02-17 19:29:24 -05:00
Zane Kaminski
e2a3901004 reset button detect 2020-10-25 05:22:14 -04:00
Zane Kaminski
312ef9354d Board done? 2020-10-07 23:32:57 -04:00
Zane Kaminski
13c6a59278 Sketch of verilog 2020-10-07 23:32:29 -04:00
Zane Kaminski
089fee98b8 Update .gitignore 2020-05-15 22:51:14 -04:00
Zane Kaminski
fbd98b8928 Update .gitignore 2020-05-15 18:49:20 -04:00
Zane Kaminski
0ad3b4640a Many changes 2020-03-10 18:54:44 -04:00
Zane Kaminski
ac8cf35610 Put FullIOEN back 2020-02-26 03:37:20 -05:00
Zane Kaminski
ef9b5852fb Added transfer counters 2020-02-26 03:34:33 -05:00
Zane Kaminski
fe0a092924 Added separate configuration section 2020-02-26 03:31:20 -05:00
Zane Kaminski
490fcfb8e7 Cleanup 2020-02-26 03:15:36 -05:00
Zane Kaminski
04be5a0257 Removed inhibit output 2020-02-26 03:14:33 -05:00
Zane Kaminski
92cde65a9d Moved REGEN and IOROMEN (no functional change) 2020-02-26 03:14:13 -05:00
Zane Kaminski
a4f29ea751 Removed SetWR and FullIOEN 2020-02-26 02:13:35 -05:00
Zane Kaminski
764b09ba6a Comments, no actual changes to CPLD verilog 2020-02-16 22:03:57 -05:00
Zane Kaminski
88a4169ab6 Fixed previous problem, working again 2020-02-16 00:11:12 -05:00
Zane Kaminski
c5f1e637ac Doesn't work but committing for posterity 2020-02-15 23:15:54 -05:00
Zane Kaminski
c7cd1bb11e Removed AVR-JTAG-10 connector footprint 2020-02-09 03:40:57 -05:00
Zane Kaminski
6e6813786d Merge branch 'dev' of https://github.com/ZaneKaminski/GR8RAM into dev 2020-01-26 15:15:07 -05:00
Zane Kaminski
a2eecf4475 Separated CSDBEN 2020-01-26 15:13:37 -05:00
Zane Kaminski
85e3eb627d Removed state counter reset 2019-12-21 01:46:05 -05:00
Zane Kaminski
3e06d30382 Fixed bugs in new PLD stuff 2019-10-20 22:41:24 -04:00
Zane Kaminski
79dd794f45 New PLD revision 
For write operations, register data is latched and CAS signal becomes in the middle of S6, 70ns before the end of PHI0. This gives more write data setup time, which may be needed on the Apple II with the 1 MHz 6502.
 2019-10-18 15:07:38 -04:00
Zane Kaminski
21f18c14db Recompiled just to be sure 2019-10-13 21:18:41 -04:00