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387 Commits 4 Branches 8 Tags 7.3 MiB
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44 Commits

Author SHA1 Message Date
David Banks
3e7bda697c Replace special command with x interrupt control commands 
Change-Id: I991171d6923cdc928dd9dbb9823c43aee71661be
 2021-11-18 14:45:05 +00:00
David Banks
a7cb67c469 Z80: Rd/Wr Mem/IO breakpoint/watchpoint sampled in middle of T3 
Change-Id: I9dcca58f121da9e443bd18da8f13a099cfbc2056
 2021-03-20 17:22:53 +00:00
David Banks
c0275ff059 Make commands 6-bits, add Special and TimerMode commands 
Change-Id: I8862fba0cf4c1e54ee831a547bf3337bbe7cf973
 2020-06-21 14:12:33 +01:00
David Banks
6ac7902449 Z80: tristate A and D when reset asserted 
Change-Id: Ieeb558b5df1a7b3705874468c98a0b72ebb2d505
 2020-01-28 12:00:20 +00:00
David Banks
38c57c75a3 Z80: Fix timing of monitor IO cycles 
Change-Id: I8c6251afc2e2aaeaa6612458d872e448d6386ea8
 2019-11-08 09:53:47 +00:00
David Banks
41ca5fd481 Z80: fix sw_reset_cpu (sw1) 
Change-Id: I75484366054a6175c246fd6bd82b3eb8b937218e
 2019-11-04 13:16:36 +00:00
David Banks
30cdb27f5c Z80: add 20-40ns additional address hold time (z80 co pro issue) 
Change-Id: I2596b4a9d7c753f78ff6d431458da0ec9bb38a3d
 2019-11-04 13:01:18 +00:00
David Banks
8724119101 All: rename switches to represent their real function 
Change-Id: I6dd61b8b7165e617363d61df5194e35c1a9dcc92
 2019-11-04 09:31:56 +00:00
David Banks
66d109494e All: refactor reset logic, add debouncing 
Change-Id: Ie7b57ffcb6aa9aedd52e0b633be16775e9eca822
 2019-11-04 09:18:30 +00:00
David Banks
029ee57f71 BusMonCore: clean up switch/led names 
Change-Id: I09e2778ba3718399c436aeb32f587a1cff4f1108
 2019-11-02 19:31:32 +00:00
David Banks
cfce5b1bd7 Z80/6809: rename clocks for consistency 
Change-Id: Iecd3ac5ede39865efc58eaa9e45f5892a44acb82
 2019-11-02 19:31:32 +00:00
David Banks
d9f53c1f09 Z80: refactor at top level to better support tristateable outputs 
Change-Id: Ic4a55eb99c85ff2032079d8d12c7d7e44803b6e2
 2019-11-02 13:26:00 +00:00
David Banks
d23ebe6913 Z80: push tristating up to Z80CpuMon 
Change-Id: I6fd3e0a170f908d47a7cf0a7f82ab4f74ed980d9
 2019-11-01 18:31:31 +00:00
David Banks
71cb5ff561 Z80: started implementing BUSRQ/BUSAK 
Change-Id: I3d5ef9842ff5346a2e5df96d69e47ef94a81d8b8
 2019-11-01 17:48:17 +00:00
David Banks
ceedc701ca Z80: cosmetic (remove replication of a register) 
Change-Id: I9ac3bf846da6f713e12b3d336cd9a25b5b6d8c96
 2019-10-30 17:41:50 +00:00
David Banks
c6bc245b3d Z80: indicate NMI and INT cycles when single stepping 
Change-Id: Iafef4059bd136dd9f3aebf2b03ab5ac186e035a6
 2019-10-29 15:48:43 +00:00
David Banks
4818f026b2 Removed unused h44780 support (free AVR PortA) 
Change-Id: Iadde3718cfd6e8be08b680796d8c9cd01016e694
 2019-10-29 14:56:16 +00:00
David Banks
b6abb6964a Z80: Update all builds to 8 comparators and 16KB code 
Change-Id: I8adc986caab323de395301ba397f4c7874e50d49
 2019-10-27 17:32:29 +00:00
David Banks
ab80df2406 Z80: give a tad more address delay time (Acorn 2nd Proc issue) 
Change-Id: I4872f8cc25d68978e856610ca7abaf4a12520028
 2019-10-27 16:27:35 +00:00
David Banks
e76bdc6da2 Z80: Stop T80 in T3 not T2 (work in progress) 
Change-Id: I19fa754cc09a068b628116b9636a995c162ad964
 2019-10-27 14:52:42 +00:00
David Banks
d479dedf4b Z80: fix bug when NOP mode disbled 
Change-Id: I1853967582bf241a74f8fd8687deda2d5555b153
 2019-10-27 10:14:35 +00:00
David Banks
2c4ad8363b Z80: corrected watch/breakpoint when wait is being used 
Change-Id: Ifb464548650e82fc655524186c07f98ed188e957
 2019-10-26 17:39:56 +01:00
David Banks
c39cf8649b Z80: Added mode input to control idle mode 
Change-Id: I59c4696c9921ecad62be0785764fdf35ec9d82d5
 2019-10-26 15:35:53 +01:00
David Banks
26f0bea110 Z80: Output NOPs when paused (inc M1) 
Change-Id: I100fac021d68662497fbd2d0c7428dcaf9ef98a3
 2019-10-26 15:19:44 +01:00
David Banks
ac521aad15 Z80: support interrupt masking in hardware 
Change-Id: I97683cc03e9d65e496e5f9f2ee366cc0bc18087b
 2019-10-25 17:14:27 +01:00
David Banks
a29aa3015a lx9_dave z80: increase code space to 32KB 
Change-Id: I7ab22f8cca51184b94e709336b661b8685d02d0b
 2019-10-25 17:11:13 +01:00
David Banks
5845409961 z80: added a resume state 
This allows time for the paused instruction to be re-read

Without this, the Acorn Z80 Co Pro always seemed to be single
stepping NOP instructions.

Change-Id: I0bcb424293071efc0370b862854455a33f42faf2
 2019-10-15 11:46:50 +01:00
David Banks
50658b358e z80: generate RFSH_n cycles when stopped 
Change-Id: Ice9a78932bda74098cdde8d0a5571bc4bb784bb4
 2019-10-14 20:26:04 +01:00
David Banks
d9d552475a z80: rework wait state / break point logic 
Change-Id: I2b41c014165e8d753693d3ed7806087e85202a6e
 2019-10-14 17:33:32 +01:00
David Banks
4c746994cb z80: major rewrite of memory access state machine 
Change-Id: Icc5c7c991120ed155691c1e74517ac02f8ea2ada
 2019-10-14 13:35:13 +01:00
David Banks
f2974d12df Swapped names of sw_interrupt_n and sw_reset_n (as they were wrong way around) 
Change-Id: I8819b4898be3beb36ec7f2ecb97f6797a7ab03b2
 2017-08-01 08:18:20 +01:00
David Banks
6415a81a40 On LX9 board, updated Tx=51 and Rx=55 
Change-Id: I5bcd032eab29ef93d36e8011fee673028042483f
 2017-07-29 19:55:27 +01:00
David Banks
7453cf4f9f LX9 support: massive refactor of the build system 
Change-Id: I75ff141a0d3b2c30a37d8f0e497f4f923e302b8b
 2017-07-26 14:59:20 +01:00
David Banks
79d890bcb9 LX9 support: in Z80CpuMon made the switch/led polarity configurable with generics 
Change-Id: I026bc8e56fe760b453edf970b33f6897a695d0d2
 2017-07-25 19:18:59 +01:00
David Banks
de16b3af1a Eliminated some warnings - changes mostly cosmetic 
Change-Id: I141b05c932d0736e689ff3a2cb2c90c24c850933
 2015-11-29 12:06:42 +00:00
David Banks
e63266f720 Made AVR XPM and XDM more generic 
Change-Id: I0025d56d4ba7fa3e20d73f09ac51068ffd1859c5
 2015-11-28 17:22:23 +00:00
David Banks
b563a030ee Refactor: 1st stage 
Change-Id: I8889ff76ce802099fae67c147e110356adbd23ac
 2015-10-31 13:45:09 +00:00
David Banks
727a1c0f2a Implemented IO watches/breakpoints; fixed a bug with stepping through CB/DD/ED/FD prefixed opcodes which have 2 M1 cycles; version not 0.47 
Change-Id: Iad5cb406bd96a8020ccb65be5cd440bebec20481
 2015-06-30 14:19:19 +01:00
David Banks
caec07483d Fixed a problem with breakpoints running on one instruction on the Z80, version now 0.46 
Change-Id: I597087a8ed7d4da211c706e0c4972f5d037706ee
 2015-06-29 17:16:23 +01:00
David Banks
6d0ec41db0 Added commands to read/write/dump Z80 IO space; version now 0.45 
Change-Id: I85e99f8c19bd285f2dd69ea46b0e662499a5d9e2
 2015-06-29 14:43:20 +01:00
David Banks
e66ecdfc3e Made sure CycleCount stopped when Z80 is paused 
Change-Id: Ia5d4a7d216a089e06e1aaa86bcd43d512a429aaa
 2015-06-28 22:17:32 +01:00
David Banks
0c0fde6a32 Working Z80 memory access and disassembler in the small GODIL, incremented version to 0.44 
Change-Id: I718be7476ec330743c206e737389856fc4b41fc8
 2015-06-28 19:42:25 +01:00
David Banks
e4e0f864df Switched to Timing-Driven Packing, fixed a bug with instr wait states that meant single stepping executed RST 38 because FF was read off databus; increased comparators to 8; incremented version to 0.43. Works with 100pF capgit add -u! 
Change-Id: Ie6c8c8fc610599516eb1baf957d001079713e462
 2015-06-27 18:40:12 +01:00
David Banks
9a68d96233 Initial checking of Z80 work; slight refactor of BusMonCore; version updated to 0.41 
Change-Id: I95f574abb93e84ffb5ca44c45b4c9aa8304e2e58
 2015-06-27 11:07:58 +01:00