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9,125 Commits 9 Branches 118 Tags 496 MiB
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2552 Commits

Author SHA1 Message Date
Thomas Harte
1935d968c5 Add ability to suggest solutions. 2022-05-13 15:27:11 -04:00
Thomas Harte
84cfbaa0a4 Remove manual test count, now that all are being performed. 2022-05-13 11:00:26 -04:00
Thomas Harte
0d81992f6a Move object creation. 2022-05-13 10:50:16 -04:00
Thomas Harte
6594b38567 Tidy up, and reduce for now to a summary report. 2022-05-13 08:02:20 -04:00
Thomas Harte
2e796f31d4 Support interrupts; documentation to come. 2022-05-12 20:52:24 -04:00
Thomas Harte
3d8f5d4302 Improve failure logging. 
This confirms that it's only the *BCDs and DIVU/DIVS in which I do not match the tests.
 2022-05-12 20:23:32 -04:00
Thomas Harte
2fa6b2301b Move string logic into Preinstruction. 2022-05-12 19:46:08 -04:00
Thomas Harte
4ba20132b9 Avoid repeated allocations on the new path, reducing total runtime by almost two thirds. 2022-05-12 16:35:41 -04:00
Thomas Harte
192513656a After much guesswork, fix SBCD and thereby pass flamewing tests. 2022-05-12 11:39:01 -04:00
Thomas Harte
f3c1b1f052 Name flags, remove closing underscores on exposed data fields. 2022-05-12 08:19:41 -04:00
Thomas Harte
56ce1ec6e8 No need to subclass. 2022-05-11 21:25:38 -04:00
Thomas Harte
de168956e4 Fix tested operand order. 2022-05-11 16:44:39 -04:00
Thomas Harte
5b80844d81 Add a sanity test count, temporarily. 2022-05-11 16:34:28 -04:00
Thomas Harte
17add4b585 Introduce and overwhelmingly fail the flamewing BCD tests. 2022-05-11 15:19:39 -04:00
Thomas Harte
943c924382 Add missing: MOVE to/from USP, RESET. 2022-05-11 07:52:23 -04:00
Thomas Harte
ab8e1fdcbf Take a swing at access faults and address errors. 2022-05-10 16:20:30 -04:00
Thomas Harte
f2a6a12f79 Remove further vestiges of timing. 2022-05-09 20:58:51 -04:00
Thomas Harte
0af8660181 Remove add_pc and decline_branch in favour of operation-specific signals. 2022-05-09 16:19:25 -04:00
Thomas Harte
330ec1b848 TODO is done. 2022-05-09 11:52:33 -04:00
Thomas Harte
8e5650fde9 Clean up Instruction.hpp. 2022-05-09 10:13:42 -04:00
Thomas Harte
539932dc56 Provide function codes. TODO: optionally. 2022-05-09 09:18:02 -04:00
Thomas Harte
5ab5e1270e Fix test for new MOVEM semantics. 2022-05-09 09:17:48 -04:00
Thomas Harte
98cb9cc1eb Fix CHK operand size. 2022-05-07 21:16:44 -04:00
Thomas Harte
bf8c97abbb Permit TRAP, TRAPV and CHK to push the next PC rather than the current. 2022-05-07 20:32:39 -04:00
Thomas Harte
2b3900fd14 Fix LINK A7. 2022-05-07 08:15:26 -04:00
Thomas Harte
1defeca1ad Implement RTS, RTR, RTE. 2022-05-06 12:30:49 -04:00
Thomas Harte
ac6a9ab631 Fix TAS Dn. 2022-05-06 12:23:04 -04:00
Thomas Harte
8176bb6f79 Expose issues with TST and TAS. 2022-05-06 12:18:56 -04:00
Thomas Harte
9c266d4316 Proceed to unimplemented TST. 2022-05-06 11:33:57 -04:00
Thomas Harte
d478a1b448 Proceed to next failure: PEA. 2022-05-06 10:04:20 -04:00
Thomas Harte
607ddd2f78 Preserve MOVEM order in Operation. 2022-05-06 09:45:06 -04:00
Thomas Harte
06fe320cc0 Correct source counting, but this leaves the operands still being the wrong way around. 2022-05-05 21:06:53 -04:00
Thomas Harte
d7d0a5c15e Implement MOVEM to memory. 2022-05-05 18:51:29 -04:00
Thomas Harte
47f4bbeec6 Switch to a contiguous block of 16 registers. 2022-05-05 15:31:59 -04:00
Thomas Harte
70cdc2ca9f Fix MOVEP to register. 
Advance to lack of MOVEM.
 2022-05-05 12:37:47 -04:00
Thomas Harte
f63a872387 BTST does not write back. 2022-05-05 12:32:15 -04:00
Thomas Harte
46686b4b9c Start testing move. 2022-05-04 20:38:56 -04:00
Thomas Harte
15c90e546f Fix rotates and shifts to memory. 2022-05-04 19:44:59 -04:00
Thomas Harte
5aabe01b6d Mostly fix LINK and UNLK. 2022-05-04 08:41:55 -04:00
Thomas Harte
d3b55a74a5 Fix LEA, proceed to non-functional LINK and UNLK. 2022-05-03 20:45:36 -04:00
Thomas Harte
de58ec71fd Fix EXT, SWAP. 2022-05-03 20:17:36 -04:00
Thomas Harte
052ba80fd7 Add enough wiring to complete but fail EXT and JMP/JSR. 2022-05-03 15:49:55 -04:00
Thomas Harte
39f0ec7536 Get far enough through CHK to realise that MOVEM probably needs to be divided by direction. 2022-05-03 15:40:04 -04:00
Thomas Harte
af973138df Correct decoding of Bcc.b, satisfying Bcc and BSR tests. 2022-05-03 15:32:54 -04:00
Thomas Harte
5a87506f3d Fix Bcc, making decision that add_pc is relative to start of instruction. 2022-05-03 15:21:42 -04:00
Thomas Harte
90f0005cf2 Proceed to failing Bcc and flagging up my lack of an implementation for BSR. 2022-05-03 14:45:49 -04:00
Thomas Harte
d8b3748d24 Fix Scc size, DBcc behaviour. 2022-05-03 14:40:51 -04:00
Thomas Harte
b6ffff5bbd Distinguish [ADD/SUB]QA from [ADD/SUB]Q. 2022-05-03 14:17:26 -04:00
Thomas Harte
5ebae85a16 Start recording successes. 2022-05-03 11:28:50 -04:00
Thomas Harte
b3cf13775b Consume operand_flags into Instruction.hpp. 2022-05-03 11:09:57 -04:00
Thomas Harte
2f2d6bc08b Correct CMPw. 2022-05-03 09:05:34 -04:00
Thomas Harte
fc9a35dd04 Test add/sub, add an exception for invalid Sequences. 2022-05-02 20:09:38 -04:00
Thomas Harte
3827ecd6d3 Proceed to complete test running. 2022-05-02 12:57:45 -04:00
Thomas Harte
14532867a4 Sneaks towards testing EXT. 2022-05-02 08:00:56 -04:00
Thomas Harte
56fe00c5fb Correct errors preparatory to Executor's lack of flow controller actions. 2022-05-01 20:40:57 -04:00
Thomas Harte
6b073c6067 Attempt to round out addressing modes, shift to a header, as per templating on BusHandler. 2022-05-01 15:10:54 -04:00
Thomas Harte
9359f6477b Start drafting an Executor. 2022-04-29 17:12:06 -04:00
Thomas Harte
85242ba896 Add to Xcode project, template on Model as per CLR being odd. Fill in some obvious answers. 2022-04-29 11:10:14 -04:00
Thomas Harte
d16dab6f62 Starts introducing a sequencer, to resolve responsibility of perform. 2022-04-29 10:40:19 -04:00
Thomas Harte
1d8d2b373b Port all simple instruction bodies. 2022-04-28 16:55:47 -04:00
Thomas Harte
bb73eb0db3 Start working on an isolation of 68000 instruction execution. 2022-04-28 15:35:40 -04:00
Thomas Harte
8a18685902 Relocated RegisterSizes to Numeric. 2022-04-28 15:10:08 -04:00
Thomas Harte
9cbbb6e508 Adjust path to match namespace; add to Qt project. 2022-04-27 08:05:36 -04:00
Thomas Harte
9908769bb3 Normalise test name. 2022-04-26 20:32:39 -04:00
Thomas Harte
8ff0b71b29 Subsume MOVEQ into MOVE.l; add missing invalid_operands. 2022-04-25 19:58:19 -04:00
Thomas Harte
959db77b88 Eliminate concept of skips. 2022-04-22 20:59:25 -04:00
Thomas Harte
d4b766bf3f Introduce directional ADD/SUB/AND/OR. 
Just 512 failures to go.
 2022-04-22 20:37:09 -04:00
Thomas Harte
4c806d7c51 Tidy up slightly, ahead of a final push to getting complete test success. 
After which I can start undoing style errors.
 2022-04-22 14:51:25 -04:00
Thomas Harte
c16a60c5ea Import correct STOP, LINK, EXT. 2022-04-22 14:36:29 -04:00
Thomas Harte
96afcb7a43 Introduce remainder of tests. 2022-04-22 14:33:43 -04:00
Thomas Harte
e5a8d8b9ad Import corrected TRAPs and RTE/RTR. 2022-04-22 14:26:44 -04:00
Thomas Harte
efeee5160e Add tests for RTE, RTR, TRAP, TRAPV, CHK. 2022-04-22 10:06:39 -04:00
Thomas Harte
06fb502047 Add MUL/DIV tests and exclusions. 2022-04-22 09:47:16 -04:00
Thomas Harte
977192f480 Resolve D-page decoding errors. 
In particular: that I'd overlooked CMPM, and was treating NOT as two-operand.
 2022-04-22 09:24:16 -04:00
Thomas Harte
cf66d9d38d Add failing tests for EOR, NOT, OR; disambiguate EOR vs CMP. 2022-04-21 20:36:04 -04:00
Thomas Harte
25eeff8fc5 Correct CMP decoding, correct AND as far as asymmetry of Dn, Dn. 2022-04-21 20:14:52 -04:00
Thomas Harte
d342cdad2b Import corrected MOVEPs. 2022-04-21 19:04:14 -04:00
Thomas Harte
c899ee0d55 Enable MOVEP tests. 2022-04-21 18:57:47 -04:00
Thomas Harte
220408fcaa Introduce MOVEM tests. 
12662 opcodes to go.
 2022-04-21 16:39:17 -04:00
Thomas Harte
f4e99be7e1 Import BSRs, corrected MOVEMs. 2022-04-21 16:35:24 -04:00
Thomas Harte
9697e666b7 With a shift to MOVE.q, all tests now pass again. 
12802 opcodes now untested.
 2022-04-21 16:16:34 -04:00
Thomas Harte
216ca7cbc9 Import BCC/BSR/BRA quick values. 2022-04-21 16:11:29 -04:00
Thomas Harte
549e440f7c Add 'quick' decoding and testing. 2022-04-21 16:05:00 -04:00
Thomas Harte
b6b092d124 Add tests, exclusions for rest of shift/roll group. 2022-04-21 11:26:56 -04:00
Thomas Harte
d346d4a9b6 Import updated quick values. 2022-04-21 09:59:04 -04:00
Thomas Harte
c84e98774a Import corrected register ASL/etcs. 2022-04-21 09:51:21 -04:00
Thomas Harte
e1f4187430 Introduce failing ASL test. 2022-04-20 20:22:56 -04:00
Thomas Harte
3af93ada6f Test and correct Bcc, BSR, CLR, NEGX, NEG. 2022-04-20 20:19:56 -04:00
Thomas Harte
fa4dee8cfd Import two-operand DBccs. 2022-04-20 20:07:20 -04:00
Thomas Harte
3888492f0d Import corrected DBccs and JSRs. 2022-04-20 19:57:54 -04:00
Thomas Harte
dc16928f74 Add appropriate exclusions for JSR, JMP, Scc. 2022-04-20 16:56:26 -04:00
Thomas Harte
a4e440527b Import corrected CMPA references. 2022-04-20 16:46:05 -04:00
Thomas Harte
80ff146620 Add CMP, CMPA and TST tests and exclusions. 2022-04-20 16:29:45 -04:00
Thomas Harte
85a0af03c1 Import more standard JSON; start validating. 2022-04-20 09:17:00 -04:00
Thomas Harte
e0d2baae58 Test ANDI/ORI/EORI SR/CCR, and fail BTST/BCLR/BCHG/BSET. 2022-04-20 08:39:43 -04:00
Thomas Harte
437de19ecb Correct MOVE USP entries. 2022-04-20 08:34:10 -04:00
Thomas Harte
fab064641f Add Move[to/from][SR/CCR/USP] tests, correct decodings. 2022-04-20 07:59:13 -04:00
Thomas Harte
cc69d01bdc Strip dead code. 2022-04-19 20:41:39 -04:00
Thomas Harte
461a95d7ff Introduce missing register numbers for PEA, and elsewhere. 2022-04-19 20:39:01 -04:00
Thomas Harte
aa1665acce Fix LEA transcription problems. 2022-04-19 20:24:03 -04:00