Commit Graph

11417 Commits

Author SHA1 Message Date
Chris Lattner
9e20d352c2 Fix LiveInterval::getOverlapingRanges to take things in the right order
(an unused method).

Fix the merger so that it can merge ranges like this  [10:12)[16:40) with
[12:38) into [10:40) instead of bogus ranges.  This sort of input will be
possible for the merger coming shortly


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23865 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 06:41:30 +00:00
Nate Begeman
ae1641c39f Match rotate. This does actually match the rotates in an rc5 cipher, but I
haven't seen it fire on our testsuite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23863 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 06:36:18 +00:00
Chris Lattner
63ad7963e4 My previous patch was too conservative. Reject FP and void types, but do
allow pointer types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23859 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 05:45:41 +00:00
Nate Begeman
d5ce204c5f Don't generate operations that aren't yet supported
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23858 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 01:52:45 +00:00
Nate Begeman
0b2973aef2 Kill some now-dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23857 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 01:52:20 +00:00
Nate Begeman
4d38567689 Fix a typo in the dag combiner, so that this can work on i64 targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23856 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 01:51:45 +00:00
Andrew Lenharth
fe9234db9b byte zap not immediate goodness
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23855 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 01:24:05 +00:00
Nate Begeman
405e3ecb56 Invert the TargetLowering flag that controls divide by consant expansion.
Add a new flag to TargetLowering indicating if the target has really cheap
  signed division by powers of two, make ppc use it.  This will probably go
  away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23853 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 00:02:42 +00:00
Andrew Lenharth
1f347a318c Inst cleanup. As a bonus, operands are in the correct order for cmovs. Expect new stuff to pass in the JIT tonight
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23852 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 23:58:36 +00:00
Chris Lattner
eae6d648da Use a literal to define ineg instead of immzero
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23851 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 23:30:37 +00:00
Chris Lattner
cef6010c64 Fix a conditional so we don't access past the end of the range. Thanks to
Andrew for bringing this to my attn.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23850 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 22:50:10 +00:00
Andrew Lenharth
964b6aacb4 added a few 1 operand form stuff. Seems to break regalloc on alpha. sigh
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23849 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 19:39:24 +00:00
Andrew Lenharth
d684e1a64d add cttz and ctpop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23848 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 19:38:11 +00:00
Nate Begeman
c6a454e8d5 Fix a couple bugs in the const div stuff where we'd generate MULHS/MULHU
for types that aren't legal, and fail a divisor is less than zero
comparison, which would cause us to drop a subtract.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23846 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 17:45:03 +00:00
Chris Lattner
f75f2a0a02 don't use llabs with apparently VC++ doesn't have
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23845 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 17:01:00 +00:00
Chris Lattner
8317e12cef Fix order of eval problem from when I refactored this into a function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23844 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 16:56:40 +00:00
Andrew Lenharth
892ade722a Sounds good, finish the intop conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23843 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 14:42:48 +00:00
Nate Begeman
12a923408c Add some more patterns for i64 on ppc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23842 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 07:51:08 +00:00
Chris Lattner
b0fa11ca41 add a new method, play around with some code.
Fix a *bug* in the extendIntervalEndTo method.  In particular, if adding
[2:10) to an interval containing [0:2),[10:30), we produced [0:10),[10,30).
Which is not the most smart thing to do.  Now produce [0:30).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23841 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 07:39:25 +00:00
Chris Lattner
f5ce2678f6 Refactor some code, pulling it out into a function. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23839 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 06:06:30 +00:00
Chris Lattner
1e9f3af561 Do NOT touch FP ops with LSR. This fixes a testcase Nate sent me from an
inner loop like this:

LBB_RateConvertMono8AltiVec_2:  ; no_exit
        lis r2, ha16(.CPI_RateConvertMono8AltiVec_0)
        lfs f3, lo16(.CPI_RateConvertMono8AltiVec_0)(r2)
        fmr f3, f3
        fadd f0, f2, f0
        fadd f3, f0, f3
        fcmpu cr0, f3, f1
        bge cr0, LBB_RateConvertMono8AltiVec_2  ; no_exit

to an inner loop like this:

LBB_RateConvertMono8AltiVec_1:  ; no_exit
        fsub f2, f2, f1
        fcmpu cr0, f2, f1
        fmr f0, f2
        bge cr0, LBB_RateConvertMono8AltiVec_1  ; no_exit

Doh! good catch!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23838 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 04:47:10 +00:00
Chris Lattner
ae4be981b1 Add some pattern fragments to simplify the repetitive parts of the patterns
for some common ops and use them for a few examples.  Andrew, if you like
this, feel free to convert the rest over, if you hate it, feel free to
revert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23837 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 04:21:06 +00:00
Chris Lattner
d7cc4c407d simplify this a bit by using immediates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23836 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 03:57:03 +00:00
Nate Begeman
6957523b9d Move the target constant divide optimization up into the dag combiner, so
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend.  Alpha will probably want this too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23835 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 02:15:44 +00:00
Andrew Lenharth
d97591a961 forgot this one
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23833 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 00:29:02 +00:00
Andrew Lenharth
4907d22a90 ret 0; works, not much else
still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23832 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-20 00:28:31 +00:00
John Criswell
9811ea4567 This fixes PR638:
Regression/CodeGen/Generic/2004-02-08-UnwindSupport.llx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23831 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 20:07:15 +00:00
Jim Laskey
538421411a Added InstrSchedClass to each of the PowerPC Instructions.
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23830 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 19:51:16 +00:00
Nate Begeman
2d5aff761d Write patterns for the various shl and srl patterns that don't involve
doing something clever.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23824 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 18:42:01 +00:00
Jim Laskey
0de8796e68 Push processor descriptions to the top of target and add command line info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23820 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 13:34:52 +00:00
Chris Lattner
f6cd147471 now that tblgen is smarter, use integers directly. This should help Andrew too
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23818 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 04:32:04 +00:00
Chris Lattner
14c09b81ea teach ppc backend these are copies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23813 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:50:36 +00:00
Chris Lattner
8be1fa5dc5 Convert these cases to patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23811 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:38:02 +00:00
Nate Begeman
8d94832394 Woo, it kinda works. We now generate this atrociously bad, but correct,
code for long long foo(long long a, long long b) { return a + b; }

_foo:
        or r2, r3, r3
        or r3, r4, r4
        or r4, r5, r5
        or r5, r6, r6
        rldicr r2, r2, 32, 31
        rldicl r3, r3, 0, 32
        rldicr r4, r4, 32, 31
        rldicl r5, r5, 0, 32
        or r2, r3, r2
        or r3, r5, r4
        add r4, r3, r2
        rldicl r2, r4, 32, 32
        or r4, r4, r4
        or r3, r2, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23809 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:12:32 +00:00
Chris Lattner
e5468305a0 apply some tblgen majik to simplify the X register definitions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 00:17:55 +00:00
Nate Begeman
5dc897b0e4 Teach Legalize how to do something with EXTRACT_ELEMENT when the type of
the pair of elements is a legal type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23804 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 00:06:56 +00:00
Nate Begeman
da32c9eed6 Make a new reg class for 64 bit regs that aliases the 32 bit regs. This
will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.

Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG.  Something wll have to be
figured out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23803 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 00:05:37 +00:00
Nate Begeman
4a95945fa5 Add the ability to lower return instructions to TargetLowering. This
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23802 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 23:23:37 +00:00
Chris Lattner
d222f6ab67 Fix Generic/2005-10-18-ZeroSizeStackObject.ll by not requesting a zero
sized stack object if either the array size or the type size is zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23801 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 22:14:06 +00:00
Chris Lattner
2dfa8192ab remove hack
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23797 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 22:11:42 +00:00
Jim Laskey
21f587ca24 Simple edits; remove unimplimented cases and clarify long haul SLU cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23788 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:59:23 +00:00
Chris Lattner
841d12d9ac Fix the JIT encoding of LWA, LD, STD, and STDU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23787 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:51:22 +00:00
Jim Laskey
076866c50f Checking in first round of scheduling tablegen files. Not tied in as yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23786 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:23:40 +00:00
Chris Lattner
3d8df55fed add a case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23785 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 06:30:51 +00:00
Chris Lattner
a27ea769eb Add an option to this pass. If it is set, we are allowed to internalize
all but main.  If it's not set, we can still internalize, but only if an
explicit symbol list is provided.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23783 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 06:29:22 +00:00
Chris Lattner
40c62d5069 Fold (select C, load A, load B) -> load (select C, A, B). This happens quite
a lot throughout many programs.  In particular, specfp triggers it a bunch for
constant FP nodes when you have code like  cond ? 1.0 : -1.0.

If the PPC ISel exposed the loads implicit in pic references to external globals,
we would be able to eliminate a load in cases like this as well:

%X = external global int
%Y = external global int
int* %test4(bool %C) {
        %G = select bool %C, int* %X, int* %Y
        ret int* %G
}

Note that this breaks things that use SrcValue's (see the fixme), but since nothing
uses them yet, this is ok.

Also, simplify some code to use hasOneUse() on an SDOperand instead of hasNUsesOfValue directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23781 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 06:04:22 +00:00
Nate Begeman
9d2b817fcb Do the right thing and enable 64 bit regs under the control of a subtarget
option.  Currently the only way to enable this is to specify the
64bitregs mattr flag.  It is never enabled by default on any config yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23779 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 00:56:42 +00:00
Nate Begeman
1d9d7427c4 First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is
purely mechanical.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23778 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 00:28:58 +00:00
Nate Begeman
a0e221dc75 Implement some feedback from Chris re: constant canonicalization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23777 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 00:28:13 +00:00
Nate Begeman
419f8b62f7 Legalize BUILD_PAIR appropriately for upcoming 64 bit PowerPC work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23776 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 00:27:41 +00:00
Nate Begeman
11af4eaa6d fold fmul X, +2.0 -> fadd X, X;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23774 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-17 20:40:11 +00:00
Chris Lattner
8532cf6258 Make this work for FP constantexprs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23773 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-17 20:18:38 +00:00
Chris Lattner
5e678e03b7 Oops, X+0.0 isn't foldable, but X+-0.0 is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23772 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-17 17:56:38 +00:00
Chris Lattner
560a17d3bc relax this a bit, as we only support the default rounding mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23771 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-17 17:49:32 +00:00
Chris Lattner
854077d3a5 add a trivial fold
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23764 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-17 01:07:11 +00:00
Nate Begeman
21e463b2bf More PPC32 -> PPC changes, as well as merging some classes that were
redundant after the change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23759 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-16 05:39:50 +00:00
Chris Lattner
750dbd5950 Fix this logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23756 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 22:35:40 +00:00
Chris Lattner
85d63bbff7 Add a case we were missing that was causing us to fail CodeGen/PowerPC/rlwinm.ll:test3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23755 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 22:18:08 +00:00
Nate Begeman
34f342e36f Remove some dead code now that the dag combiner exists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23754 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 22:08:02 +00:00
Chris Lattner
4cb5a1b896 Remove some dead code: the ORI/ORIS cases are autogen'd. This makes
SelectIntImmediateExpr dead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23753 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 22:06:18 +00:00
Chris Lattner
de123822e5 prune #includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23752 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:58:54 +00:00
Chris Lattner
75c9f67370 These instructions are now autogenerated
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23751 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:44:56 +00:00
Chris Lattner
e0b2e6372f Add a pattern for FSQRTS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23750 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:44:15 +00:00
Chris Lattner
651dea74f6 remove dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23749 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:40:12 +00:00
Chris Lattner
8136cdae60 Use getExtLoad here instead of getNode, as extloads produce two values. This
fixes a legalize failure on SPASS for itanium.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23747 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 20:24:07 +00:00
Chris Lattner
d242419e17 remove broken SRA/rlwimi case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23746 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 19:04:48 +00:00
Chris Lattner
16e71f2f70 Rename PPC32*.h to PPC*.h
This completes the grand PPC file renaming


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23745 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:59:06 +00:00
Chris Lattner
b9459b731a Merge PPCJITInfo.h and PPC32JITInfo.h. Note that the PowerPCJITInfo
and PPC32JITInfo classes should be merged.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23744 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:53:41 +00:00
Chris Lattner
2668959b88 Rename PowerPC*.h to PPC*.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23743 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:51:18 +00:00
Chris Lattner
26bd0d48a1 Rename PowerPCInstrBuilder.h -> PPC*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23742 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:45:43 +00:00
Chris Lattner
ec4b73cb09 Nuke the PowerPCTargetMachine.h header. Note that the PowerPCTargetMachine
still should be merged into the PPC32TargetMachine class


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23741 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:44:05 +00:00
Chris Lattner
f379997adc Rename PowerPC*.td -> PPC*.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23740 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:40:39 +00:00
Chris Lattner
f1ed100bc4 These are dead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23739 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:38:51 +00:00
Chris Lattner
4c7b43b43f Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23738 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:37:35 +00:00
Chris Lattner
e87bc1f3a8 Like the comment says...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23737 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 22:48:24 +00:00
Chris Lattner
617742b1b8 Nuke PowerPCInstrFormats.h, its contents are dead. Remove the definitions
from the .td file that correspond to it


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23736 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 22:44:13 +00:00
Nate Begeman
14e2cf62f4 Properly split f32 and f64 into separate register classes for scalar sse fp
fixing a bunch of nasty hackery


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23735 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 22:06:00 +00:00
Nate Begeman
e0de44adba Remove an unnecsesary file. PPC32 and PPC64 share architected registers.
We will decide with subtarget support whether we ever use an i64 register
class.


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2005-10-14 18:58:46 +00:00
Chris Lattner
444215dddc add the integer truncate/extension operations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23733 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 06:40:20 +00:00
Chris Lattner
3f31d4304c These are now autogenerated
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23731 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 06:26:29 +00:00
Chris Lattner
7cb6491a0d Add patterns for FP round/extend
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2005-10-14 04:55:50 +00:00
Chris Lattner
13664a6194 add a new SDTCisOpSmallerThanOp type constraint, and implement fround/fextend in terms of it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23726 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 04:55:10 +00:00
Nate Begeman
216def8ecf fold sext_in_reg, sext_in_reg where both have the same VT. This was
popping up in Fourinarow.


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2005-10-14 01:29:07 +00:00
Chris Lattner
b4871ad694 Allow $
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23721 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 01:28:34 +00:00
Nate Begeman
5054f16212 Relax the checking on zextload generation a bit, since as sabre pointed out
you could be AND'ing with the result of a shift that shifts out all the
bits you care about, in addition to a constant.

Also, move over an add/sub_parts fold from legalize to the dag combiner,
where it works for things other than constants.  Woot!


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2005-10-14 01:12:21 +00:00
Chris Lattner
24edbb7a6c Fix the trunc(load) case, finally allowing crafty and povray to pass
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2005-10-13 22:10:05 +00:00
Chris Lattner
f98840531a Fix some bugs in (sext (load x))
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2005-10-13 21:52:31 +00:00
Chris Lattner
9ad8481cfb When ExpandOp'ing a [SZ]EXTLOAD, make sure to remember that the chain
is also legal.  Add support for ExpandOp'ing raw EXTLOADs too.


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2005-10-13 21:44:47 +00:00
Chris Lattner
4c8f8f0481 Implement PromoteOp for *EXTLOAD, allowing MallocBench/gs to Legalize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23715 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-13 20:07:41 +00:00
Nate Begeman
bfd65a05c9 Fix the remaining DAGCombiner issues pointed out by sabre. This should fix
the remainder of the failures introduced by my patch last night.


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2005-10-13 18:34:58 +00:00
Chris Lattner
67a44cd3aa Fix a minor bug in the dag combiner that broke pcompress2 and some other
tests.


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2005-10-13 18:16:34 +00:00
Nate Begeman
144ff660e6 Add support to Legalize for expanding i64 sextload/zextload into hi and lo
parts. This should fix the crafty and signed long long unit test failure
on x86 last night.


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2005-10-13 17:15:37 +00:00
Jim Laskey
53c523c00e Inhibit instructions from being pushed before function calls. This will
minimize unnecessary spilling.


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2005-10-13 16:44:00 +00:00
Nate Begeman
ded4963ab9 Move some Legalize functionality over to the DAGCombiner where it belongs.
Kill some dead code.


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2005-10-13 03:11:28 +00:00
Nate Begeman
765784ad76 Fix a potential bug with two combine-to's back to back that chris pointed
out, where after the first CombineTo() call, the node the second CombineTo
wishes to replace may no longer exist.

Fix a very real bug with the truncated load optimization on little endian
targets, which do not need a byte offset added to the load.


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2005-10-12 23:18:53 +00:00
Nate Begeman
3df4d525c5 More cool stuff for the dag combiner. We can now finally handle things
like turning:

_foo:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        rlwinm r3, r2, 0, 16, 31
        blr

into
_foo:
        fctiwz f0,f1
        stfd f0,-8(r1)
        lhz r3,-2(r1)
        blr

Also removed an unncessary constraint from sra -> srl conversion, which
should take care of hte only reason we would ever need to handle sra in
MaskedValueIsZero, AFAIK.


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2005-10-12 20:40:40 +00:00
Jim Laskey
fab66f6900 Finally committing to the new scheduler. Still -sched=none by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23702 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-12 18:29:35 +00:00
Jim Laskey
851a22db2b Added graphviz/gv support for MF.
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2005-10-12 12:09:05 +00:00
Chris Lattner
d6155e96f7 Fix (hopefully the last) issue where LSR is nondeterminstic. When pulling
out CSE's of base expressions it could build a result whose order was
nondet.


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2005-10-11 18:41:04 +00:00
Chris Lattner
7b445c521b Fix another problem where LSR was being nondeterminstic. Also remove elements
from the end of a vector instead of the beginning


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2005-10-11 18:30:57 +00:00