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236 Commits

Author SHA1 Message Date
Evan Cheng
a964ccdc3f Use movaps to do VR128 reg-to-reg copies for now. It's shorter and available for SSE1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27554 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-10 07:21:31 +00:00
Jim Laskey
4188699f80 Foundation for call frame information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27491 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-07 16:34:46 +00:00
Evan Cheng
8703be4ab6 Minor fixes + naming changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27410 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 19:12:30 +00:00
Jim Laskey
a99791886d Expose base register for DwarfWriter. Refactor code accordingly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27225 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 13:48:33 +00:00
Jim Laskey
414e682bac Translate llvm target registers to dwarf register numbers properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27180 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 20:18:45 +00:00
Jim Laskey
f1d78e8335 Add support to locate local variables in frames (early version.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26994 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 18:12:57 +00:00
Evan Cheng
2246f8449f Use the generic vector register classes VR64 / VR128 rather than V4F32, 
V8I16, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26838 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-18 01:23:20 +00:00
Evan Cheng
8586b953a0 Also fold MOV8r0, MOV16r0, MOV32r0 + store to MOV8mi, MOV16mi, and MOV32mi. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26817 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-17 02:36:22 +00:00
Evan Cheng
5bd4d48c24 Add some missing entries to X86RegisterInfo::foldMemoryOperand(). e.g. 
ADD32ri8.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26816 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-17 02:25:01 +00:00
Evan Cheng
cb4a38e75d Fix an obvious bug exposed when we are doing 
ADD X, 4
==>
MOV32ri $X+4, ...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26366 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 01:37:02 +00:00
Evan Cheng
933be3318b Added SSE2 128-bit integer packed types: V16I8, V8I16, V4I32, and V2I64. 
Added generic vector types: VR64 and VR128.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26295 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 01:38:21 +00:00
Evan Cheng
aea20f50e5 Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit 
packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26294 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-20 22:34:53 +00:00
Evan Cheng
fe5cb19405 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This 
proves to be worth 20% on Ptrdist/ks. Might be related to dependency
   breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
   are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
   spill / restore FsMOVAPSrr and FsMOVAPDrr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26241 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 22:45:17 +00:00
Evan Cheng
19ade3bf9c Use movaps / movapd to spill / restore V4F4 / V2F8 registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26240 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 21:20:26 +00:00
Evan Cheng
d51425a82d Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg 
transfer.

According to the Intel P4 Optimization Manual:

Moves that write a portion of a register can introduce unwanted
dependences. The movsd reg, reg instruction writes only the bottom
64 bits of a register, not to all 128 bits. This introduces a dependence on
the preceding instruction that produces the upper 64 bits (even if those
bits are not longer wanted). The dependence inhibits register renaming,
and thereby reduces parallelism.

Not to mention movaps is shorter than movss.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26226 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 01:50:02 +00:00
Chris Lattner
d77525da5e When rewriting frame instructions, emit the appropriate small-immediate 
instruction when possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25938 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 18:20:04 +00:00
Chris Lattner
4083960147 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25913 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 20:12:32 +00:00
Chris Lattner
9c8dd970f7 implement isStoreToStackSlot 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25911 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 20:00:41 +00:00
Evan Cheng
b1b4e86a02 Added SSE entries to foldMemoryOperand(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25888 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 23:02:25 +00:00
Evan Cheng
e3413160ca Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25158 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-09 18:33:28 +00:00
Evan Cheng
d9558e0ba6 * Fast call support. 
* FP cmp, setcc, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25117 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-06 00:43:03 +00:00
Evan Cheng
e4672aa5b4 Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25004 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-24 09:48:35 +00:00
Evan Cheng
171049d10f * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. 
* Added a pseudo instruction (for each target) that represent "return void".
  This is a workaround for lack of optional flag operand (return void is not
  lowered so it does not have a flag operand.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24997 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-23 22:14:32 +00:00
Chris Lattner
58fe459e36 Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns 
that were overloaded to work before and after the stackifier runs.  With the
new clean world, it is possible to write patterns for these instructions: woo!

This also adds a few simple patterns here and there, though there are a lot
still missing.  These should be easy to add though. :)

See the comments under "Floating Point Stack Support" for more details on
the new world order.

This patch as absolutely no effect on the generated code, woo!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24899 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 07:47:04 +00:00
Nate Begeman
14e2cf62f4 Properly split f32 and f64 into separate register classes for scalar sse fp 
fixing a bunch of nasty hackery


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23735 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 22:06:00 +00:00
Chris Lattner
56bcae0de9 simplify this code using the new regclass info passed in 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23557 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 17:12:38 +00:00
Chris Lattner
97d5e6461a Pass extra regclasses into spilling code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23537 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 01:29:42 +00:00
Chris Lattner
a92aab74dd Implement the isLoadFromStackSlot interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23387 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-19 05:23:44 +00:00
Chris Lattner
2505d6b727 The simple isel being gone makes this dead! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22914 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:32:03 +00:00
Jeff Cohen
00b16889ab Eliminate all remaining tabs and trailing spaces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22523 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-27 06:12:32 +00:00
Nate Begeman
f63be7d395 First round of support for doing scalar FP using the SSE2 ISA extension and 
XMM registers.  There are many known deficiencies and fixmes, which will be
addressed ASAP.  The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.

The x86 backend will still default to x87 style FP.  To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.

An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
                        Sum += P[i]; return Sum; }

The inner loop looks like the following:
x87:
.LBB_foo_1:     # no_exit
        fldl (%esp)
        faddl (%eax,%ecx,8)
        fstpl (%esp)
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit

SSE2:
        addsd (%eax,%ecx,8), %xmm0
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22340 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-06 18:59:04 +00:00
Chris Lattner
5fae9ccd39 Teach reginfo how to deal with ADJSTACKPTRri, allowing us to generate: 
add %ESP, 20
        jmp %EDX  # TAIL CALL

instead of:
        add %ESP, -8
        add %ESP, 28
        jmp %EDX  # TAIL CALL


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22047 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-15 05:49:58 +00:00
Chris Lattner
6972177bd4 When emitting the function epilog, check to see if there already a stack 
adjustment.  If so, we merge the adjustment into the existing one.  This
allows us to generate:

caller2:
        sub %ESP, 12
        mov DWORD PTR [%ESP], 0
        mov %EAX, 1234567890
        mov %EDX, 0
        call func2
        add %ESP, 8
        ret 4

intead of:

caller2:
        sub %ESP, 12
        mov DWORD PTR [%ESP], 0
        mov %EAX, 1234567890
        mov %EDX, 0
        call func2
        sub %ESP, 4
        add %ESP, 12
        ret 4

for X86/fast-cc-merge-stack-adj.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22038 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-14 23:53:43 +00:00
Chris Lattner
2b3d56ee72 Add some new instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22036 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-14 23:35:21 +00:00
Chris Lattner
3648c67eb2 switch to having the callee pop stack operands for fastcc. This is currently buggy 
do not use


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21984 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 21:44:04 +00:00
Chris Lattner
24ddc6d067 allow RETI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21980 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 20:46:35 +00:00
Chris Lattner
1e6a71524e add signed versions of the extra precision multiplies 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21106 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 04:19:22 +00:00
Chris Lattner
40ff633b05 Add rotate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19690 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:50:03 +00:00
Chris Lattner
0df53d22c3 Improve coverage of the X86 instruction set by adding 16-bit shift doubles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19687 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:31:24 +00:00
Chris Lattner
57fbfb5879 Add conditional moves for the parity flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19437 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-10 22:09:33 +00:00
Chris Lattner
eb96ec52ff Add support for SETNPr to lower to memory form. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19248 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-02 02:37:46 +00:00
Chris Lattner
45de191b0b Spill/restore X86 floating point stack registers with 64-bits of precision 
instead of 80-bits of precision.  This fixes PR467.

This change speeds up fldry on X86 with LLC from 7.32s on apoc to 4.68s.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18433 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-12-02 18:17:31 +00:00
Chris Lattner
d93d3b047c Add some new instructions. Fix the asm string for sbb32rr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16759 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 04:01:02 +00:00
Reid Spencer
551ccae044 Changes For Bug 352 
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-01 22:55:40 +00:00
Chris Lattner
fae896999c Reduce uses of getRegClass 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15973 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-21 20:13:52 +00:00
Chris Lattner
01d0efba39 Code insertion methods now return void instead of an int. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15780 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-15 22:15:11 +00:00
Chris Lattner
57f1b67c34 These methods no longer take a TargetRegisterClass* operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15774 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-15 21:56:44 +00:00
Nate Begeman
f8be5e94aa Eliminate MachineFunction& argument from eliminateFrameIndex in x86 Target. Get MachineFunction from MachineInstruction's parent's parent 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15739 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-14 22:05:10 +00:00
Chris Lattner
3b5e6e5f84 Reserve the correct amt of space. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14913 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-17 20:24:05 +00:00
Chris Lattner
0cf0c37469 Delete the allocate*TargetMachine function, which is now dead . 
The shared command line options are now in a header that makes sense.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14756 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-11 04:17:10 +00:00
Reid Spencer
954da37bb4 Add #include <iostream> since Value.h does not #include it any more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14622 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-07-04 12:19:56 +00:00
Misha Brukman
66d6ee4247 Spell out `NoFramePointerElim' for readability. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14299 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-06-21 21:17:44 +00:00
Misha Brukman
83eaa0b567 Use the common `NoFPElim' setting instead of our own. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14298 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-06-21 21:10:24 +00:00
Chris Lattner
f70c22b019 Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID() 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14201 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-06-17 18:19:28 +00:00
Chris Lattner
665e661384 Add support for the setp instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14140 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-06-11 04:30:06 +00:00
Chris Lattner
d029cd2d5a Convert to the new TargetMachine interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13952 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-06-02 05:55:25 +00:00
Alkis Evlogimenos
8b28b6d187 Add more ADC and SBB variants 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12607 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-04-02 07:11:10 +00:00
Chris Lattner
87d3bb5dfa Implement spill code folding for all of the conditional move instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12554 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-30 21:29:47 +00:00
Alkis Evlogimenos
a1a7148c4d Another API change to MRegisterInfo::foldMemoryOperand. Instead of a 
MachineBasicBlock::iterator take a MachineInstr*.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12392 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-14 20:14:27 +00:00
Alkis Evlogimenos
39354c99a1 Change MRegisterInfo::foldMemoryOperand to return the folded 
instruction to make the API more flexible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12386 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-14 07:19:51 +00:00
Alkis Evlogimenos
13d362f310 Add memory operand version of conditional move. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12190 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-07 03:19:11 +00:00
Alkis Evlogimenos
8295f202d9 A big X86 instruction rename. The instructions are renamed to make 
their names more decriptive. A name consists of the base name, a
default operand size followed by a character per operand with an
optional special size. For example:

ADD8rr -> add, 8-bit register, 8-bit register

IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate

IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate

MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11995 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 08:50:03 +00:00
Alkis Evlogimenos
da474adb21 SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them 
to denote this fact.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11972 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 23:46:44 +00:00
Alkis Evlogimenos
8e475b8cfd Floating point loads/stores act on memory operands. Rename them to 
denote this fact.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11971 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 23:42:35 +00:00
Alkis Evlogimenos
f8da4d8839 Uncomment instructions that take both an immediate and a memory 
operand but their sizes differ.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11969 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 22:06:59 +00:00
Alkis Evlogimenos
745502a04b Do not generate instructions with mismatched memory/immediate sized 
operands. The X86 backend doesn't handle them properly right now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11944 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 06:01:43 +00:00
Alkis Evlogimenos
08388a4787 Add memory operand folding support for the SETcc family of 
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11907 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 16:13:37 +00:00
Alkis Evlogimenos
e56508eb7e Add memory operand folding support for SHLD and SHRD instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11905 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 15:03:18 +00:00
Alkis Evlogimenos
58ec60589b Add memory operand folding support for SHL, SHR and SAR, SHLD instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11903 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 09:28:43 +00:00
Alkis Evlogimenos
890f92328d Move MOTy::UseType enum into MachineOperand. This eliminates the 
switch statements in the constructors and simplifies the
implementation of the getUseType() member function. You will have to
specify defs using MachineOperand::Def instead of MOTy::Def though
(similarly for Use and UseAndDef).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11715 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-22 19:23:26 +00:00
Alkis Evlogimenos
f216421181 When folding memory operands in machine instructions be careful to 
leave register operands with the same use/def flags as the original
instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11709 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-22 06:54:26 +00:00
Chris Lattner
cc0d2f586f Add support for GlobalAddress's for alkis 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11560 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 18:23:55 +00:00
Alkis Evlogimenos
d886ed99fb Instructiosn with 1 memory operand have 4 operands in our 
representation.. duh!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11554 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 15:58:13 +00:00
Alkis Evlogimenos
f41dadafae Align case statements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11552 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 15:50:41 +00:00
Alkis Evlogimenos
14ffe75c9c Add TEST and XCHG memory operand support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11550 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 15:48:42 +00:00
Alkis Evlogimenos
68bff8e15d Add OR and XOR memory operand support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11549 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 15:33:14 +00:00
Alkis Evlogimenos
a7be982e72 Add memory operand folding support for MUL, DIV, IDIV, NEG, NOT, 
MOVSX, and MOVZX.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11546 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 09:14:23 +00:00
Alkis Evlogimenos
89b0214b76 Add memory operand folding for CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32} 
and DECm{8,16,32} instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11545 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 08:49:20 +00:00
Alkis Evlogimenos
18bd7bb4d4 Add support for folding memory operands for ADC, SBB and SUB instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11541 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 08:08:51 +00:00
Chris Lattner
ee0919bb10 Add a (hidden) option to print instructions that fail to fuse. It's looking 
like compares and test's would be the next huge win...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11539 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 08:03:47 +00:00
Alkis Evlogimenos
17dc674c13 Add support for folding memory operands in MOVri{8,16,32} instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11538 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 07:47:20 +00:00
Chris Lattner
a7660be6c2 Add an option to disable spill fusing in the X86 backend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11531 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 06:30:34 +00:00
Chris Lattner
e87331d11d Fix the mneumonics for the mov instructions to have the source and destination 
order in the correct sense!! Arg!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11530 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 06:28:19 +00:00
Chris Lattner
f120ebbf8a GRRR. Move instructions have swapped the order of the r/m operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11528 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 06:20:20 +00:00
Chris Lattner
5a051f65d3 Change to match the newer, simpler, interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11525 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 05:54:57 +00:00
Chris Lattner
0f9c491abc Add support for folding memory operands into AND and IMUL's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11523 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 05:46:06 +00:00
Chris Lattner
7c035b73a4 Scrunchify code, by adding helpers. No functionality changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11522 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 05:35:13 +00:00
Alkis Evlogimenos
b499866c05 Add API to check and fold memory operands into instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11519 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-17 04:33:18 +00:00
Chris Lattner
96c3d2e2e7 Fix the 'have a framepointer' case, so that the frame pointer always points 
to the old saved EBP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11455 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-15 00:15:37 +00:00
Chris Lattner
e9dd84ea8a There is no reason to align the stack pointer if there are no callees of this 
function!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11450 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-14 20:11:07 +00:00
Chris Lattner
bb07ef97cf The prologue/epilogue related method calls have no reason to return a value, 
make them return void.

This allows us to avoid some costly MBB.size() calls


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11448 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-14 19:49:54 +00:00
Chris Lattner
300d0eda6f finegrainify namespacification, fix 80col prob 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11445 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-14 06:00:36 +00:00
Alkis Evlogimenos
f81af21caf Use newly added next() and prior() utility functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11430 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-14 01:18:34 +00:00
Alkis Evlogimenos
024126ee23 Change interface so that we can add to the end of a basic block 
without getting an assertion from ilist that we are dereferencing
ilist<T>::end().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11345 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-12 08:11:04 +00:00
Alkis Evlogimenos
c0b9dc5be7 Change MachineBasicBlock's vector of MachineInstr pointers into an 
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11340 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-12 02:27:10 +00:00
Alkis Evlogimenos
14be64018f Modify the two address instruction pass to remove the duplicate 
operand of the instruction and thus simplify the register allocation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11124 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-04 22:17:40 +00:00
Brian Gaeke
d0fde30ce8 Put all LLVM code into the llvm namespace, as per bug 109. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-11-11 22:41:34 +00:00
Alkis Evlogimenos
e668dab5b3 Change all machine basic block modifier functions in MRegisterInfo to 
return the number of instructions added to/removed from the basic block
passed as their first argument.

Note: This is only needed because we use a std::vector instead of an
ilist to keep MachineBasicBlock instructions. Inserting an instruction
to a MachineBasicBlock invalidates all iterators to the basic
block. The return value can be used to update an index to the machine
basic block instruction vector and circumvent the iterator elimination
problem but this is really not needed if we move to a better
representation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9704 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-11-04 22:57:09 +00:00
John Criswell
b576c94c15 Added LLVM project notice to the top of every C++ source file. 
Header files will be on the way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9298 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-10-20 19:43:21 +00:00
Chris Lattner
c2b81f69ed Output a contorted sequence of instructions to make sure that we don't access 
off the bottom of the stack.  This fixes PR#41


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9114 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-10-14 19:09:05 +00:00
Chris Lattner
d5b7c47b27 Disable the leaf function optimization, which is apparently not legal on 
X86/linux.  :(  The problem is that a signal delivered while the function
is executing could clobber the functions stack.  This is a partial fix
for PR41.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9113 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-10-14 18:52:41 +00:00
Misha Brukman
5560c9d49c Spell `necessary' correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7944 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-18 14:43:39 +00:00
Chris Lattner
6770aedf7f Rename register classes to be upper case to make it obvious that they are X86 
specific in the tree patterns


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7578 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-04 20:58:29 +00:00
Chris Lattner
7ad3e063f5 Switch over to TableGen generated register file description 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7511 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-08-03 15:48:14 +00:00
Chris Lattner
c8c377d111 Move "register flags" definition the type of registers to be fully fledged 
value types


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7377 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-07-29 05:14:16 +00:00
Chris Lattner
ddd5b417c6 Rename -no-* to -disable-* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5642 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-02-26 20:00:41 +00:00
Chris Lattner
f158da2f78 Implement code to keep the stack pointer aligned to an 8 byte boundary. 
This improves the performance of the power benchmark by a few percent.
This will be neccesary for SSE code, which requires 16 byte alignment of
the stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5320 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-01-16 02:20:12 +00:00
Chris Lattner
eafa423881 Handle frame offset due to return address pushed on the stack 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5319 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-01-15 22:57:35 +00:00
Chris Lattner
d264bec88a * Move frame and constant pool indexes to first argument of memory reference 
so we can put an offset in there as well...
* Fix long/ulong stuff


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5231 91177308-0d34-0410-b5e6-96231b3b80d8
 2003-01-13 00:50:33 +00:00
Chris Lattner
aa09b75d22 Rename FunctionFrameInfo to MachineFrameInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5201 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-28 21:08:28 +00:00
Chris Lattner
3c1c03d7a7 *** Implement frame pointer elimination on X86! 
* Include contents of X86RegisterClasses.cpp into here
* Adjustments to register api to work with new frame manager
* Eliminate moveImm2Reg, getFramePointer, and getStackPointer
* Cleanup and simplify prolog/epilog code generation
* Prolog/epilog are MUCH more efficient now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5186 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-28 20:32:28 +00:00
Chris Lattner
8e58179048 New simpler spill interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5148 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-25 05:07:09 +00:00
Chris Lattner
fc1c705965 Fix compilation on gcc 2.96 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5116 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-23 23:46:55 +00:00
Chris Lattner
6eaa46956a Fix warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5109 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-20 04:13:28 +00:00
Chris Lattner
79de6319b1 Update to use new interface for register info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5098 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-17 04:19:17 +00:00
Chris Lattner
3bbe7cc51d Round number of bytes allocated on the stack up to a multiple of 4 so that the 
stack remains aligned


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5095 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-17 03:15:26 +00:00
Chris Lattner
6c6cf873f3 Register allocator is responsible for spilling callee saved regs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5092 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-17 02:48:57 +00:00
Chris Lattner
3fc14c2602 Fix prolog/epilog in the presence of alloca 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5087 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-16 22:29:30 +00:00
Chris Lattner
27177cb1c1 Finish implementation of alias list impl 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5083 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-16 19:31:48 +00:00
Chris Lattner
92aec04cd6 Try #2 to get alias set stuff to work 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5077 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-16 16:14:51 +00:00
Chris Lattner
dfb0a541c7 Add info about register file aliasing 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5074 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-16 15:55:25 +00:00
Chris Lattner
f4b95d94e2 Correct the setting of Def flags on registers that are modified! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5065 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 22:38:47 +00:00
Chris Lattner
198ab640bb Simplify interfaces used by regalloc to insert code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5052 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-15 20:06:35 +00:00
Misha Brukman
87e369d221 Cleaned up the code: factored out switch/case into a separate function, put 
constants in an array for quick lookup. Stole the idea from elsewhere in
Jello.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5017 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-13 12:00:06 +00:00
Misha Brukman
fa18ade05b Treat longs as ints => pretend they're all 32-bit values and squeeze them into 
32-bit registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5008 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-13 10:43:09 +00:00
Misha Brukman
2b46e8eccc Added moveReg2Reg() and moveImm2Reg() to accomodate moving data around due to 
PHI nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5001 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-13 09:54:12 +00:00
Misha Brukman
07e376bd0d Moves now select correct opcode based on the data size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4981 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-13 04:24:53 +00:00
Misha Brukman
2adb3959f6 Implemented functions for emitting prologues and epilogues; 
removed EBP from the list of callee-saved registers (it isn't one).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4929 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-04 23:57:03 +00:00
Misha Brukman
a361c8417b storeReg2RegOffset() and loadRegOffset2Reg() now take the iterator by value 
instead of by reference, since they return the modified iterator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4914 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-04 17:14:13 +00:00
Misha Brukman
0af0d5bd3e Moved buildReg2RegClassMap() into from X86RegisterInfo to MRegisterInfo, since 
it is target-independent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4911 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-04 16:47:04 +00:00
Misha Brukman
03c6fafd05 Added support for callee- and caller-save registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4897 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-03 23:11:21 +00:00
Misha Brukman
6877dd3fb0 Fix order of operands on a store from reg to [reg+offset]. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4857 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-12-02 21:10:35 +00:00
Misha Brukman
8b938664f2 Oops. Got the MOVrm and MOVmr mixed up. Fixed. We can now print out 
instructions correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4830 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-22 23:15:27 +00:00
Misha Brukman
cf2b9ac204 Added methods to read/write values to stack in .h, fixed implementation in 
.cpp to return the iterator correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4827 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-22 22:43:47 +00:00
Misha Brukman
b83b28697c Add definitions for function headers from MRegisterInfo.h: 
Some functions are in X86RegisterInfo.cpp, others, because of the data they
need, are in X86RegisterClasses.cpp, which also defines some register classes:
byte, short, and int.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4784 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-20 18:59:43 +00:00
Chris Lattner
726140821f Initial checkin of X86 backend. 
We can instruction select exactly one instruction 'ret void'.  Wow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4284 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-25 22:55:53 +00:00