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8854 Commits

Author SHA1 Message Date
Chris Lattner
c9517fb6eb minor simplifications to this code, don't create a dead 
SCALAR_TO_VECTOR on paths that end up not using it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48056 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 22:48:29 +00:00
Chris Lattner
b607f9c822 This one looks easy, add a note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48055 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 22:32:39 +00:00
Chris Lattner
f658ad10f6 move these to the appropriate file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48054 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 22:28:45 +00:00
Dale Johannesen
7f96f3912e More ppc32 byval handling (bug fixes). Things 
are looking pretty good now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48043 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 01:41:42 +00:00
Evan Cheng
27b7db549e Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 00:58:38 +00:00
Dan Gohman
a2fcff4d97 Add support for calls with i128 return values on ppc64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48041 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-08 00:19:12 +00:00
Bill Wendling
5f5bf3a3fd PPC64 passes arguments of integral type in i64 registers, not i32. Reflect this 
by promoting smaller integral values (i32 at this point) to i64, then truncating
to get the wanted size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48030 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-07 20:49:02 +00:00
Dan Gohman
9ed06db5c8 Add support for lowering 128-bit shifts on ppc64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48029 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-07 20:36:53 +00:00
Dale Johannesen
8419dd6aa6 Next bits of PPC byval handling. Basically functional 
but there are bugs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48028 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-07 20:27:40 +00:00
Chris Lattner
af8ee84fe5 Add support for ppc64 shifts with 7-bit (oversized) shift amount (e.g. PPCshl). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48027 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-07 20:18:24 +00:00
Chris Lattner
49bd37d369 Replace SDT_PPCShiftOp in favor of SDTIntBinOps. This allows it to work 
with 32 or 64-bit operands/results.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48026 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-07 20:13:51 +00:00
Chris Lattner
d1108222fd mark frem as expand for all legal fp types on x86, regardless of whether 
we're using SSE or not.  This fixes PR2122.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48006 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-07 06:36:32 +00:00
Gabor Greif
2cf36e0772 some more spelling changes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47996 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-06 10:51:21 +00:00
Scott Michel
4cb8bd8eff Refine Cell's i64 constant generation code to cover more constants where the 
upper and lower 32-bits are the same (in addition to 0 and -1 previously.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47985 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-06 04:02:54 +00:00
Andrew Lenharth
6ad150baac gcc likes things spelled correctly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47981 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 23:41:37 +00:00
Dale Johannesen
1f797a32fd Next bit of PPC ByVal handling; call-site code seems 
correct now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47978 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 23:31:27 +00:00
Scott Michel
ad2715e0d7 - Fix support for "special" i64 immediates that can be loaded 
using IL, ILA, et. al. v2i64 and i64 are now supported by
  the select bits (SELB) instruction.

- Add missing comparison operations (testcase forthcoming)

- More multiclass refactoring.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47973 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 23:02:02 +00:00
Chris Lattner
4d93b2f16d evan implemented this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47948 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 17:11:51 +00:00
Evan Cheng
e9083d669a isTwoAddress = 1 -> Constraints. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47941 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 08:19:16 +00:00
Evan Cheng
e7b8a8b713 PSLLWri etc. are two-address instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47940 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 08:11:27 +00:00
Chris Lattner
063d825208 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47939 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 07:22:39 +00:00
Evan Cheng
b7664c6173 Ignore debugging related instructions if they get this far. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47934 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 02:34:36 +00:00
Evan Cheng
0b21390a86 Rather than asserting. Dump out the MI that we are not able to encode and abort. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47933 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 02:08:03 +00:00
Evan Cheng
6fd599fa69 Add a target lowering hook to control whether it's worthwhile to compress fp constant. 
For x86, if sse2 is available, it's not a good idea since cvtss2sd is slower than a movsd load and it prevents load folding. On x87, it's important to shrink fp constant since fldt is very expensive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47931 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 01:30:59 +00:00
Andrew Lenharth
d19189e990 64bit CAS on 32bit x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47929 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 01:15:49 +00:00
Evan Cheng
6130f66eaa Refactor code. Remove duplicated functions that basically do the same thing as 
findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47927 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-05 00:59:57 +00:00
Bill Wendling
2b5fab67c1 Removed spurious EnablePPCRS check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47918 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 23:27:33 +00:00
Dale Johannesen
5b3b695c2f Move PPC lowering functions into PPCTargetLowering 
class (cosmetic).  First piece of byval implementation;
this doesn't work yet.  No functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47917 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 23:17:14 +00:00
Bill Wendling
880d0f6018 Use a command-line option to turn register scavenging on/off for PPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47915 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 23:13:51 +00:00
Andrew Lenharth
a76e2f0331 x86-64 atomics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47903 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 21:13:33 +00:00
Evan Cheng
32967d2c7d 80 column violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47878 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 03:20:06 +00:00
Evan Cheng
07b7ea1a48 Remove -always-fold-and-in-test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47871 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-04 00:40:35 +00:00
Dan Gohman
4c1fa61652 Add support for lowering i64 SRA_PARTS and friends on x86-64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47865 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-03 22:22:09 +00:00
Bill Wendling
7194aaf738 This is the initial check-in for adding register scavenging to PPC. (Currently, 
PPC-64 doesn't work.) This also lowers the spilling of the CR registers so that
it uses a register other than the default R0 register (the scavenger scrounges
for one). A significant part of this patch fixes how kill information is
handled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47863 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-03 22:19:16 +00:00
Devang Patel
41e2397b72 s/isReturnStruct()/hasStructRetAttr()/g 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47857 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-03 21:46:28 +00:00
Chris Lattner
53b7277917 another random note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47831 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 19:29:42 +00:00
Chris Lattner
150943c178 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47830 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 19:27:34 +00:00
Chris Lattner
767486b1d5 Evan implemented these. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47828 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 18:05:14 +00:00
Chris Lattner
3be4893dce Evan implemented this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47827 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 17:56:29 +00:00
Chris Lattner
ff939213db add support for lvsl, fixing PR1481 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47825 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 08:54:27 +00:00
Chris Lattner
4e22012ea4 add support for the sse.cmp.* intrinsics, which fixes sse.isamax with the CBE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47824 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 08:47:13 +00:00
Chris Lattner
2299fec22c refactor intrinsic handling code out into its own method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47823 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 08:29:41 +00:00
Chris Lattner
d9a706ecf9 fix printing of undef vectors, this fixes "simple" and "build" in UnitTests/Vector. 
Now they all pass.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47820 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 08:14:45 +00:00
Chris Lattner
9152daf868 insertelement got the wrong operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47819 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 08:10:16 +00:00
Chris Lattner
e05252b476 Several changes: 
* Simplify handling of byval, making it easier to understand and more 
    consistent.  This fixes PR2065.
  * Clean up and simplify handling of GEPs.  I can actually understand it now!
  * Implement support for GEP'ing into vectors, this fixes
    SingleSource/UnitTests/Vector/build2 among others.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47818 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 08:07:24 +00:00
Chris Lattner
939732afc2 Fix a bug I introduced in constant array and constant vector handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47816 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 05:46:57 +00:00
Chris Lattner
b1855add0c implement shufflevector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47815 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 05:41:07 +00:00
Chris Lattner
0452ed6bd6 implement extractelement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47812 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 03:57:08 +00:00
Chris Lattner
33a44d928b implement insertelement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47811 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 03:52:39 +00:00
Chris Lattner
90683abb56 respect isSigned for vector types, fixing sdiv of vectors etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47810 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 03:41:23 +00:00
Chris Lattner
32cba8e063 print the attribute in the right place, this fixes function returning vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47809 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 03:39:43 +00:00
Chris Lattner
b61d41b8dd vector types are simple types. This fixes div/rem of vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47807 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 03:33:31 +00:00
Chris Lattner
85feab6c57 Print vector types appropriately. This gets basic vector code working 
(PR1126)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47806 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 03:29:50 +00:00
Chris Lattner
0a3d4d971d rename PT -> VT for VectorTypes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47805 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 03:18:46 +00:00
Chris Lattner
c8b6d339d7 Print i32/i64 integer constants as 1u instead of ((unsigned int)1). 
Use dyn_cast better.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47804 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 03:16:38 +00:00
Chris Lattner
a11deb0392 Move pr717 to here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47803 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-02 02:51:40 +00:00
Andrew Lenharth
fe0753efba good catch anton 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47800 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-01 23:18:21 +00:00
Andrew Lenharth
ce1105da43 make CAS work 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47799 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-01 22:27:48 +00:00
Andrew Lenharth
26ed8697d4 all but CAS working on x86 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47798 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-01 21:52:34 +00:00
Andrew Lenharth
ea7da50e5a Add lock prefix support to x86. Also add the instructions necessary for the atomic ops. They are still marked pseudo, since I cannot figure out what format to use, but they are the correct opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47795 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-03-01 13:37:02 +00:00
Anton Korobeynikov
8213f9cf94 Use enumeration for preffered EH dwarf encoding reason 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47770 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-29 22:09:08 +00:00
Anders Carlsson
b26947e967 Use the correct instruction encodings for the 64-bit MMX movd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47740 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-29 01:35:12 +00:00
Evan Cheng
d703ed6aed Added option -align-loops=<true/false> to disable loop aligner pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47736 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 23:29:57 +00:00
Dale Johannesen
28d08fdb9f Interface of getByValTypeAlignment differed between 
generic & x86 versions; change generic to follow x86
and improve comments.  Add PPC version (not right
for non-Darwin.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47734 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 22:31:51 +00:00
Lauro Ramos Venancio
f3c630e3fc Initialize TextAlignFillValue. Fix revision 47703. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47732 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 22:14:09 +00:00
Lauro Ramos Venancio
1f4a887e32 Avoid collisions in value names. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47725 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 20:26:04 +00:00
Chris Lattner
e29536ca8d add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47720 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 17:21:27 +00:00
Evan Cheng
e526d8a955 Set to default: x86 no longer fold and into test if it has more than one use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47711 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 07:46:38 +00:00
Chris Lattner
6baaf91598 Sparc backend doesn't support debug info yet, mark the nodes as expand. This fixes a crash on 
test/DebugInfo/funccall.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47709 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 05:54:25 +00:00
Chris Lattner
a4b521598a Fix CodeGen/Generic/storetrunc-fp.ll on sparc, PR2105 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47707 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 05:48:04 +00:00
Chris Lattner
61273d55e9 fix CodeGen/Generic/2008-01-25-dag-combine-mul.ll on sparc, PR2105 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47706 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 05:44:20 +00:00
Chris Lattner
48840f8db9 target-indep codegen memcpy lowering issue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47705 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 05:34:27 +00:00
Chris Lattner
daf6c541b2 Add a random not very important note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47704 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 04:52:59 +00:00
Evan Cheng
fb8075d03f Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 00:43:03 +00:00
Eli Friedman
41ce5b82da A few more small things I've run into. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47702 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-28 00:21:43 +00:00
Anton Korobeynikov
7b1b7f5c5a EHPreferredDataFormat hook for PPC targets. Looks like Darwin 
uses the same encoding everywhere. Linux FIXME'ed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47701 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 23:49:15 +00:00
Anton Korobeynikov
cee750fb1e Preparation step for some cleanup/generalization in EH information emission: 
provide TAI hook for selection of EH data emission format. Currently unused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47699 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 23:33:50 +00:00
Dan Gohman
ec59b95a19 Don't hard-code the mask size to be 32, which is incorrect on ppc64 
and was causing aborts with the new APInt changes. This may also be
fixing an obscure ppc64 bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47692 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 21:12:32 +00:00
Evan Cheng
fd1074f171 This is done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47688 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 20:26:32 +00:00
Bill Wendling
6ef781f3ce Final de-tabification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47663 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 06:33:05 +00:00
Chris Lattner
b09916bdfb Make X86TargetLowering::LowerSINT_TO_FP return without creating a dead 
stack slot and store if the  SINT_TO_FP is actually legal.  This allows
us to compile:

double a(double b) {return (unsigned)b;}

to:

_a:
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	ret

instead of:

_a:
	subq	$8, %rsp
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	addq	$8, %rsp
	ret

crazy.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47660 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 05:57:41 +00:00
Chris Lattner
22eedf4eec this code is correct but strange looking ;-) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47659 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 05:48:44 +00:00
Chris Lattner
d0ba2a9c14 Compile x86-64-and-mask.ll into: 
_test:
	movl	%edi, %eax
	ret

instead of:

_test:
        movl    $4294967295, %ecx
        movq    %rdi, %rax
        andq    %rcx, %rax
        ret

It would be great to write this as a Pat pattern that used subregs 
instead of a 'pseudo' instruction, but I don't know how to do that
in td files.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47658 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 05:47:54 +00:00
Evan Cheng
d36531249a Spiller now remove unused spill slots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47657 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 03:04:06 +00:00
Dan Gohman
b3564aa836 Convert the last remaining users of the non-APInt form of 
ComputeMaskedBits to use the APInt form, and remove the
non-APInt form.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47654 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 01:23:58 +00:00
Chris Lattner
ba309d43aa add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47652 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-27 01:17:20 +00:00
Arnold Schwaighofer
258bb1b8e8 Refactor according to Evan's and Anton's suggestions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47635 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 22:21:54 +00:00
Bill Wendling
e6d088acc9 Rename PrintableName to Name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47629 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 21:47:57 +00:00
Bill Wendling
74ab84c31e Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool 
would have been a Godsend here!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47625 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 21:11:01 +00:00
Arnold Schwaighofer
16a3e52d08 Correct function comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47606 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 17:50:59 +00:00
Bill Wendling
85db3a96b4 De-tabify 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47600 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 10:57:23 +00:00
Arnold Schwaighofer
a2a4b475fc Add support for intermodule tail calls on x86/32bit with 
GOT-style position independent code. Before only tail calls to
protected/hidden functions within the same module were optimized.
Now all function calls are tail call optimized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47594 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 10:21:54 +00:00
Arnold Schwaighofer
865c68188a Change the lowering of arguments for tail call optimized 
calls. Before arguments that could overwrite each other were
explicitly lowered to a stack slot, not giving the register allocator
a chance to optimize. Now a sequence of copyto/copyfrom virtual
registers ensures that arguments are loaded in (virtual) registers
before they are lowered to the stack slot (and might overwrite each
other). Also parameter stack slots are marked mutable for
(potentially) tail calling functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47593 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-26 09:19:59 +00:00
Dan Gohman
545914311a Revert the assert for MUL_LOHI with an unused high result; Chris 
pointed out that this isn't correct at -O0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47575 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 22:43:48 +00:00
Dale Johannesen
14e2ea9a55 Revise previous patch per review. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47573 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 22:29:22 +00:00
Dan Gohman
c2d9b5fcdf Add an assert to verify that we don't see an 
{S,U}MUL_LOHI with an unused high value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47569 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 22:15:55 +00:00
Dan Gohman
fcf81db600 Remove the hack that turned an {S,U}MUL_LOHI with an unused high 
result into a MUL late in the X86 codegen process. ISD::MUL is
once again Legal on X86, so this is no longer needed. And, the
hack was suboptimal; see PR1874 for details.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47567 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 21:57:04 +00:00
Dan Gohman
2e68b6f52d Convert MaskedValueIsZero and all its users to use APInt. Also add 
a SignBitIsZero function to simplify a common use case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47561 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 21:11:39 +00:00
Dale Johannesen
079f2a66ae Expand removal of MMX memory copies to allow 1 level 
of TokenFactor underneath chain (seems to be enough)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47554 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-25 19:20:14 +00:00
Bill Wendling
181eb737b2 Some platforms use the same name for 32-bit and 64-bit registers (like 
%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47534 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-24 00:56:13 +00:00
Scott Michel
a59d469e9b Merge current work back to tree to minimize diffs and drift. Major highlights 
for CellSPU modifications:

- SPUInstrInfo.td refactoring: "multiclass" really is _your_ friend.
- Other improvements based on refactoring effort in SPUISelLowering.cpp,
  esp. in SPUISelLowering::PerformDAGCombine(), where zero amount shifts and
  rotates are now eliminiated, other scalar-to-vector-to-scalar silliness
  is also eliminated.
- 64-bit operations are being implemented, _muldi3.c gcc runtime now
  compiles and generates the right code. More work still needs to be done.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47532 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 18:41:37 +00:00
Evan Cheng
c19eca38ef Turning on remat of pic loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47524 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 02:07:42 +00:00
Evan Cheng
b2a0abce1e No need recognize load from a fixed argument slot as re-materializable. LiveIntervalAnalysis already handles it as a special case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47522 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-23 01:47:44 +00:00
Dale Johannesen
22c3979fca Split ParameterAttributes.h, putting the complicated 
stuff into ParamAttrsList.h.  Per feedback from
ParamAttrs changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47504 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 22:17:59 +00:00
Dale Johannesen
3edd6dcf82 MMX vectors are passed 4-byte aligned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47483 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 17:47:28 +00:00
Evan Cheng
d8850a512e Allow re-materialization of pic load (controlled by -remat-pic-load for now). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47476 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 09:25:47 +00:00
Chris Lattner
d2b1fb27df copy mmx values from/to memory with GPRs on x86-32 
instead of with mmx registers.  This horribleness is apparently
done by gcc to avoid having to insert emms in places that really 
should have it.  This is the second half of rdar://5741668.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47474 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 05:18:04 +00:00
Chris Lattner
149a4e56fc Start using GPR's to copy around mmx value instead of mmx regs. 
GCC apparently does this, and code depends on not having to do
emms when this happens.  This is x86-64 only so far, second half
should handle x86-32.

rdar://5741668


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47470 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-22 02:09:43 +00:00
Eli Friedman
a2e7efa6d3 A few minor updates, removing implemented stuff and adding a couple of 
new things.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47458 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 21:16:49 +00:00
Chris Lattner
7c1687c196 Dan implemented one multiply issue. Replace it with another. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47431 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 06:51:29 +00:00
Andrew Lenharth
ab0b949e0e Atomic op support. If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47430 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-21 06:45:13 +00:00
Evan Cheng
3738f2d59f Poorly named option. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47400 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 20:57:32 +00:00
Evan Cheng
5144ed1e35 Temporarily backing out r47337. It breaks a number of CBE tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47385 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 18:32:05 +00:00
Anton Korobeynikov
4aefd6b7d4 Fix newly-introduced 4.3 warnings 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47375 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 12:07:57 +00:00
Anton Korobeynikov
d28b57569d Fix code style 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47370 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 11:24:05 +00:00
Anton Korobeynikov
7c1c261272 Remove bunch of gcc 4.3-related warnings from Target 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47369 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 11:22:39 +00:00
Anton Korobeynikov
ae9f3a3b7c Unbreak build with gcc 4.3: provide missed includes and silence most annoying warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47367 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 11:08:44 +00:00
Evan Cheng
79964fdbaf Disable for now. This is pessimizing code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47354 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-20 02:29:17 +00:00
Evan Cheng
e9c608d6cc Add hidden option -x86-fold-and-in-test to test the effect the test / and folding change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47351 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-19 23:36:51 +00:00
Andrew Lenharth
86532db5d7 fix some byval problems in the cbe. Closes PR2065 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47337 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-19 19:47:54 +00:00
Chris Lattner
ce2bcc8839 Don't fold and's into test instructions if they have multiple uses. 
This compiles test-nofold.ll into:

_test:
	movl	$15, %ecx
	andl	4(%esp), %ecx
	testl	%ecx, %ecx
	movl	$42, %eax
	cmove	%ecx, %eax
	ret

instead of:
_test:
	movl	4(%esp), %eax
	movl	%eax, %ecx
	andl	$15, %ecx
	testl	$15, %eax
	movl	$42, %eax
	cmove	%ecx, %eax
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47330 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-19 17:37:35 +00:00
Evan Cheng
422cba6ed0 Me not like duplicated comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47300 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-19 02:05:16 +00:00
Evan Cheng
efec751a1b - When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type. 
- X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47290 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-18 23:04:32 +00:00
Dan Gohman
b00ee21f21 Chris pointed out that it's not necessary to set i64 MUL to Expand 
on x86-32 since i64 itself is not a Legal type. And, update some
comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47282 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-18 19:34:53 +00:00
Chris Lattner
7c4e9a44a4 upgrade some tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47280 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-18 18:46:39 +00:00
Nate Begeman
e9fe65c973 Add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47279 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-18 18:39:23 +00:00
Chris Lattner
92b416f64e Add a note about sext from i1 plus flags use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47278 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-18 18:30:13 +00:00
Dan Gohman
339ffedca9 Don't mark scalar integer multiplication as Expand on x86, since x86 
has plain one-result scalar integer multiplication instructions.
This avoids expanding such instructions into MUL_LOHI sequences that
must be special-cased at isel time, and avoids the problem with that
code that provented memory operands from being folded.

This fixes PR1874, addressesing the most common case. The uncommon
cases of optimizing multiply-high operations will require work
in DAGCombiner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47277 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-18 17:55:26 +00:00
Chris Lattner
456012c72e move PR2053 to here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47237 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-17 19:43:57 +00:00
Andrew Lenharth
d497d9fab6 I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47213 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-16 14:46:26 +00:00
Andrew Lenharth
22c5c1b2df llvm.memory.barrier, and impl for x86 and alpha 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47204 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-16 01:24:58 +00:00
Chris Lattner
ec321b4d64 Handle \n's in value names for more targets. The asm printers 
really really really need refactoring :(



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47171 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-15 19:04:54 +00:00
Chris Lattner
3502d0dac3 If the llvm name contains an unprintable character, don't print it in 
the global comment.  This prevents printing things like:

...  # foo
bar

when the name is "foo\nbar".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47170 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-15 18:56:05 +00:00
Dale Johannesen
3b407444c9 Cosmetics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47168 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-15 18:40:53 +00:00
Dale Johannesen
ab1a0354ec Remove warning about 64-bit code on processor 
that doesn't support it.  Per Chris.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47162 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-15 18:09:51 +00:00
Dale Johannesen
b4c9a687eb nocona, core2 and penryn support 64 bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47149 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-15 01:22:41 +00:00
Dale Johannesen
db01c8ba26 Rewrite tblgen handling of subtarget features so 
it follows the order of the enum, not alphabetical.
The motivation is to make -mattr=+ssse3,+sse41
select SSE41 as it ought to.  Added "ignored"
enum values of 0 to PPC and SPU to avoid compiler
warnings.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47143 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 23:35:16 +00:00
Nate Begeman
ccef580583 Fix single precision FP constants on SPU. They are actually legal, 
which allows us to kill a target-specific node.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47127 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 18:43:04 +00:00
Duncan Sands
00fee65fd2 In TargetLowering::LowerCallTo, don't assert that 
the return value is zero-extended if it isn't
sign-extended.  It may also be any-extended.
Also, if a floating point value was returned
in a larger floating point type, pass 1 as the
second operand to FP_ROUND, which tells it
that all the precision is in the original type.
I think this is right but I could be wrong.
Finally, when doing libcalls, set isZExt on
a parameter if it is "unsigned".  Currently
isSExt is set when signed, and nothing is
set otherwise.  This should be right for all
calls to standard library routines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47122 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 17:28:50 +00:00
Nate Begeman
e179584f9b Change how FP immediates are handled. 
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
   if it is legal.

This allows ConstantFP to be handled like Constant, allowing for 
targets that can encode FP immediates as MachineOperands.

As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants!  Hooray.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47121 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 08:57:00 +00:00
Nate Begeman
0fec975a18 Move some useful operands up into the all-targets .td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47115 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 07:25:46 +00:00
Chris Lattner
eb05f90c71 upgrade some entries, remove stuff that is done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47109 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 06:19:02 +00:00
Chris Lattner
ea1cddf546 the mid-level optimizer removes this stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47108 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 05:43:18 +00:00
Chris Lattner
48b4d96949 this one is easy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47107 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 05:41:38 +00:00
Chris Lattner
8b0cb7bcc6 This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47106 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 05:39:46 +00:00
Dan Gohman
f4f92f5ebe Assigning an APInt to 0 with plain assignment gives it a one-bit 
size. Initialize these APInts to properly-sized zero values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47099 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 23:07:24 +00:00
Dan Gohman
977a76fbb6 Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits 
to pass the mask APInt by value, not by reference. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47096 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 22:28:48 +00:00
Nicolas Geoffray
afe6c2b001 Enable exception handling int JIT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47079 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 18:39:37 +00:00
Chris Lattner
a1998d1cba Fix the PPC JIT regressions by encoding zeroreg as 0 for BLR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47067 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 17:24:14 +00:00
Chris Lattner
9f72d1a730 don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS. 
DAGCombine is now quite good at zapifying them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47053 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 07:35:30 +00:00
Nate Begeman
b5041b3085 readme updates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47051 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 07:06:12 +00:00
Nate Begeman
ba8d51c1d7 Make register scavenging happy by not using a reg (CR0) that isn't defined 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47045 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 02:58:33 +00:00
Evan Cheng
a4d16a1f0d commuteInstr() can now commute non-ssa machine instrs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47043 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 02:46:49 +00:00
Dan Gohman
fd29e0eb06 Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t. 
Add an overload that supports the uint64_t interface for use by clients
that haven't been updated yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47039 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 00:35:47 +00:00
Dale Johannesen
3006c39e3a __DATA not __DATA__ is the right segment name on darwin. 
Spotted by Nick Kledzik.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47037 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-12 23:35:09 +00:00
Nate Begeman
bf1caa9854 Remove some dead code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47036 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-12 22:54:40 +00:00
Nate Begeman
cdd1eeca2c SSE4.1 64b integer insert/extract pattern support 
Move formats into the formats file


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47035 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-12 22:51:28 +00:00
Evan Cheng
394d28048c Revert r46916 PPCTargetAsmInfo.cpp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47020 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-12 19:25:12 +00:00
Evan Cheng
9f143ce989 Only using x86-64 rip relative addressing in non-staic mode? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47019 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-12 19:20:46 +00:00
Evan Cheng
add251754c Update comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47002 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-12 07:59:55 +00:00
Evan Cheng
5ae45caf79 Unbreak various insert_vector_elt and extract_vector_elt tests in presence of SSE4. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47001 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-12 07:59:45 +00:00
Nate Begeman
5bb013c34a Stuff noticed while grepping code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46979 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-11 23:47:56 +00:00
Nate Begeman
14d12caf1d Enable SSE4 codegen and pattern matching. 
Add some notes to the README.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46949 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-11 04:19:36 +00:00
Nate Begeman
a6ed0aa8ec additional missing feature 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46948 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-11 04:16:09 +00:00
Nate Begeman
ab5d56c6b9 xmm0 variable blends 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46931 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-10 18:47:57 +00:00
Dan Gohman
6f0d024a53 Rename MRegisterInfo to TargetRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-10 18:45:23 +00:00
Nick Lewycky
16b0bd6c83 Match GCC's behaviour for these sections. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46916 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-10 00:03:54 +00:00
Nate Begeman
fea2be50b9 memopv16i8 had wrong alignment requirement, would have broken pabsb 
pabs{b,w,d} are not two address
fix extract-to-mem sse4 ops
add sse4 vector sign extend nodes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46915 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-09 23:46:37 +00:00
Nate Begeman
1426d52cab Skeleton of insert and extract matching, more to come 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46902 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-09 01:38:08 +00:00
Nate Begeman
b5af3344c1 Tablegen support for insert & extract element matching 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46901 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-09 01:37:05 +00:00
Evan Cheng
5fd79d0560 It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46893 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-08 21:20:40 +00:00
Dale Johannesen
0c191872ab 64-bit (MMX) vectors do not need restrictive alignment. 
128-bit vectors need it only when SSE is on.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46890 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-08 19:48:20 +00:00
Dan Gohman
60783304f6 Avoid needlessly casting away const qualifiers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46877 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-08 03:29:40 +00:00
Evan Cheng
33663fc104 Added missing entries in X86 load / store folding tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46866 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-08 00:12:56 +00:00
Dan Gohman
3069b87437 Follow Chris' suggestion; change the PseudoSourceValue accessors 
to return pointers instead of references, since this is always what
is needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46857 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-07 18:41:25 +00:00
Dan Gohman
4fdad172de Add SourceValue information for outgoing argument stores on x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46854 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-07 16:28:05 +00:00
Evan Cheng
be3bf42331 Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. 
Before:
_main:
        subq    $8, %rsp
        leaq    _X(%rip), %rax
        movsd   8(%rax), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret
Now:
_main:
        subq    $8, %rsp
        movsd   _X+8(%rip), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret

Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl    %ecx, %ecx
movl    %ecx, %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-07 08:53:49 +00:00
Evan Cheng
15246738f2 In some cases, e.g. ADD32ri, no transformation is made. Guide against it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46849 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-07 08:29:53 +00:00
Dan Gohman
69de1932b3 Re-apply the memory operand changes, with a fix for the static 
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46827 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-06 22:27:42 +00:00
Evan Cheng
ebaaa91094 Move to getCALLSEQ_END to ensure CALLSEQ_END node produces a flag. This is consistent with the definition in td file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46775 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-05 22:44:06 +00:00
Dale Johannesen
e672af15d6 Implement sseregparm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46764 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-05 20:46:33 +00:00
Nate Begeman
5a804e3e21 Ident mnemonics appropriately 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46746 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-05 08:49:09 +00:00
Evan Cheng
4e3f5a4e9c Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46724 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-04 23:06:48 +00:00
Nate Begeman
c451ac0a42 This method should be virtual 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46723 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-04 23:04:24 +00:00
Nate Begeman
48a65511d0 Eliminate some redundant code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46720 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-04 21:44:06 +00:00
Nate Begeman
204e84e138 The rest of the SSE4.1 intrinsic patterns that are obvious to me. Getting 
Evan's help with the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46697 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-04 06:00:24 +00:00
Nate Begeman
2f6f1c02ca Some more SSE 4.1 intrinsic patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46696 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-04 05:34:34 +00:00
Nate Begeman
63ec90a6a8 SSE 4.1 Intrinsics and detection 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46681 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-03 07:18:54 +00:00
Chris Lattner
3d62d780ab explicitly include Compiler.h instead of getting it from tblgen in the middle of a class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46676 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-03 05:43:57 +00:00
Chris Lattner
a47b9bcbde don't do ReplaceUses on a result that doesn't exist. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46673 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-03 03:20:59 +00:00
Evan Cheng
4eecdeb3fa Get rid of the annoying blank lines before labels. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46667 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-02 08:39:46 +00:00
Nick Lewycky
916a9f071f Don't use uninitialized values. Fixes vec_align.ll on X86 Linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46666 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-02 08:29:58 +00:00
Evan Cheng
fcf5d4f456 Unbreak ppc debug support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46665 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-02 05:06:29 +00:00
Evan Cheng
a844bdeab3 SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. 
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46659 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-02 04:07:54 +00:00
Evan Cheng
b8033e821d Frame index can be negative. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46655 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-02 00:17:00 +00:00
Lauro Ramos Venancio
859efca7f9 CBackend: Implement unaligned load/store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46646 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-01 21:25:59 +00:00
Evan Cheng
1b08bbca55 Remove the nasty LABEL hack with a much less evil one. Now llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46635 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-01 09:10:45 +00:00
Evan Cheng
334dc1f58d Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46623 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-31 21:00:00 +00:00
Evan Cheng
bb81d97feb Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46609 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-31 09:59:15 +00:00
Christopher Lamb
8535624739 Allow ComplexExpressions in InstrInfo.td files to be slightly more... complex! ComplexExpressions can now have attributes which affect how TableGen interprets 
the pattern when generating matchin code. 

The first (and currently, only) attribute causes the immediate parent node of the ComplexPattern operand to be passed into the matching code rather than the node at the root of the entire DAG containing the pattern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46606 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-01-31 07:27:46 +00:00