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3187 Commits

Author SHA1 Message Date
Chris Lattner
ab9642ff8f turn the mcinst asmprinter on by default for x86, tweaking two tests to 
expect the slight syntax differences in the generated code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81305 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 00:41:36 +00:00
Chris Lattner
f43b45282f this got merged into lea.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81298 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 00:22:31 +00:00
Chris Lattner
e1d8d831d2 filecheckize 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81297 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 00:19:46 +00:00
Dan Gohman
fce288fc91 Eliminate more uses of llvm-as and llvm-dis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-09 00:09:15 +00:00
Dan Gohman
36a0947820 Eliminate more uses of llvm-as and llvm-dis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 23:54:48 +00:00
Chris Lattner
fc227be725 update various tests for signedness changes in .s file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81289 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 23:51:06 +00:00
Chris Lattner
94d1077d99 adjust for signedness change. I'd appreciate it if an ARM flavored person 
could look at this: the top undefined bits of an immediate shouldn't affect
isel (cmp vs cmp.w)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81288 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 23:44:53 +00:00
Chris Lattner
543d57352c merge thumb2-bic2.ll into thumb2-bic.ll and update for signedness changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81285 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 23:41:06 +00:00
Chris Lattner
08ab4fdb59 tweak this to pass on linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81273 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 23:32:40 +00:00
Chris Lattner
8429837a94 convert to filecheck syntax 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81267 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 23:16:26 +00:00
Chris Lattner
d842962e27 change selectiondag to add the sign extended versions of immediate operands 
to instructions instead of zero extended ones.  This makes the asmprinter
print signed values more consistently.  This apparently only really affects
the X86 backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81265 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 23:05:44 +00:00
Anton Korobeynikov
2ba62ef7f2 Unbreak getOnesVector() / getZeroVector() to use valid ARM extended imm's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81262 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 22:51:43 +00:00
Chris Lattner
8047d763a5 filecheckize some tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81259 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 22:38:46 +00:00
Dan Gohman
3e054fe9ef Use opt -S instead of piping bitcode output through llvm-dis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81257 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 22:34:10 +00:00
Dan Gohman
b1e1e82c54 Change these tests to feed the assembly files to opt directly, instead 
of using llvm-as, now that opt supports this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81226 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 16:50:01 +00:00
Anton Korobeynikov
6ca0b9e722 Add NEON 'laned' operations. This fixes another bunch of gcc testsuite fails and 
makes the code faster.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81220 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 15:22:32 +00:00
Anton Korobeynikov
7d16da42ba Unbreak 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81205 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 07:30:03 +00:00
Evan Cheng
8bdb0de2bd When remat'ing and destination virtual register has a sub-register index. Make sure the sub-register class matches the register class of the remat'ed instruction definition register class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81204 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 06:39:07 +00:00
Chris Lattner
467036058b disable some irrelevant eh emission 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81200 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 06:26:40 +00:00
Chris Lattner
ba3598cb1f fix PR4767, a crash because fp stackifier visited blocks in 
depth first order, so it wouldn't process unreachable blocks.
When compiling at -O0, late dead block elimination isn't done
and the bad instructions got to isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81187 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 04:55:44 +00:00
Dan Gohman
ed48caf5e7 Fix an abort on a store of an empty struct member. getValue returns 
null in the case of an empty struct, so don't try to call getNumValues
on it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81180 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-08 01:44:02 +00:00
Dan Gohman
fd06aa7c07 Fix a thinko: When lowering fneg with xor, bitcast the operands 
from floating-point to integer first, and bitcast the result
back to floating-point. Previously, this test was passing by
falling back to SelectionDAG lowering. The resulting code isn't
as nice, but it's correct and CodeGen now stays on the fast path.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81171 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-07 23:47:14 +00:00
Daniel Dunbar
6a42be27b8 Don't depend on arch specific global prefix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81084 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-05 11:53:06 +00:00
Daniel Dunbar
31ab6e3364 Eliminate uses of %prcontext. 
- I'd appreciate it if someone else eyeballs my changes to make sure I captured
   the intent of the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81083 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-05 11:35:16 +00:00
Bob Wilson
da4ae4be5b Stabilize the order of live intervals in the priority_queue used by the 
linear scan reg alloc.  This fixes a problem I ran into where extracting
a function from a larger file caused the generated code to change (masking
the problem I was trying to debug) because the allocator behaved differently.

This changes the results for two X86 regression checks.  stack-color-with-reg
is improved, with one less instruction, but pr3495 is worse, with one more
copy.  As far as I can tell, these tests were just getting lucky or unlucky,
so I've changed the expected results.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81060 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-05 01:19:16 +00:00
Evan Cheng
030a0a0cdb Run branch folding if if-converter make some transformations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80994 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-04 07:47:40 +00:00
Daniel Dunbar
e57dc10985 Remove stale greps. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80986 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-04 05:07:52 +00:00
Bob Wilson
6aa9775888 Convert tests to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80983 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-04 04:07:19 +00:00
Bob Wilson
5ffe917f72 Convert a test to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80975 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-04 00:32:31 +00:00
Dan Gohman
3d45a853db LLVM currently represents floating-point negation as -0.0 - x. Fix 
FastISel to recognize this pattern and emit a floating-point
negation using xor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80963 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-03 22:53:57 +00:00
Daniel Dunbar
a87f9218be Remove dead greps. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80946 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-03 20:59:02 +00:00
Dan Gohman
8d44b28bc6 Recognize more opportunities to use SSE min and max instructions, 
swapping the operands if necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80940 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-03 20:34:31 +00:00
Mon P Wang
3653b13c52 Test cases for vector shifts changes r80935 
Changed the old vector shift test to use FileCheck


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80936 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-03 19:57:35 +00:00
Evan Cheng
63476a8040 Reference to hidden symbols do not have to go through non-lazy pointer in non-pic mode. rdar://7187172. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80904 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-03 07:04:02 +00:00
Chris Lattner
46d061dd28 merge all the basic linux/32 pic tests together into one test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80902 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-03 06:29:23 +00:00
Chris Lattner
1c9c4a75e8 rename test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80901 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-03 06:16:49 +00:00
Anton Korobeynikov
69d1c1aebf More missed vdup patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80838 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-02 21:21:28 +00:00
Bob Wilson
8a3198b770 Add support for generating code for vst{234}lane intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80707 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 18:51:56 +00:00
Bob Wilson
2af658fcc0 Fix incorrect declarations of intrinsics in this test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80705 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 18:50:43 +00:00
Bob Wilson
c011005912 Add test for vld{234}_lane instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80658 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 04:27:10 +00:00
Bob Wilson
71124f698b Fix pr4843: When an instruction has multiple destination registers that are 
tied to different source registers, the TwoAddressInstructionPass needs to
be smarter.  Change it to check before replacing a source register whether
that source register is tied to a different destination register, and if so,
defer handling it until a subsequent iteration.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80654 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 04:18:40 +00:00
Jim Grosbach
46e0faa81c SJLJ is arm/darwin only for now. force the triple for the test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80651 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 02:34:49 +00:00
Jim Grosbach
3fb2b1ede3 Clean up LSDA name generation and use for SJLJ exception handling. This 
makes an eggregious hack somewhat more palatable. Bringing the LSDA forward
and making it a GV available for reference would be even better, but is
beyond the scope of what I'm looking to solve at this point.

Objective C++ code could generate function names that broke the previous
scheme. This fixes that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80649 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-09-01 01:57:56 +00:00
David Goodwin
a3251db21a Don't mark a register live at an undef use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80621 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-31 20:47:02 +00:00
Evan Cheng
029599bf01 Remove .n suffix for some 16-bit opcodes now that Darwin assembler is fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80615 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-31 20:14:07 +00:00
Chris Lattner
251829ed87 eliminate some uses of prcontext. Any help here would be appreciated :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80520 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-30 21:45:23 +00:00
Anton Korobeynikov
d91aafd005 Add missed pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80502 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-30 19:06:39 +00:00
Anton Korobeynikov
b00c03bb35 EXTRACT_VECTOR_ELEMENT can have result type different from element type. 
Remove the assertion and generalize the code for ARM NEON stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80498 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-30 17:14:54 +00:00
Dan Gohman
71a258c36b CMOV_GR8 clobbers EFLAGS when its expansion involves an xor to set 
a register to 0. This fixes PR4814.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80445 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-29 22:19:15 +00:00
Anton Korobeynikov
71624cc786 Do not assert on too wide splats we don't support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80409 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-29 00:08:18 +00:00
Anton Korobeynikov
2324bdc1ee Add missed extract_element pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80408 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-28 23:41:26 +00:00
Evan Cheng
e4e4ed3b56 Let Darwin linker auto-synthesize stubs and lazy-pointers. This deletes a bunch of nasty code in ARM asm printer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80404 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-28 23:18:09 +00:00
Evan Cheng
0e87e23f6e v4, v5 does not support sxtb / sxth. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80322 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-28 00:31:43 +00:00
Anton Korobeynikov
2a82a7aa60 scalar_to_vector is fully legal now (implemented as subreg accesses) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80249 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-27 16:04:47 +00:00
Anton Korobeynikov
3a0f1b3ed0 Ok, sometimes it's profitable to turn scalar_to_vector stuff into subreg access. 
Add a testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80246 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-27 14:51:42 +00:00
Evan Cheng
cdbb3f5d33 Fix PR4789. Teach eliminateFrameIndex how to handle VLDRQ and VSTRQ which cannot fold any immediate offset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80191 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-27 01:23:50 +00:00
Dan Gohman
7e7f06e70a X86FastISel support for loading and storing values of type i1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80186 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-27 00:31:47 +00:00
Dan Gohman
cbbea0ffc7 Expand i8 selects into control flow instead of 16-bit conditional 
moves. This avoids the need to promote the operands (or implicitly
extend them, a partial register update condition), and can reduce
i8 register pressure. This substantially speeds up code such as
write_hex in lib/Support/raw_ostream.cpp.

subclass-coalesce.ll is too trivial and no longer tests what it was
originally intended to test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80184 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-27 00:14:12 +00:00
Bob Wilson
e4696cf03d Convert some more Neon tests to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80120 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-26 18:11:50 +00:00
Dale Johannesen
4e68f8803d Alter 79292 to produce output that actually assembles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80119 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-26 18:10:32 +00:00
Anton Korobeynikov
1cb852b0ea Expand scalar_to_vector - we don't have any isel logic for it now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80107 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-26 16:26:09 +00:00
Dan Gohman
af70e5c676 Don't use INSERT_SUBREG to model anyext operations on x86-64, as it 
leads to partial-register definitions. To help avoid redundant
zero-extensions, also teach the h-register matching patterns that
use movzbl to match anyext as well as zext.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80099 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-26 14:59:13 +00:00
Anton Korobeynikov
cd76128f18 Add dummy inline asm handling for 'r' constraint. This fixes PR4778 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80085 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-26 13:44:29 +00:00
Scott Michel
77f452d1a8 Updated i128 sext support for CellSPU backend, contributed by Ken Werner (IBM) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80042 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 22:37:34 +00:00
Chris Lattner
67e7ba8fc2 remove some dead lines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80031 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 21:01:56 +00:00
Chris Lattner
447da71345 convert to filecheck style 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80029 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 20:57:38 +00:00
Chris Lattner
0765ce66be convert to filecheck 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80025 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 20:49:04 +00:00
Daniel Dunbar
3ff36b7814 Switch abi-isel.ll to FileCheck; it's not much faster, but it now tests a lot 
more and is much nicer to the OS.
 - Dan, please check. If there are parts of the test you think I should strip
   out so it doesn't cause random failures let me know (there are still some PIC
   label numbers in it, for example).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80019 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 18:45:03 +00:00
David Goodwin
88a589c4b3 Fixup register kills after scheduling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80002 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 17:03:05 +00:00
Anton Korobeynikov
379a087cc7 Provide dynamic_stackalloc lowering for MSP430. 
This fixes PR4769

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80001 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 17:00:23 +00:00
Dan Gohman
fea1dd0804 Remove obsolete -f flags. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79992 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 15:38:29 +00:00
Dale Johannesen
f6163dc856 Fix PR 4751, another difficulty with %a modifier on x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79961 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-25 00:16:14 +00:00
Scott Michel
f6045fe8c4 - Remove SelectSEXTi128 from SPUISelDAGToDAG.cpp, evidently, this is redundant 
code, according to Anton (I'm not totally convinced, but we can always
  resurrect patches if we need to do so.)
- Start moving CellSPU's tests to prefer FileCheck.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79958 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-24 23:57:35 +00:00
Scott Michel
838dbd92d8 Prefer 'FileCheck' over 'grep'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79953 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-08-24 22:49:22 +00:00
Scott Michel
f1fa4fd282 128-bit sign extension and vector shift cleanups, contributed by Ken Werner 
(IBM).


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 2009-08-24 22:28:53 +00:00
Bob Wilson
81fece667e Fix a typo. Somehow I thought this had passed before, but I guess not. 
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 2009-08-24 21:17:17 +00:00
Bob Wilson
ef63f70794 Convert slow test to use FileCheck. 
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 2009-08-24 20:33:47 +00:00
Daniel Dunbar
d60054e512 Convert two gratuitous abuses of poor helpless CPU cycles to FileCheck. 
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 2009-08-24 20:08:27 +00:00
Dale Johannesen
a3f2b21aff Split test into 3. 
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 2009-08-24 17:51:19 +00:00
Dale Johannesen
a60e51f7e8 Make linkerprivate work for ARM and PPC. Testcase covers 
all Darwin targets; could be split into separate tests for
the chip subdirectories, but from Chris' last mail on testing
I assume he'd rather have only one test.  Generic seems to be
the best available, maybe there should be a Darwin subdirectory?



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 2009-08-24 01:03:42 +00:00
Daniel Dunbar
67f99986fa Rerevert (r75663 and r76805), seems there is more non-determinism. 
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 2009-08-23 17:26:24 +00:00
Jakob Stoklund Olesen
46ff969ca6 Fix PR4753. 
When undoing a reuse in ReuseInfo::GetRegForReload, check if it was only a
sub-register being used. The MachineOperand::getSubReg() method is only valid
for virtual registers, so we have to recover the sub-register index manually.

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 2009-08-23 13:01:45 +00:00
Daniel Dunbar
895ae9b30d Speculatively revert r76823 (i.e., reapply r75663 and r76805) to see if the real 
problem is fixed by the TableGen determinism fix.

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 2009-08-23 10:44:51 +00:00
Eli Friedman
ce392eb3ea Make x86 test actually test x86 code generation. Fix the 
construct on ARM, which was breaking by coincidence, and add a similar 
testcase for ARM.



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 2009-08-22 03:13:10 +00:00
Chris Lattner
934a7567cb rename test, make more specific. 
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 2009-08-22 00:44:24 +00:00
Anton Korobeynikov
d99dda22f4 Add missing RUN line 
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 2009-08-22 00:28:50 +00:00
Anton Korobeynikov
65a3788694 Reduce the test 
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 2009-08-22 00:18:11 +00:00
Bob Wilson
b6c68f9e74 Use CHECK-NEXT to make sure we're only getting one copy of each shuffle 
instruction.


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 2009-08-22 00:13:23 +00:00
Bob Wilson
c692cb77aa Match VTRN, VZIP, and VUZP shuffles. Restore the tests for these operations, 
now using shuffles instead of intrinsics.


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 2009-08-21 20:54:19 +00:00
Anton Korobeynikov
162da3c7b4 Add fcopysign instructions 
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 2009-08-21 20:02:37 +00:00
Anton Korobeynikov
3c2734c82b Handle 'r' inline asm constraint 
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 2009-08-21 18:15:41 +00:00
Bob Wilson
3b83287c4e Add some tests for vext.16 and vext.32. 
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 2009-08-21 16:35:24 +00:00
Bob Wilson
d4b4cf524b Remove Neon intrinsics for VZIP, VUZP, and VTRN. We will represent these as 
vector shuffles.  Temporarily remove the tests for these operations until the
new implementation is working.


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 2009-08-21 00:01:42 +00:00
Dale Johannesen
a70872e15e Use FileCheck even though this means testing for something 
that has nothing to do with the point of the test, per Chris.



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 2009-08-20 22:12:08 +00:00
Dan Gohman
ef74e9bf2a Fix an x86 code size regression: prefer RIP-relative addressing 
over absolute addressing even in non-PIC mode (unless the address
has an index or something else incompatible), because it has a
smaller encoding.


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 2009-08-20 18:23:44 +00:00
Evan Cheng
89d177f017 Fix an obvious copy-n-paste bug. 
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 2009-08-20 17:01:04 +00:00
Dale Johannesen
4caadc3ae0 Use FileCheck for the test run where it's appropriate. 
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 2009-08-20 16:58:04 +00:00
Dale Johannesen
7bcec7e541 Handle 'a' modifier in X86 asms. PR 4742. 
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 2009-08-19 22:44:41 +00:00
Bill Wendling
ef01ab0973 Make this test platform neutral. 
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 2009-08-19 18:51:45 +00:00
Dan Gohman
6a402dc952 Add an x86 peep that narrows TEST instructions to forms that use 
a smaller encoding. These kinds of patterns are very frequent in
sqlite3, for example.


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 2009-08-19 18:16:17 +00:00