Commit Graph

497 Commits

Author SHA1 Message Date
Chris Lattner
a34544d96c Don't print constant initializers, they may span lines now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26403 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 20:09:23 +00:00
Chris Lattner
2deb87f201 The HasNoV9 hack isn't needed here, now that tblgen knows that CustomDAGSchedInserter
instructions are expensive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26298 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 18:04:32 +00:00
Nate Begeman
551bf3f800 kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26255 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 05:43:56 +00:00
Nate Begeman
368e18d56a Rework the SelectionDAG-based implementations of SimplifyDemandedBits
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 21:11:51 +00:00
Chris Lattner
45090476be Sparc actually *DOES* have a directive for emitting zeros. In fact, it requires
it, because this:

.bss
X:
.byte 0

results in the assembler warning: "initialization in bss segment".  Annoying.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26204 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15 07:07:14 +00:00
Chris Lattner
6fa1f57c66 Fix SingleSource/Regression/C/2004-08-12-InlinerAndAllocas.c on Sparc.
The ABI specifies that there is a register save area at the bottom of the
stack, which means the actual used pointer needs to be an offset from
the subtracted value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26202 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-15 06:41:34 +00:00
Chris Lattner
94dd29216c Switch targets over to using SelectionDAG::getCALLSEQ_START to create
CALLSEQ_START nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26143 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-13 09:00:43 +00:00
Chris Lattner
ad7a3e6208 Use the auto-generated call matcher. Remove a broken impl of the frameaddr/returnaddr
intrinsics.

Autogen frameindex matcher


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26107 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-10 07:35:42 +00:00
Chris Lattner
f613fcb741 Update to new-style flags usage, simplifying the .td file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26106 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-10 06:58:25 +00:00
Chris Lattner
f262766619 Done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26091 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 20:00:19 +00:00
Chris Lattner
3ab48ed72f Enable LSR by default for SPARC: it is a clear win.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26090 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 19:59:55 +00:00
Evan Cheng
7e9b26fc73 Match getTargetNode() changes (now return SDNode* instead of SDOperand).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26085 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 07:17:49 +00:00
Chris Lattner
9413678f91 add an option to turn on LSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26080 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 05:06:36 +00:00
Chris Lattner
3029f92051 Adjust to MachineConstantPool interface change: instead of keeping a
value/alignment pair for each constant, keep a value/offset pair.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26078 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 04:46:04 +00:00
Evan Cheng
34167215a8 Change Select() from
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26067 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09 00:37:58 +00:00
Chris Lattner
c26017a4ae Fix the Sparc backend with Evan's recent tblgen changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26009 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05 08:35:50 +00:00
Evan Cheng
900c826bc7 Use SelectRoot() as the entry to any tblgen based isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25998 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05 06:51:51 +00:00
Chris Lattner
e7c839ed5a remove V8 reference
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25991 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05 06:32:59 +00:00
Chris Lattner
7c90f73a1b Rename SPARC V8 target to be the LLVM SPARC target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25985 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-05 05:50:24 +00:00
Chris Lattner
c275dfa727 Custom lower VAARG for the case when we are doing vaarg(double). In this
case, the double being loaded may not be 8-byte aligned, so we have to use
our standard bit_convert game.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25967 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04 08:31:30 +00:00
Chris Lattner
c4b612ba2a Fix a nasty typo that broke functions with big stack frames.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25966 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04 08:04:21 +00:00
Chris Lattner
329a515fe7 fix a bug in my last checkin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25965 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04 07:48:46 +00:00
Chris Lattner
0d913eaaed add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25962 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04 07:07:31 +00:00
Chris Lattner
69d39091fe Two changes:
1. Treat FMOVD as a copy instruction, to help with coallescing in V9 mode
2. When in V9 mode, insert FMOVD instead of FpMOVD instructions, as we don't
   ever rewrite FpMOVD instructions into FMOVS instructions, thus we just end
   up with commented out copies!
This should fix a bunch of failures in V9 mode on sparc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25961 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04 06:58:46 +00:00
Chris Lattner
6184f9ca5e Teach sparc to fold loads/stores into copies.
Remove the dead getRegClassForType method
minor formating changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25936 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 07:06:25 +00:00
Chris Lattner
5ccc7225db Implement isLoadFromStackSlot and isStoreToStackSlot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25932 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 06:44:54 +00:00
Chris Lattner
c8c0bb00a3 %fcc is not an alias for %fcc0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25906 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 08:02:20 +00:00
Chris Lattner
4032cf049d correct an opcode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25905 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 07:56:15 +00:00
Evan Cheng
b8973bd8f5 Allow the specification of explicit alignments for constant pool entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25855 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 22:23:14 +00:00
Chris Lattner
c03468bafa add a missing break that caused a lot of failures last night :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25851 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 17:20:06 +00:00
Chris Lattner
a34b898bc0 okay, one more
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25847 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 07:45:45 +00:00
Chris Lattner
fabec5bcb5 another note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25846 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 07:45:08 +00:00
Chris Lattner
76e7a441cf More notes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25845 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 07:43:33 +00:00
Chris Lattner
a45b4925e1 another one
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25844 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 07:38:32 +00:00
Chris Lattner
302601c343 add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25843 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 07:37:20 +00:00
Chris Lattner
af370f7c0c add conditional moves of float and double values on int/fp condition codes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25842 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 07:26:55 +00:00
Chris Lattner
7a4d2913ea treat conditional branches the same way as conditional moves (giving them
an operand that contains the condcode), making things significantly simpler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25840 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 06:56:30 +00:00
Chris Lattner
6788faa06a compactify all of the integer conditional moves into one instruction that takes
a CC as an operand.  Much smaller, much happier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25839 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 06:49:09 +00:00
Chris Lattner
97f91027e6 Add immediate forms of integer cmovs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25838 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 06:24:29 +00:00
Chris Lattner
749d6fadf8 Shrinkify
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25837 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 06:18:16 +00:00
Chris Lattner
6dc83c777d Add the full complement of conditional moves of integer registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25834 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 05:26:36 +00:00
Chris Lattner
86638b94c1 Compile this:
void %X(int %A) {
        %C = setlt int %A, 123          ; <bool> [#uses=1]
        br bool %C, label %T, label %F

T:              ; preds = %0
        call int %main( int 0 )         ; <int>:0 [#uses=0]
        ret void

F:              ; preds = %0
        ret void
}

to this:

X:
        save -96, %o6, %o6
        subcc %i0, 122, %l0
        bg .LBBX_2      ! F
        nop
...

not this:

X:
        save -96, %o6, %o6
        sethi 0, %l0
        or %g0, 1, %l1
        subcc %i0, 122, %l2
        bg .LBBX_4      !
        nop
.LBBX_3:        !
        or %g0, %l0, %l1
.LBBX_4:        !
        subcc %l1, 0, %l0
        bne .LBBX_2     ! F
        nop


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25833 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 05:05:52 +00:00
Chris Lattner
b716343851 I don't see why this optimization isn't safe, but it isn't, so disable it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25829 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 02:45:52 +00:00
Chris Lattner
2adc05cf5b Fix FP constants, and the SparcV8/2006-01-22-BitConvertLegalize.ll failure from last night
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25819 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 22:20:49 +00:00
Chris Lattner
3772bcb333 Revamp the ICC/FCC reading instructions to be parameterized in terms of the
SPARC condition codes, not in terms of the DAG condcodes.  This allows us to
write nice clean patterns for cmovs/branches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25815 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 07:43:04 +00:00
Chris Lattner
9072c05cd8 Compile:
uint %test(uint %X) {
        %Y = call uint %llvm.ctpop.i32(uint %X)
        ret uint %Y
}

to:

test:
        save -96, %o6, %o6
        sll %i0, 0, %l0
        popc %l0, %i0
        restore %g0, %g0, %g0
        retl
        nop

instead of to 40 logical ops.  Note the shift-by-zero that clears the top
part of the 64-bit V9 register.

Testcase here: CodeGen/SparcV8/ctpop.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25814 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 06:14:02 +00:00
Chris Lattner
5295de7c41 If the target has V9 instructions, this pass is a noop, don't bother
running it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25811 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 05:51:14 +00:00
Chris Lattner
b34d3fd4cf When in v9 mode, emit fabsd/fnegd/fmovd
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25810 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 05:48:37 +00:00
Chris Lattner
76afdc9a80 First step towards V9 instructions in the V8 backend, two conditional move
patterns.  This allows emission of this code:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        move %icc, %i0, %i2
        or %g0, %i2, %i0
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        be .LBBt1_2     !
        nop
.LBBt1_1:       !
        or %g0, %i2, %i0
.LBBt1_2:       !
        restore %g0, %g0, %g0
        retl
        nop

for this:

int %t1(int %a, int %b, int %c) {
        %tmp.2 = seteq int %a, %b
        %tmp3 = select bool %tmp.2, int %a, int %c
        ret int %tmp3
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25809 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 05:35:57 +00:00
Chris Lattner
6f63001214 Two changes:
1. Default to having V9 instructions, instead of just V8.
2. unless -enable-sparc-v9-insts is passed, disable V9 (for use with llcbeta)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25807 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 04:57:43 +00:00