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2419 Commits

Author SHA1 Message Date
Evan Cheng
fb43331226 A bit more tweaking 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26500 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-03 06:23:43 +00:00
Jeff Cohen
d84525480a Fix VC++ compilation errors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26498 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-03 03:25:07 +00:00
Evan Cheng
932f022b82 Move #include "llvm/CodeGen/AsmPrinter.h" to top since it's the interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26493 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-03 02:04:29 +00:00
Chris Lattner
41edaa0529 remove the read/write port/io intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26479 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-03 00:19:58 +00:00
Chris Lattner
03dd465215 Split memcpy/memset/memmove intrinsics into i32/i64 versions, resolving 
PR709, and paving the way for future progress.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26476 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-03 00:00:25 +00:00
Evan Cheng
86ec7d1d07 - Fixed some priority calculation bugs that were causing bug 478. Among them: 
a predecessor appearing more than once in the operand list was counted as
  multiple predecessor; priority1 should be updated during scheduling;
  CycleBound was updated after the node is inserted into priority queue; one
  of the tie breaking condition was flipped.
- Take into consideration of two address opcodes. If a predecessor is a def&use
  operand, it should have a higher priority.
- Scheduler should also favor floaters, i.e. nodes that do not have real
  predecessors such as MOV32ri.
- The scheduling fixes / tweaks fixed bug 478:
        .text
        .align  4
        .globl  _f
_f:
        movl 4(%esp), %eax
        movl 8(%esp), %ecx
        movl %eax, %edx
        imull %ecx, %edx
        imull %eax, %eax
        imull %ecx, %ecx
        addl %eax, %ecx
        leal (%ecx,%edx,2), %eax
        ret

  It is also a slight performance win (1% - 3%) for most tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26470 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-02 21:38:29 +00:00
Jim Laskey
6a3eb01084 Support for enumerations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26466 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 23:52:37 +00:00
Evan Cheng
246ae0dcf7 Don't print llvm constant in assmebly file. Assembler won't like comments that 
span multiple lines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26463 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 22:18:09 +00:00
Chris Lattner
1ec05d1bb4 Fix CodeGen/Generic/2006-03-01-dagcombineinfloop.ll, an infinite loop 
in the dag combiner on 176.gcc on x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26459 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 21:47:21 +00:00
Jim Laskey
9c4447aa2b Switch back to using actual dwarf tags. Simplifies code without loss to other 
debug forms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26455 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 20:39:36 +00:00
Chris Lattner
b2742f4a26 Fix a typo evan noticed 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26454 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 19:55:35 +00:00
Jim Laskey
92ae740396 Use context and not compile unit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26453 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 18:20:30 +00:00
Jim Laskey
288fe0f74d I guess I can handle large type sizes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26452 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 18:13:05 +00:00
Jim Laskey
f8913f19ae Basic array support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26451 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 17:53:02 +00:00
Chris Lattner
2466472a2b Add support for target-specific dag combines 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26443 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 04:53:38 +00:00
Chris Lattner
00ffed0468 Add interfaces for targets to provide target-specific dag combiner optimizations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26442 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 04:52:55 +00:00
Chris Lattner
5750df9d69 Add a new AddToWorkList method, start using it 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26441 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 04:03:14 +00:00
Chris Lattner
0b1a85f110 Pull shifts by a constant through multiplies (a form of reassociation), 
implementing Regression/CodeGen/X86/mul-shift-reassoc.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26440 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 03:44:24 +00:00
Evan Cheng
860771d2d8 Vector ops lowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26436 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 01:09:54 +00:00
Evan Cheng
1ab7d859cf - Added VConstant as an abstract version of ConstantVec. 
- All abstrct vector nodes must have # of elements and element type as their
first two operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26432 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 00:51:13 +00:00
Jim Laskey
45ccae5b7d Add const, volatile, restrict support. 
Add array of debug descriptor support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26428 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 20:15:07 +00:00
Chris Lattner
35a9f5a241 Compile: 
unsigned foo4(unsigned short *P) { return *P & 255; }
unsigned foo5(short *P) { return *P & 255; }

to:

_foo4:
        lbz r3,1(r3)
        blr
_foo5:
        lbz r3,1(r3)
        blr

not:

_foo4:
        lhz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr
_foo5:
        lhz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26419 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 06:49:37 +00:00
Chris Lattner
15045b6973 Fold "and (LOAD P), 255" -> zextload. This allows us to compile: 
unsigned foo3(unsigned *P) { return *P & 255; }
as:
_foo3:
        lbz r3, 3(r3)
        blr

instead of:

_foo3:
        lwz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr

and:

unsigned short foo2(float a) { return a; }

as:
_foo2:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lhz r3, -2(r1)
        blr

instead of:

_foo2:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        rlwinm r3, r2, 0, 16, 31
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26417 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 06:35:35 +00:00
Chris Lattner
71d9ebcbc1 fold (sra (sra x, c1), c2) -> (sra x, c1+c2) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26416 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 06:23:04 +00:00
Chris Lattner
22873462c9 Add support for output memory constraints. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26410 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 23:45:39 +00:00
Jim Laskey
9a777a3a8e Qualify dwarf namespace inside llvm namespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26409 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 22:37:23 +00:00
Jim Laskey
8a8e9756c8 Partial enabling of functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26404 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 20:37:42 +00:00
Jim Laskey
bd76184e67 Supporting multiple compile units. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26402 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 17:27:12 +00:00
Jim Laskey
0d086af82b Re-orging file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26401 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 12:43:29 +00:00
Chris Lattner
a6bc5a4d21 Implement bit propagation through sub nodes, this (re)implements 
PowerPC/div-2.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26392 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 01:00:42 +00:00
Chris Lattner
2d2536c9d7 remove some completed notes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26390 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 00:39:31 +00:00
Chris Lattner
81cd35586f Check RHS simplification before LHS simplification to avoid infinitely looping 
on PowerPC/small-arguments.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26389 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 00:36:27 +00:00
Chris Lattner
5f0c658aa4 Just like we use the RHS of an AND to simplify the LHS, use the LHS to 
simplify the RHS.  This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:

_test2:
        srwi r2, r3, 1
        xori r3, r2, 40961
        blr

instead of this:

_test2:
        rlwinm r2, r3, 31, 17, 31
        xori r2, r2, 40961
        rlwinm r3, r2, 0, 16, 31
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26388 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 00:22:28 +00:00
Chris Lattner
ec665151b8 Add a bunch of missed cases. Perhaps the most significant of which is that 
assertzext produces zero bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26386 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-26 23:36:02 +00:00
Evan Cheng
38b7327ec0 Print ConstantPoolSDNode offset field. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26381 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-26 08:36:57 +00:00
Evan Cheng
404cb4f9fa Added an offset field to ConstantPoolSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26371 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 09:54:52 +00:00
Chris Lattner
28bad08411 Fix a bug that Evan exposed with some changes he's making, and that was 
exposed with a fastcc problem (breaking pcompress2 on x86 with -enable-x86-fastcc).

When reloading a reused reg, make sure to invalidate the reloaded reg, and
check to see if there are any other pending uses of the same register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26369 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 02:17:31 +00:00
Chris Lattner
47cb7173ea Remove debugging printout :) 
Add a minor compile time win, no codegen change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26368 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 02:03:40 +00:00
Chris Lattner
540fec6b38 Refactor some code from being inline to being out in a new class with methods. 
This gets rid of two gotos, which is always nice, and also adds some comments.

No functionality change, this is just a refactor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26367 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 01:51:33 +00:00
Chris Lattner
dd26033002 Use the PrintAsmMemoryOperand to print addressing modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26364 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 20:21:58 +00:00
Chris Lattner
daf6bc6347 Pass all the flags to the asm printer, not just the # operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26362 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 19:50:58 +00:00
Chris Lattner
fd6d282a71 rename NumOps -> NumVals to avoid shadowing a NumOps var in an outer scope. 
Add support for addressing modes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26361 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 19:18:20 +00:00
Chris Lattner
ed18b6896e Refactor operand adding out to a new AddOperand method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26358 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 18:54:03 +00:00
Jim Laskey
6990600f93 Add pointer and reference types. Added short-term code to ignore NULL types 
(to allow llvm-gcc4 to build.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26355 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 16:46:40 +00:00
Jeff Cohen
7e88103cde Get VC++ building again. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26351 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 02:52:40 +00:00
Chris Lattner
0e43f2ba11 Implement (most of) selection of inline asm memory operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26350 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 02:13:54 +00:00
Chris Lattner
87bc3bd121 Lower C_Memory operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26346 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 01:11:24 +00:00
Chris Lattner
2b7401e28e Recognize memory operand codes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26345 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 01:10:46 +00:00
Jim Laskey
434b40b42f Added basic support for typedefs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26339 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 22:37:30 +00:00
Chris Lattner
9f6637db10 Fix an endianness problem on big-endian targets with expanded operands 
to inline asms.  Mark some methods const.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26334 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 20:06:57 +00:00
Chris Lattner
c3a9f8d31c Record all of the expanded registers in the DAG and machine instr, fixing 
several bugs in inline asm expanded operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26332 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 19:21:04 +00:00
Jim Laskey
f4afdd9f41 DwarfWriter reading basic type information from llvm-gcc4 code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26331 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 16:58:18 +00:00
Chris Lattner
ffab42263a Code cleanups, no functionality change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26328 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 06:44:17 +00:00
Chris Lattner
9b6fb5de49 This fixes a couple of problems with expansion 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26318 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 23:09:03 +00:00
Chris Lattner
b3befd41b4 Don't return registers from register classes that aren't legal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26317 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 23:00:51 +00:00
Chris Lattner
864635ad7b Change a whole bunch of code to be built around RegsForValue instead of 
a single register number.  This fully implements promotion for inline asms,
expand is close but not quite right yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26316 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 22:37:12 +00:00
Jim Laskey
0420f2aaf9 Coordinate activities with llvm-gcc4 and dwarf. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26314 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 19:02:11 +00:00
Chris Lattner
1efa40f6a4 split register class handling from explicit physreg handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26308 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 00:56:39 +00:00
Chris Lattner
0f0b7d4927 Adjust to changes in getRegForInlineAsmConstraint prototype 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26306 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 23:12:12 +00:00
Chris Lattner
4217ca8dc1 Updates to match change of getRegForInlineAsmConstraint prototype 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26305 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 23:11:00 +00:00
Chris Lattner
7d20d39009 Fix a problem Nate and Duraid reported where simplifying nodes can cause 
them to get ressurected, in which case, deleting the undead nodes is
unfriendly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26291 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-20 06:51:04 +00:00
Chris Lattner
dca7abed91 Fix a problem on itanium with memset. The value to set has been promoted to 
i64 before this code, so zero_ext doesn't work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26290 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-20 06:38:35 +00:00
Nate Begeman
003a272319 Add a fold for add that exchanges it with a constant shift if possible, so 
that the shift may be more easily folded into other operations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26286 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-18 02:43:25 +00:00
Nate Begeman
b0d04a7dea Add checks to make sure we don't create bogus extend nodes, and fix a bug 
where we were doing exactly that which was causing failures on x86 and
alpha.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26284 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-18 02:40:58 +00:00
Chris Lattner
012f241987 Fix a tricky issue in the SimplifyDemandedBits code where CombineTo wasn't 
exactly the API we wanted to call into.  This fixes the crash on crafty last
night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26269 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-17 21:58:01 +00:00
Nate Begeman
fb7217bea3 Clean up DemandedBitsAreZero interface 
Make more use of the new mask helpers in valuetypes.h
Combine (sra (srl x, c1), c1) -> sext_inreg if legal


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26263 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-17 19:54:08 +00:00
Nate Begeman
cd6a6ed0a9 Don't expand sdiv by power of two before legalize, since it will likely 
generate illegal nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26261 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-17 07:26:20 +00:00
Nate Begeman
551bf3f800 kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC 
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26255 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-17 05:43:56 +00:00
Chris Lattner
25125697fb Fix another miscompilation exposed by lencode, where we lowered i64->f32 
conversions to __floatdidf instead of __floatdisf on targets that support
f32 but not i64 (e.g. sparc).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26254 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-17 04:32:33 +00:00
Jeff Cohen
5755b17044 Fix bug noticed by VC++. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26252 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-17 02:12:18 +00:00
Evan Cheng
cffbb5174f Dumb bug. Code sees a memcpy from X+c so it increments src offset. But it 
turns out not to point to a constant string but it forgot change the offset
back.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26242 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 23:11:42 +00:00
Nate Begeman
368e18d56a Rework the SelectionDAG-based implementations of SimplifyDemandedBits 
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 21:11:51 +00:00
Evan Cheng
298ebf2bd8 If the false case is the current basic block, then this is a self loop. 
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop.  Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.

Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26231 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 08:27:56 +00:00
Chris Lattner
8f4880be66 Lowering of sdiv X, pow2 was broken, this fixes it. This patch is written 
by Nate, I'm just committing it for him.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26230 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 08:02:36 +00:00
Evan Cheng
a47876d87a Remove an unused function parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26221 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-15 22:12:35 +00:00
Evan Cheng
74d0aa9a4b Turn a memcpy from string constant into a series of stores of constant values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26219 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-15 21:59:04 +00:00
Jim Laskey
d0e58e36a9 Should not combine ISD::LOCATIONs until we have scheme to remove from 
MachineDebugInfo tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26216 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-15 19:34:44 +00:00
Evan Cheng
c080d6fb3d Lower memcpy with small constant size operand into a series of load / store 
ops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26195 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-15 01:54:51 +00:00
Evan Cheng
dea7245997 Doh again! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26188 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 23:05:54 +00:00
Jim Laskey
ae9a84b9be Using wrong DW_FORM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26184 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 22:01:57 +00:00
Evan Cheng
c4f8eee054 Keep to < 80 cols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26177 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 20:12:38 +00:00
Evan Cheng
ac940ab1bf Missed a break so memcpy cases fell through to memset. Doh. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26176 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 19:45:56 +00:00
Evan Cheng
80e89d7d6c Fixed a build breakage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26175 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 09:11:59 +00:00
Evan Cheng
a03a5dc7ce Rename maxStoresPerMemSet to maxStoresPerMemset, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26174 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 08:38:30 +00:00
Evan Cheng
1db92f947c Expand memset dst, c, size to a series of stores if size falls below the 
target specific theshold, e.g. 16 for x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26171 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 08:22:34 +00:00
Chris Lattner
06a248c9b3 now that libcalls don't suck, we can remove this hack 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26164 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 05:39:35 +00:00
Chris Lattner
4b653a0405 Fix a latent bug in the call sequence handling stuff. Some targets (e.g. x86) 
create these nodes with flag results.  Remember that we legalized them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26156 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 00:55:02 +00:00
Jim Laskey
d96185aa62 Rename to better reflect usage (current and planned.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26145 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-13 12:50:39 +00:00
Chris Lattner
6831a81599 Completely rewrite libcall insertion by the legalizer, providing the 
following handy-dandy properties:

1. it is always correct now
2. it is much faster than before
3. it is easier to understand

This implementation builds off of the recent simplifications of the
legalizer that made it single-pass instead of iterative.

This fixes JM/lencod, JM/ldecod, and
CodeGen/Generic/2006-02-12-InsertLibcall.ll (at least on PPC).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26144 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-13 09:18:02 +00:00
Jim Laskey
ce72b1755f Reorg for integration with gcc4. Old style debug info will not be passed though 
to SelIDAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26115 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-11 01:01:30 +00:00
Evan Cheng
fae9f1cb34 Added SelectionDAG::InsertISelMapEntry(). This is used to workaround the gcc 
problem where it inline the map insertion call too aggressively. Before this
change it was producing a frame size of 24k for Select_store(), now it's down
to 10k (by calling this method rather than calling the map insertion operator).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26094 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-09 22:11:03 +00:00
Evan Cheng
6ae46c4c87 More changes to reduce frame size. 
Move all getTargetNode() out of SelectionDAG.h into SelectionDAG.cpp. This
prevents them from being inlined.
Change getTargetNode() so they return SDNode * instead of SDOperand to prevent
copying. It should also help compilation speed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26083 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-09 07:15:23 +00:00
Chris Lattner
3029f92051 Adjust to MachineConstantPool interface change: instead of keeping a 
value/alignment pair for each constant, keep a value/offset pair.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26078 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-09 04:46:04 +00:00
Chris Lattner
fa77d43ba1 rename fields of constant pool entries 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26076 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-09 04:22:52 +00:00
Chris Lattner
74b7d27ab1 Simplify code, alignment must be specified now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26074 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-09 02:26:04 +00:00
Chris Lattner
948d9668a7 Make MachineConstantPool entries alignments explicit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26071 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-09 02:23:13 +00:00
Chris Lattner
d6c65ea924 Add support for assembler directives that wrap inline asm 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26065 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-08 23:41:56 +00:00
Chris Lattner
3391bcd434 Compile this: 
xori r6, r2, 1
        rlwinm r6, r6, 0, 31, 31
        cmpwi cr0, r6, 0
        bne cr0, LBB1_3 ; endif

to this:

        rlwinm r6, r2, 0, 31, 31
        cmpwi cr0, r6, 0
        beq cr0, LBB1_3 ; endif


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26047 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-08 02:13:15 +00:00
Chris Lattner
a36cb0a6b1 Add support for modifier characters to operand printers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26021 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-06 22:17:23 +00:00
Jim Laskey
f60c2414ab Goodbye nasty macro. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26019 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-06 21:54:05 +00:00
Jim Laskey
c2f0c8def7 Edit requests from Sabre. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26018 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-06 19:12:02 +00:00
Jim Laskey
86cbdba522 Changing model for the construction of debug information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26016 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-06 15:33:21 +00:00
Nate Begeman
be71442292 Back out previous commit, it isn't safe. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26006 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 08:23:00 +00:00
Nate Begeman
bab9239d05 fold c1 << (x + c2) into (c1 << c2) << x. fix a warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26005 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 08:07:24 +00:00
Nate Begeman
c031e33b68 Handle urem by shifted powers of 2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26001 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 07:36:48 +00:00
Nate Begeman
fb5e4bdded handle combining A / (B << N) into A >>u (log2(B)+N) when B is a power of 2 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26000 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 07:20:23 +00:00
Evan Cheng
4ee6211258 * Added SDNode::isOnlyUse(). 
* Fix hasNUsesOfValue(), it should be const.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25990 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 06:29:23 +00:00
Chris Lattner
519ea2abc9 make sure that global doubles are aligned to 8 bytes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25981 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 01:46:49 +00:00
Chris Lattner
4d57e0cd69 Implement the AsmPrinter::getPreferredAlignmentLog method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25978 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 01:29:18 +00:00
Jeff Cohen
f3afef3b3a Fix VC++ warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25975 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 16:20:31 +00:00
Evan Cheng
cccf1232a6 Get rid of some memory leaks identified by Valgrind 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25960 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 06:49:00 +00:00
Jeff Cohen
003cecbc9d Fix VC++ warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25957 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 03:27:39 +00:00
Chris Lattner
dc19b70d24 Add initial support for immediates. This allows us to compile this: 
int %rlwnm(int %A, int %B) {
  %C = call int asm "rlwnm $0, $1, $2, $3, $4", "=r,r,r,n,n"(int %A, int %B, int 4, int 17)
  ret int %C
}

into:

_rlwnm:
        or r2, r3, r3
        or r3, r4, r4
        rlwnm r2, r2, r3, 4, 17    ;; note the immediates :)
        or r3, r2, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25955 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 02:26:14 +00:00
Chris Lattner
3d81fee851 Initial early support for non-register operands, like immediates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25952 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 02:16:44 +00:00
Chris Lattner
eb8146b5ee implementation of some methods for inlineasm 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25951 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 02:13:02 +00:00
Chris Lattner
8666249ad6 Handle another case exposed on X86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25949 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 23:50:46 +00:00
Chris Lattner
593c95878b Fix a nasty problem on two-address machines in the following situation: 
store EAX -> [ss#0]
[ss#0] += 1
...
use(EAX)

In this case, it is not valid to rewrite this as:


store EAX -> [ss#0]
EAX += 1
store EAX -> [ss#0]  ;;; this would also delete the store above
...
use(EAX)

... because EAX is not a dead at that point.  Keep track of which registers
we are allowed to clobber, and which ones we aren't, and don't clobber the
ones we're not supposed to.  :)

This should resolve the issues on X86 last night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25948 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 23:28:46 +00:00
Chris Lattner
66cf80f226 significantly simplify the VirtRegMap code by pulling the SpillSlotsAvailable 
and PhysRegsAvailable maps out into a new AvailableSpills struct.  No
functionality change.

This paves the way for a bugfix, coming up next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 23:13:58 +00:00
Nate Begeman
244d1dccd1 Implement some feedback from sabre 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25946 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 22:38:07 +00:00
Nate Begeman
de99629e2a Add a framework for eliminating instructions that produces undemanded bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25945 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 22:24:05 +00:00
Chris Lattner
7632e2beb4 remove some #ifdef'd out code, which should properly be in the dag combiner anyway. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25941 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 20:13:59 +00:00
Chris Lattner
eefae25034 remove dead fn 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25935 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 06:51:34 +00:00
Nate Begeman
cd4d58cef1 Add common code for reassociating ops in the dag combiner 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25934 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 06:46:56 +00:00
Jeff Cohen
2ba0b02e15 Fix VC++ compilation error caused by using a std::map iterator variable to receive 
a std::multimap iterator value.  For some reason, GCC doesn't have a problem with this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25927 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 03:48:54 +00:00
Chris Lattner
109afed40b Remove move copies and dead stuff by not clobbering the result reg of a noop copy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25926 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 03:16:14 +00:00
Chris Lattner
84e752a812 Simplify some code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25924 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 03:06:49 +00:00
Chris Lattner
1118d25d39 Add code that checks for noop copies, which triggers when either: 
1. a target doesn't know how to fold load/stores into copies, or
2. the spiller rewrites the input to a copy to the same register as the dest
   instead of to the reloaded reg.

This will be moved/improved in the near future, but allows elimination of
some ancient x86 hacks.  This eliminates 92 copies from SMG2000 on X86 and
163 copies from 252.eon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25922 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 02:02:59 +00:00
Evan Cheng
9fda2f9106 Added case HANDLENODE to getOperationName(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25920 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 01:33:01 +00:00
Chris Lattner
07cf14112d Physregs may hold multiple stack slot values at the same time. Keep track 
of this, and use it to our advantage (bwahahah).  This allows us to eliminate another
60 instructions from smg2000 on PPC (probably significantly more on X86).  A common
old-new diff looks like this:

        stw r2, 3304(r1)
-       lwz r2, 3192(r1)
        stw r2, 3300(r1)
-       lwz r2, 3192(r1)
        stw r2, 3296(r1)
-       lwz r2, 3192(r1)
        stw r2, 3200(r1)
-       lwz r2, 3192(r1)
        stw r2, 3196(r1)
-       lwz r2, 3192(r1)
+       or r2, r2, r2
        stw r2, 3188(r1)

and

-       lwz r31, 604(r1)
-       lwz r13, 604(r1)
-       lwz r14, 604(r1)
-       lwz r15, 604(r1)
-       lwz r16, 604(r1)
-       lwz r30, 604(r1)
+       or r31, r30, r30
+       or r13, r30, r30
+       or r14, r30, r30
+       or r15, r30, r30
+       or r16, r30, r30
+       or r30, r30, r30

Removal of the R = R copies is coming next...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25919 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 00:36:31 +00:00
Chris Lattner
cd81639d2e Fix a deficiency in the spiller that Evan noticed. In particular, consider 
this code:

  store [stack slot #0],  R10
    = add R14, [stack slot #0]

The spiller didn't know that the store made the value of [stackslot#0] available
in R10 *IF* the store came from a copy instruction with the store folded into it.

This patch teaches VirtRegMap to look at these stores and recognize the values
they make available.  In one case Evan provided, this code:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
1)      movsd QWORD PTR [%ESP + 48], %XMM1
2)      movsd %XMM1, QWORD PTR [%ESP + 48]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

turns into:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

In this case, instruction #2 was removed because of the value made
available by #1, and inst #1 was later deleted because it is now
never used before the stack slot is redefined by #3.

This occurs here and there in a lot of code with high spilling, on PPC
most of the removed loads/stores are LSU-reject-causing loads, which is
nice.

On X86, things are much better (because it spills more), where we nuke
about 1% of the instructions from SMG2000 and several hundred from eon.

More improvements to come...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25917 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 23:29:36 +00:00
Chris Lattner
4083960147 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25913 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 20:12:32 +00:00
Chris Lattner
3603cd62ae Turn any_extend nodes into zero_extend nodes when it allows us to remove an 
and instruction.  This allows us to compile stuff like this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

to this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        ret

instead of this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

This occurs quite a bit with the X86 backend.  For example, 25 times in
lambda, 30 times in 177.mesa, 14 times in galgel,  70 times in fma3d,
25 times in vpr, several hundred times in gcc, ~45 times in crafty,
~60 times in parser, ~140 times in eon, 110 times in perlbmk, 55 on gap,
16 times on bzip2, 14 times on twolf, and 1-2 times in many other SPEC2K
programs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25901 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 07:17:31 +00:00
Chris Lattner
9a06cce0f2 Implement MaskedValueIsZero for ANY_EXTEND nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25900 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 06:43:15 +00:00
Chris Lattner
b3ddfc42af add two dag combines: 
(C1-X) == C2 --> X == C1-C2
(X+C1) == C2 --> X == C2-C1

This allows us to compile this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

into this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

not this:

_X:
        movl $14, %eax
        addl 4(%esp), %eax
        cmpl $12345, %eax
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

Testcase here: Regression/CodeGen/X86/compare-add.ll

nukage of the and coming up next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25898 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 06:36:13 +00:00
Chris Lattner
1e8791d790 make -debug output less newliney 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25895 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 00:38:08 +00:00
Chris Lattner
2223aea6ed Implement matching constraints. We can now say things like this: 
%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4)

and get:

xyz r2, r3, r4, r2

note that the r2's are pinned together.  Yaay for 2-address instructions.

2342 ----------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25893 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 00:25:23 +00:00
Chris Lattner
6609913b7d Implement smart printing of inline asm strings, handling variants and 
substituted operands.  For this testcase:

int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

we now emit:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz r2, r2, r3  ;; look here
        or r3, r2, r2
        blr

... note the substituted operands. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25886 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 22:41:11 +00:00
Nate Begeman
da06e9e665 *** empty log message *** 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25879 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 19:05:15 +00:00
Chris Lattner
4e4b576e2e Implement simple register assignment for inline asms. This allows us to compile: 
int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

into:

 (0x8906130, LLVM BB @0x8902220):
        %r2 = OR4 %r3, %r3
        %r3 = OR4 %r4, %r4
        INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3
        %r3 = OR4 %r2, %r2
        BLR

which asmprints as:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz $0, $1, $2      ;; need to print the operands now :)
        or r3, r2, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25878 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 18:59:47 +00:00
Nate Begeman
750ac1bdfa Fix some of the stuff in the PPC README file, and clean up legalization 
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25875 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 07:19:44 +00:00
Chris Lattner
a55079a5cc Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25866 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 01:29:47 +00:00
Chris Lattner
2cc2f66c25 adjust to changes in InlineAsm interface. Fix a few minor bugs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25865 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 01:28:23 +00:00
Evan Cheng
b8973bd8f5 Allow the specification of explicit alignments for constant pool entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25855 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 22:23:14 +00:00
Evan Cheng
59ad781e01 Allow custom lowering of fabs. I forgot to check in this change which 
caused several test failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25852 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 18:14:25 +00:00
Chris Lattner
19c5c4cca9 Only insert an AND when converting from BR_COND to BRCC if needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25832 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 05:04:52 +00:00
Chris Lattner
6656dd1a78 Handle physreg input/outputs. We now compile this: 
int %test_cpuid(int %op) {
        %B = alloca int
        %C = alloca int
        %D = alloca int
        %A = call int asm "cpuid", "=eax,==ebx,==ecx,==edx,eax"(int* %B, int* %C, int* %D, int %op)
        %Bv = load int* %B
        %Cv = load int* %C
        %Dv = load int* %D
        %x = add int %A, %Bv
        %y = add int %x, %Cv
        %z = add int %y, %Dv
        ret int %z
}

to this:

_test_cpuid:
        sub %ESP, 16
        mov DWORD PTR [%ESP], %EBX
        mov %EAX, DWORD PTR [%ESP + 20]
        cpuid
        mov DWORD PTR [%ESP + 8], %ECX
        mov DWORD PTR [%ESP + 12], %EBX
        mov DWORD PTR [%ESP + 4], %EDX
        mov %ECX, DWORD PTR [%ESP + 12]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 8]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 4]
        add %EAX, %ECX
        mov %EBX, DWORD PTR [%ESP]
        add %ESP, 16
        ret

... note the proper register allocation.  :)

it is unclear to me why the loads aren't folded into the adds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25827 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 02:03:41 +00:00
Chris Lattner
f2b67cff04 Print the most trivial inline asms. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25822 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-30 23:00:08 +00:00
Chris Lattner
73e142f2b6 Fix a bug in my legalizer reworking that caused the X86 backend to not get 
a chance to custom legalize setcc, which broke a bunch of C++ Codes.
Testcase here: CodeGen/X86/2006-01-30-LongSetcc.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25821 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-30 22:43:50 +00:00
Chris Lattner
0e753d617b don't insert an and node if it isn't needed here, this can prevent folding 
of lowered target nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25804 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-30 04:22:28 +00:00
Chris Lattner
c6fd6cd65c Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25803 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-30 04:09:27 +00:00