Nate Begeman
de99629e2a
Add a framework for eliminating instructions that produces undemanded bits.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 22:24:05 +00:00
Chris Lattner
1541bc3a23
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25944 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 22:06:45 +00:00
Chris Lattner
e7b06c65ba
another case Nate came up with
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25943 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 22:05:41 +00:00
Chris Lattner
f92bafa2ca
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25942 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 21:25:23 +00:00
Chris Lattner
7632e2beb4
remove some #ifdef'd out code, which should properly be in the dag combiner anyway.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25941 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 20:13:59 +00:00
Chris Lattner
4efab056e1
remove an old comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25940 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 18:59:39 +00:00
Chris Lattner
299f9bab47
Remove the X86PeepholeOptimizerPass, a truly horrible old hack that is now
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obsolete. yaay :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25939 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 18:54:24 +00:00
Chris Lattner
d77525da5e
When rewriting frame instructions, emit the appropriate small-immediate
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instruction when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25938 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 18:20:04 +00:00
Chris Lattner
6184f9ca5e
Teach sparc to fold loads/stores into copies.
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Remove the dead getRegClassForType method
minor formating changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25936 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 07:06:25 +00:00
Chris Lattner
eefae25034
remove dead fn
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25935 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 06:51:34 +00:00
Nate Begeman
cd4d58cef1
Add common code for reassociating ops in the dag combiner
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25934 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 06:46:56 +00:00
Chris Lattner
5ccc7225db
Implement isLoadFromStackSlot and isStoreToStackSlot
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25932 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 06:44:54 +00:00
Chris Lattner
33c1dab0bd
remove some target-indep and implemented notes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25930 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 06:22:11 +00:00
Chris Lattner
086c014efe
target independent notes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25929 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 06:21:43 +00:00
Nate Begeman
a63fee898b
Flesh out a couple of the items in the README
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25928 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 05:17:06 +00:00
Jeff Cohen
2ba0b02e15
Fix VC++ compilation error caused by using a std::map iterator variable to receive
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a std::multimap iterator value. For some reason, GCC doesn't have a problem with this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25927 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 03:48:54 +00:00
Chris Lattner
109afed40b
Remove move copies and dead stuff by not clobbering the result reg of a noop copy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25926 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 03:16:14 +00:00
Andrew Lenharth
133d3100ea
isStoreToStackSlot
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25925 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 03:07:37 +00:00
Chris Lattner
84e752a812
Simplify some code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25924 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 03:06:49 +00:00
Chris Lattner
018c02dd11
the X86 backend no longer needs to delete its own noop copies
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25923 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 02:59:58 +00:00
Chris Lattner
1118d25d39
Add code that checks for noop copies, which triggers when either:
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1. a target doesn't know how to fold load/stores into copies, or
2. the spiller rewrites the input to a copy to the same register as the dest
instead of to the reloaded reg.
This will be moved/improved in the near future, but allows elimination of
some ancient x86 hacks. This eliminates 92 copies from SMG2000 on X86 and
163 copies from 252.eon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25922 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 02:02:59 +00:00
Chris Lattner
d463f7f698
Add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25921 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 01:49:49 +00:00
Evan Cheng
9fda2f9106
Added case HANDLENODE to getOperationName().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25920 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 01:33:01 +00:00
Chris Lattner
07cf14112d
Physregs may hold multiple stack slot values at the same time. Keep track
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of this, and use it to our advantage (bwahahah). This allows us to eliminate another
60 instructions from smg2000 on PPC (probably significantly more on X86). A common
old-new diff looks like this:
stw r2, 3304(r1)
- lwz r2, 3192(r1)
stw r2, 3300(r1)
- lwz r2, 3192(r1)
stw r2, 3296(r1)
- lwz r2, 3192(r1)
stw r2, 3200(r1)
- lwz r2, 3192(r1)
stw r2, 3196(r1)
- lwz r2, 3192(r1)
+ or r2, r2, r2
stw r2, 3188(r1)
and
- lwz r31, 604(r1)
- lwz r13, 604(r1)
- lwz r14, 604(r1)
- lwz r15, 604(r1)
- lwz r16, 604(r1)
- lwz r30, 604(r1)
+ or r31, r30, r30
+ or r13, r30, r30
+ or r14, r30, r30
+ or r15, r30, r30
+ or r16, r30, r30
+ or r30, r30, r30
Removal of the R = R copies is coming next...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25919 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-03 00:36:31 +00:00
Chris Lattner
39b248b79e
update a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25918 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 23:50:22 +00:00
Chris Lattner
cd81639d2e
Fix a deficiency in the spiller that Evan noticed. In particular, consider
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this code:
store [stack slot #0 ], R10
= add R14, [stack slot #0 ]
The spiller didn't know that the store made the value of [stackslot#0] available
in R10 *IF* the store came from a copy instruction with the store folded into it.
This patch teaches VirtRegMap to look at these stores and recognize the values
they make available. In one case Evan provided, this code:
divsd %XMM0, %XMM1
movsd %XMM1, QWORD PTR [%ESP + 40]
1) movsd QWORD PTR [%ESP + 48], %XMM1
2) movsd %XMM1, QWORD PTR [%ESP + 48]
addsd %XMM1, %XMM0
3) movsd QWORD PTR [%ESP + 48], %XMM1
movsd QWORD PTR [%ESP + 4], %XMM0
turns into:
divsd %XMM0, %XMM1
movsd %XMM1, QWORD PTR [%ESP + 40]
addsd %XMM1, %XMM0
3) movsd QWORD PTR [%ESP + 48], %XMM1
movsd QWORD PTR [%ESP + 4], %XMM0
In this case, instruction #2 was removed because of the value made
available by #1 , and inst #1 was later deleted because it is now
never used before the stack slot is redefined by #3 .
This occurs here and there in a lot of code with high spilling, on PPC
most of the removed loads/stores are LSU-reject-causing loads, which is
nice.
On X86, things are much better (because it spills more), where we nuke
about 1% of the instructions from SMG2000 and several hundred from eon.
More improvements to come...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25917 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 23:29:36 +00:00
Nate Begeman
3b478b31e2
add 64b gpr store to the possible list of isStoreToStackSlot opcodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25916 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 21:07:50 +00:00
Chris Lattner
1c07e7286d
fix operand numbers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25915 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 20:38:12 +00:00
Chris Lattner
6524287c53
implement isStoreToStackSlot for PPC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25914 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 20:16:12 +00:00
Chris Lattner
4083960147
Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25913 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 20:12:32 +00:00
Chris Lattner
9c8dd970f7
implement isStoreToStackSlot
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25911 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 20:00:41 +00:00
Chris Lattner
1d6ecd03ea
add a method
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25910 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 19:57:16 +00:00
Chris Lattner
d395d0984f
more notes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25908 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 19:43:28 +00:00
Chris Lattner
9acddcd07e
add a note, I have no idea how important this is.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25907 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 19:16:34 +00:00
Chris Lattner
c8c0bb00a3
%fcc is not an alias for %fcc0
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25906 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 08:02:20 +00:00
Chris Lattner
4032cf049d
correct an opcode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25905 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 07:56:15 +00:00
Chris Lattner
275b8846d5
new example
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25903 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 07:37:11 +00:00
Nate Begeman
93c740bbbb
Update the README
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25902 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 07:27:56 +00:00
Chris Lattner
3603cd62ae
Turn any_extend nodes into zero_extend nodes when it allows us to remove an
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and instruction. This allows us to compile stuff like this:
bool %X(int %X) {
%Y = add int %X, 14
%Z = setne int %Y, 12345
ret bool %Z
}
to this:
_X:
cmpl $12331, 4(%esp)
setne %al
movzbl %al, %eax
ret
instead of this:
_X:
cmpl $12331, 4(%esp)
setne %al
movzbl %al, %eax
andl $1, %eax
ret
This occurs quite a bit with the X86 backend. For example, 25 times in
lambda, 30 times in 177.mesa, 14 times in galgel, 70 times in fma3d,
25 times in vpr, several hundred times in gcc, ~45 times in crafty,
~60 times in parser, ~140 times in eon, 110 times in perlbmk, 55 on gap,
16 times on bzip2, 14 times on twolf, and 1-2 times in many other SPEC2K
programs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25901 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 07:17:31 +00:00
Chris Lattner
9a06cce0f2
Implement MaskedValueIsZero for ANY_EXTEND nodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25900 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 06:43:15 +00:00
Chris Lattner
1bac941019
implemented, testcase here: test/Regression/CodeGen/X86/compare-add.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25899 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 06:36:48 +00:00
Chris Lattner
b3ddfc42af
add two dag combines:
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(C1-X) == C2 --> X == C1-C2
(X+C1) == C2 --> X == C2-C1
This allows us to compile this:
bool %X(int %X) {
%Y = add int %X, 14
%Z = setne int %Y, 12345
ret bool %Z
}
into this:
_X:
cmpl $12331, 4(%esp)
setne %al
movzbl %al, %eax
andl $1, %eax
ret
not this:
_X:
movl $14, %eax
addl 4(%esp), %eax
cmpl $12345, %eax
setne %al
movzbl %al, %eax
andl $1, %eax
ret
Testcase here: Regression/CodeGen/X86/compare-add.ll
nukage of the and coming up next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25898 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 06:36:13 +00:00
Evan Cheng
8b6e4e6e3e
Update.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25896 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 02:40:17 +00:00
Chris Lattner
1e8791d790
make -debug output less newliney
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25895 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 00:38:08 +00:00
Evan Cheng
d25e9e8294
Fix a erroneous comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25894 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 00:28:23 +00:00
Chris Lattner
2223aea6ed
Implement matching constraints. We can now say things like this:
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%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4)
and get:
xyz r2, r3, r4, r2
note that the r2's are pinned together. Yaay for 2-address instructions.
2342 ----------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25893 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 00:25:23 +00:00
Chris Lattner
2f0eec6520
validate matching constraints and remember when we see them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25892 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 00:23:53 +00:00
Chris Lattner
4d7db40ab1
more notes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25890 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 23:38:08 +00:00
Evan Cheng
bda54cdd47
Tell codegen MOVAPSrr and MOVAPDrr are copies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25889 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 23:03:16 +00:00
Evan Cheng
b1b4e86a02
Added SSE entries to foldMemoryOperand().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25888 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 23:02:25 +00:00
Evan Cheng
78376d59ab
Rearrange code to my liking. :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25887 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 23:01:57 +00:00
Chris Lattner
6609913b7d
Implement smart printing of inline asm strings, handling variants and
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substituted operands. For this testcase:
int %test(int %A, int %B) {
%C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
ret int %C
}
we now emit:
_test:
or r2, r3, r3
or r3, r4, r4
xyz r2, r2, r3 ;; look here
or r3, r2, r2
blr
... note the substituted operands. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25886 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 22:41:11 +00:00
Chris Lattner
588732748b
add a method
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25884 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 22:38:46 +00:00
Chris Lattner
3e2b94a171
another note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25883 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 21:44:48 +00:00
Andrew Lenharth
77f0885fa3
Add immediate forms of cmov and remove some cruft
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25882 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 19:37:33 +00:00
Nate Begeman
da06e9e665
*** empty log message ***
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25879 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 19:05:15 +00:00
Chris Lattner
4e4b576e2e
Implement simple register assignment for inline asms. This allows us to compile:
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int %test(int %A, int %B) {
%C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
ret int %C
}
into:
(0x8906130, LLVM BB @0x8902220):
%r2 = OR4 %r3, %r3
%r3 = OR4 %r4, %r4
INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3
%r3 = OR4 %r2, %r2
BLR
which asmprints as:
_test:
or r2, r3, r3
or r3, r4, r4
xyz $0, $1, $2 ;; need to print the operands now :)
or r3, r2, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25878 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 18:59:47 +00:00
Chris Lattner
20ea062192
Finegrainify namespacification
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25877 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 18:10:56 +00:00
Chris Lattner
5a7efc9d4f
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25876 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 17:54:23 +00:00
Nate Begeman
750ac1bdfa
Fix some of the stuff in the PPC README file, and clean up legalization
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of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25875 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 07:19:44 +00:00
Chris Lattner
1f7c6302be
add a note, I'll take care of this after nate commits his big patch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25873 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 06:40:32 +00:00
Evan Cheng
3c55c54a87
- Use xor to clear integer registers (set R, 0).
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- Added a new format for instructions where the source register is implied
and it is same as the destination register. Used for pseudo instructions
that clear the destination register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25872 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 06:13:50 +00:00
Evan Cheng
214a79423f
Remove another entry.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25871 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 06:08:48 +00:00
Jeff Cohen
09f0bd39b1
Fix VC++ compilation error.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25869 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 04:37:04 +00:00
Chris Lattner
3e1d5e5ea3
Another regression from the pattern isel
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25867 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 01:44:25 +00:00
Chris Lattner
a55079a5cc
Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25866 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 01:29:47 +00:00
Chris Lattner
2cc2f66c25
adjust to changes in InlineAsm interface. Fix a few minor bugs.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25865 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 01:28:23 +00:00
Evan Cheng
760df29881
Return's chain should be matching either the chain produced by the
...
value or the chain going into the load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25863 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 01:19:32 +00:00
Chris Lattner
0ddc18047d
another testcase.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25862 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 00:28:12 +00:00
Evan Cheng
0d084c9e4a
When folding a load into a return of SSE value, check the chain to
...
ensure the memory location has not been clobbered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25861 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 00:20:21 +00:00
Evan Cheng
4ccf4c0d0b
Remove an item. It's done.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25860 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 00:15:53 +00:00
Evan Cheng
0e8671bf4a
Be smarter about whether to store the SSE return value in memory. If
...
it is already available in memory, do a fld directly from there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25859 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 23:19:54 +00:00
Chris Lattner
bb1d528aa6
turning these into 'adds' would require extra copies
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25858 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 22:59:46 +00:00
Evan Cheng
223547ab31
- Allow XMM load (for scalar use) to be folded into ANDP* and XORP*.
...
- Use XORP* to implement fneg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25857 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 22:28:30 +00:00
Evan Cheng
598463fde4
Remove entries on fabs and fneg. These are done.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25856 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 22:26:21 +00:00
Evan Cheng
b8973bd8f5
Allow the specification of explicit alignments for constant pool entries.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25855 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 22:23:14 +00:00
Chris Lattner
259e97cc72
* Fix 80-column violations
...
* Rename hasSSE -> hasSSE1 to avoid my continual confusion with 'has any SSE'.
* Add inline asm constraint specification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25854 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 19:43:35 +00:00
Chris Lattner
ddc787dfdc
add info about the inline asm register constraints for PPC
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25853 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 19:20:21 +00:00
Evan Cheng
59ad781e01
Allow custom lowering of fabs. I forgot to check in this change which
...
caused several test failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25852 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 18:14:25 +00:00
Chris Lattner
c03468bafa
add a missing break that caused a lot of failures last night :(
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25851 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 17:20:06 +00:00
Nate Begeman
4477590ef6
Codegen
...
bool %test(int %X) {
%Y = seteq int %X, 13
ret bool %Y
}
as
_test:
addi r2, r3, -13
cntlzw r2, r2
srwi r3, r2, 5
blr
rather than
_test:
cmpwi cr7, r3, 13
mfcr r2
rlwinm r3, r2, 31, 31, 31
blr
This has very little effect on most code, but speeds up analyzer 23% and
mason 11%
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25848 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 08:17:29 +00:00
Chris Lattner
a34b898bc0
okay, one more
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25847 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 07:45:45 +00:00
Chris Lattner
fabec5bcb5
another note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25846 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 07:45:08 +00:00
Chris Lattner
76e7a441cf
More notes
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25845 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 07:43:33 +00:00
Chris Lattner
a45b4925e1
another one
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25844 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 07:38:32 +00:00
Chris Lattner
302601c343
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25843 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 07:37:20 +00:00
Chris Lattner
af370f7c0c
add conditional moves of float and double values on int/fp condition codes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25842 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 07:26:55 +00:00
Chris Lattner
83e64baaef
example nate pointed out
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25841 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 07:16:34 +00:00
Chris Lattner
7a4d2913ea
treat conditional branches the same way as conditional moves (giving them
...
an operand that contains the condcode), making things significantly simpler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25840 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 06:56:30 +00:00
Chris Lattner
6788faa06a
compactify all of the integer conditional moves into one instruction that takes
...
a CC as an operand. Much smaller, much happier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25839 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 06:49:09 +00:00
Chris Lattner
97f91027e6
Add immediate forms of integer cmovs
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25838 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 06:24:29 +00:00
Chris Lattner
749d6fadf8
Shrinkify
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25837 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 06:18:16 +00:00
Chris Lattner
6dc83c777d
Add the full complement of conditional moves of integer registers.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25834 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 05:26:36 +00:00
Chris Lattner
86638b94c1
Compile this:
...
void %X(int %A) {
%C = setlt int %A, 123 ; <bool> [#uses=1]
br bool %C, label %T, label %F
T: ; preds = %0
call int %main( int 0 ) ; <int>:0 [#uses=0]
ret void
F: ; preds = %0
ret void
}
to this:
X:
save -96, %o6, %o6
subcc %i0, 122, %l0
bg .LBBX_2 ! F
nop
...
not this:
X:
save -96, %o6, %o6
sethi 0, %l0
or %g0, 1, %l1
subcc %i0, 122, %l2
bg .LBBX_4 !
nop
.LBBX_3: !
or %g0, %l0, %l1
.LBBX_4: !
subcc %l1, 0, %l0
bne .LBBX_2 ! F
nop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25833 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 05:05:52 +00:00
Chris Lattner
19c5c4cca9
Only insert an AND when converting from BR_COND to BRCC if needed.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25832 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 05:04:52 +00:00
Evan Cheng
ef6ffb17c7
Added custom lowering of fabs
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25831 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 03:14:29 +00:00
Chris Lattner
56b6964473
add the 'lucas' optimization
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25830 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 02:55:28 +00:00
Chris Lattner
b716343851
I don't see why this optimization isn't safe, but it isn't, so disable it
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25829 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 02:45:52 +00:00
Chris Lattner
8e38ae60c7
Another high-prio selection performance bug
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25828 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 02:10:06 +00:00
Chris Lattner
6656dd1a78
Handle physreg input/outputs. We now compile this:
...
int %test_cpuid(int %op) {
%B = alloca int
%C = alloca int
%D = alloca int
%A = call int asm "cpuid", "=eax,==ebx,==ecx,==edx,eax"(int* %B, int* %C, int* %D, int %op)
%Bv = load int* %B
%Cv = load int* %C
%Dv = load int* %D
%x = add int %A, %Bv
%y = add int %x, %Cv
%z = add int %y, %Dv
ret int %z
}
to this:
_test_cpuid:
sub %ESP, 16
mov DWORD PTR [%ESP], %EBX
mov %EAX, DWORD PTR [%ESP + 20]
cpuid
mov DWORD PTR [%ESP + 8], %ECX
mov DWORD PTR [%ESP + 12], %EBX
mov DWORD PTR [%ESP + 4], %EDX
mov %ECX, DWORD PTR [%ESP + 12]
add %EAX, %ECX
mov %ECX, DWORD PTR [%ESP + 8]
add %EAX, %ECX
mov %ECX, DWORD PTR [%ESP + 4]
add %EAX, %ECX
mov %EBX, DWORD PTR [%ESP]
add %ESP, 16
ret
... note the proper register allocation. :)
it is unclear to me why the loads aren't folded into the adds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25827 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 02:03:41 +00:00
Chris Lattner
594086d494
more mumbling
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25826 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 00:45:37 +00:00
Chris Lattner
bdde465bcf
add some notes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25825 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 00:20:38 +00:00
Evan Cheng
6dfa999c01
Don't generate complex sequence for SETOLE, SETOLT, SETULT, and SETUGT. Flip
...
the order of the compare operands and generate SETOGT, SETOGE, SETUGE, and
SETULE instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25824 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 23:41:35 +00:00
Chris Lattner
f2b67cff04
Print the most trivial inline asms.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25822 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 23:00:08 +00:00
Chris Lattner
73e142f2b6
Fix a bug in my legalizer reworking that caused the X86 backend to not get
...
a chance to custom legalize setcc, which broke a bunch of C++ Codes.
Testcase here: CodeGen/X86/2006-01-30-LongSetcc.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25821 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 22:43:50 +00:00
Chris Lattner
2adc05cf5b
Fix FP constants, and the SparcV8/2006-01-22-BitConvertLegalize.ll failure from last night
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25819 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 22:20:49 +00:00
Evan Cheng
02568ff48d
i64 -> f32, f32 -> i64 and some clean up.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25818 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 22:13:22 +00:00
Evan Cheng
6dab05363f
Always use FP stack instructions to perform i64 to f64 as well as f64 to i64
...
conversions. SSE does not have instructions to handle these tasks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25817 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 08:02:57 +00:00
Chris Lattner
3772bcb333
Revamp the ICC/FCC reading instructions to be parameterized in terms of the
...
SPARC condition codes, not in terms of the DAG condcodes. This allows us to
write nice clean patterns for cmovs/branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25815 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 07:43:04 +00:00
Chris Lattner
9072c05cd8
Compile:
...
uint %test(uint %X) {
%Y = call uint %llvm.ctpop.i32(uint %X)
ret uint %Y
}
to:
test:
save -96, %o6, %o6
sll %i0, 0, %l0
popc %l0, %i0
restore %g0, %g0, %g0
retl
nop
instead of to 40 logical ops. Note the shift-by-zero that clears the top
part of the 64-bit V9 register.
Testcase here: CodeGen/SparcV8/ctpop.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25814 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 06:14:02 +00:00
Chris Lattner
5295de7c41
If the target has V9 instructions, this pass is a noop, don't bother
...
running it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25811 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 05:51:14 +00:00
Chris Lattner
b34d3fd4cf
When in v9 mode, emit fabsd/fnegd/fmovd
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25810 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 05:48:37 +00:00
Chris Lattner
76afdc9a80
First step towards V9 instructions in the V8 backend, two conditional move
...
patterns. This allows emission of this code:
t1:
save -96, %o6, %o6
subcc %i0, %i1, %l0
move %icc, %i0, %i2
or %g0, %i2, %i0
restore %g0, %g0, %g0
retl
nop
instead of this:
t1:
save -96, %o6, %o6
subcc %i0, %i1, %l0
be .LBBt1_2 !
nop
.LBBt1_1: !
or %g0, %i2, %i0
.LBBt1_2: !
restore %g0, %g0, %g0
retl
nop
for this:
int %t1(int %a, int %b, int %c) {
%tmp.2 = seteq int %a, %b
%tmp3 = select bool %tmp.2, int %a, int %c
ret int %tmp3
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25809 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 05:35:57 +00:00
Chris Lattner
6f63001214
Two changes:
...
1. Default to having V9 instructions, instead of just V8.
2. unless -enable-sparc-v9-insts is passed, disable V9 (for use with llcbeta)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25807 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 04:57:43 +00:00
Chris Lattner
dea9528f7f
When lowering SELECT_CC, see if the input is a lowered SETCC. If so, fold
...
the two operations together. This allows us to compile this:
void %two(int %a, int* %b) {
%tmp.2 = seteq int %a, 0
%tmp.0.0 = select bool %tmp.2, int 10, int 20
store int %tmp.0.0, int* %b
ret void
}
into:
two:
save -96, %o6, %o6
or %g0, 20, %l0
or %g0, 10, %l1
subcc %i0, 0, %l2
be .LBBtwo_2 ! entry
nop
.LBBtwo_1: ! entry
or %g0, %l0, %l1
.LBBtwo_2: ! entry
st %l1, [%i1]
restore %g0, %g0, %g0
retl
nop
instead of:
two:
save -96, %o6, %o6
sethi 0, %l0
or %g0, 1, %l1
or %g0, 20, %l2
or %g0, 10, %l3
subcc %i0, 0, %l4
be .LBBtwo_2 ! entry
nop
.LBBtwo_1: ! entry
or %g0, %l0, %l1
.LBBtwo_2: ! entry
subcc %l1, 0, %l0
bne .LBBtwo_4 ! entry
nop
.LBBtwo_3: ! entry
or %g0, %l2, %l3
.LBBtwo_4: ! entry
st %l3, [%i1]
restore %g0, %g0, %g0
retl
nop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25806 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 04:34:44 +00:00
Jeff Cohen
85046901b8
Add AddSymbol() method to DynamicLibrary to work around Windows limitation
...
of being unable to search for symbols in an EXE. It will also allow other
existing hacks to be improved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25805 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 04:33:51 +00:00
Chris Lattner
0e753d617b
don't insert an and node if it isn't needed here, this can prevent folding
...
of lowered target nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25804 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 04:22:28 +00:00
Chris Lattner
c6fd6cd65c
Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25803 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 04:09:27 +00:00
Chris Lattner
4a397e0e94
Implement isMaskedValueZeroForTargetNode for the various v8 selectcc nodes,
...
allowing redundant and's to be eliminated by the dag combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25800 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 03:51:45 +00:00
Chris Lattner
5c413bc451
pass the address of MaskedValueIsZero into isMaskedValueZeroForTargetNode,
...
to permit recursion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25799 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 03:49:37 +00:00
Chris Lattner
87c890a9c2
adjust prototype
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25798 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 03:49:07 +00:00
Jeff Cohen
715bd76487
Fix indentation.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25795 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 22:02:52 +00:00
Chris Lattner
6862dbc446
Fix RET of promoted values on targets that custom expand RET to a target node.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25794 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 21:02:23 +00:00
Chris Lattner
37dd6f1b79
Functions that are lazily streamed in from the .bc file are *not* external.
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This fixes llvm-test/SingleSource/UnitTests/2006-01-29-SimpleIndirectCall.c
and PR704
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25793 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 20:49:17 +00:00
Chris Lattner
c7097afe51
add another note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25789 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 09:46:06 +00:00
Chris Lattner
5164a313e0
add some performance notes from looking at sgefa
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25788 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 09:42:20 +00:00
Chris Lattner
6a28456e18
add a high-priority SSE issue from sgefa
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25787 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 09:14:47 +00:00
Chris Lattner
b638cd89db
add a missed optimization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25786 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 09:08:15 +00:00
Chris Lattner
68a17febc7
cleanups to the ValueTypeActions interface
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25785 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 08:42:06 +00:00
Chris Lattner
d9b55dd21a
Now that OpActions is big enough, we can specify actions for vector types
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25784 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 08:41:37 +00:00
Chris Lattner
3e6e8cc26b
clean up interface to ValueTypeActions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25783 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 08:41:12 +00:00
Chris Lattner
70814bc384
Remove some special case hacks for CALLSEQ_*, using UpdateNodeOperands
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instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25780 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 07:58:15 +00:00
Chris Lattner
3fd327fe7f
disable this for now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25778 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 07:31:33 +00:00
Reid Spencer
2ce5b263ba
Add a note about lowering llvm.memset, llvm.memcpy, and llvm.memmove to a
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few stores under certain conditions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25777 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:48:25 +00:00
Chris Lattner
0fc9c26e7d
remove now-dead code, the legalizer takes care of this for us
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25776 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:45:31 +00:00
Chris Lattner
44d9b9bb86
The FP stack doesn't support UNDEF, ask the legalizer to legalize it
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instead of lying and saying we have it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25775 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:44:22 +00:00
Chris Lattner
8ca05e0c30
Allow custom expansion of ConstantVec nodes. PPC will use this in the future.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25774 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:34:16 +00:00
Chris Lattner
ec4a0c7c6b
Request expansion of ConstantVec nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25773 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:32:58 +00:00
Chris Lattner
3181a771ff
Legalize ConstantFP into TargetConstantFP when the target allows. Implement
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custom expansion of ConstantFP nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25772 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:26:56 +00:00
Chris Lattner
a54aa94197
Targets all now request ConstantFP to be legalized into TargetConstantFP.
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'fpimm' in .td files is now TargetConstantFP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25771 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:26:08 +00:00
Chris Lattner
08a90229ae
Update alpha to reflect recent constantfp legalize changes. It's not clear
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why all this code isn't autogenerated. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25770 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:25:22 +00:00
Chris Lattner
03d5e877fd
eliminate uses of SelectionDAG::getBR2Way_CC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25767 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:00:45 +00:00
Chris Lattner
c7e1852d63
cmovle != cmovlt
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25761 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 03:47:30 +00:00
Jeff Cohen
b8643ac476
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25760 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 03:45:35 +00:00
Jeff Cohen
c4013d6772
Flesh out AMD family/models.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25755 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 20:30:18 +00:00
Jeff Cohen
216d281d0a
Correctly determine CPU vendor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25754 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 19:48:34 +00:00
Jeff Cohen
a349640b7f
Use union instead of reinterpret_cast.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25751 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:47:32 +00:00
Jeff Cohen
7617717496
Fix recognition of Intel CPUs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25750 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:38:20 +00:00
Chris Lattner
c2fad16155
Is64Bit reflects the capability of the chip, not an aspect of the target os
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25749 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:23:48 +00:00
Chris Lattner
dabbc98396
Fix a bunch of JIT failures with the new isel
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25748 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:19:37 +00:00