6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-21 00:32:23 +00:00
Code Issues Projects Releases Wiki Activity
19,645 Commits 39 Branches 0 Tags 277 MiB
8212203ab9
Commit Graph

681 Commits

Author SHA1 Message Date
Chris Lattner
0b1e641b82 Now that the simple isels are dead, so is this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22913 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 18:30:39 +00:00
Nate Begeman
27d53ba6dd Fix a bug where we were passing the wrong number of arguments to an 
instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22901 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 03:42:28 +00:00
Nate Begeman
02b88a4586 ISD::OR, and it's accompanying SelectBitfieldInsert 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22889 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:38:14 +00:00
Nate Begeman
73bfa71524 Remove the X86 and PowerPC Simple instruction selectors; their time has 
passed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22886 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 23:53:15 +00:00
Nate Begeman
c15ed447f4 Add shifts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22884 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 23:38:00 +00:00
Chris Lattner
45fcb8f410 Fix operand numbers by marking variable arity nodes as such and by fixing 
the operand lists of a few other nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22883 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 23:25:33 +00:00
Chris Lattner
3f852b45fc MFLR doesn't take an operand, the LR register is implicit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22882 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 23:24:50 +00:00
Chris Lattner
0bc04231c0 Move this to the emitter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22877 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 20:08:53 +00:00
Jim Laskey
5b5f0b7fd5 More optimal solution for loading constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22870 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 18:58:23 +00:00
Chris Lattner
d607c12e8e After selecting the instructions for a basic block, emit the instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22869 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 18:46:06 +00:00
Chris Lattner
f5fac3b4a6 remove some unused stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22866 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 18:34:00 +00:00
Nate Begeman
58dfb08319 Fix int foo() { return 65535; } by using the top 16 bits of the constant 
as the argument to LIS rather than the result of HA16(constant).

The DAG->DAG ISel was already doing the right thing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22865 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 18:14:49 +00:00
Nate Begeman
a694047813 Improve ISD::Constant codegen. 
Now for int foo() { return -1; } we generate:
_foo:
        li r3, -1
        blr

instead of
_foo:
        lis r2, -1
        ori r3, r2, 65535
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22864 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 18:01:39 +00:00
Chris Lattner
0c09a411e0 replace switch stmt with an assert, generate li 0 instead of lis 0 for 0, 
to make the code follow people's expectations better.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22861 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 17:16:52 +00:00
Jim Laskey
3285aadce9 Handle loading of 0x????0000 constants with a single instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22858 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 15:52:30 +00:00
Nate Begeman
cffc32b6e2 Add support for ISD::AND, and its various optimized forms. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22857 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 07:30:46 +00:00
Nate Begeman
131a880520 Maintain consistency in negating things 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22855 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 05:44:50 +00:00
Nate Begeman
0f3257a330 Implement XOR, remove a broken sign_extend_inreg case 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22854 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 05:00:13 +00:00
Nate Begeman
305a1c75cf Add a bunch more simple nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22851 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 03:04:18 +00:00
Nate Begeman
6a7d61179c Add a couple more nodes that are easy to handle 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22850 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 00:53:47 +00:00
Nate Begeman
b5a0668d43 Be fruitful and multiply! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22849 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 00:21:41 +00:00
Jim Laskey
b454cfd453 Better version of isIntImmediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22848 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-18 00:15:15 +00:00
Nate Begeman
26653500bb Teach the DAG->DAG ISel about FNEG, and how it can be used to invert 
several of the PowerPC opcodes that come in both negated and non-negated
forms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22845 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 23:46:35 +00:00
Chris Lattner
8482dd894d add a beta option for turning on dag->dag isel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22837 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 19:33:30 +00:00
Chris Lattner
a5a91b1026 initial hack at a dag->dag instruction selector. This is obviously woefully 
incomplete, but it is a start.  It handles basic argument/retval stuff, immediates,
add and sub.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22836 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 19:33:03 +00:00
Chris Lattner
d1c4626e14 add prototype, remove dead proto 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22835 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 19:32:03 +00:00
Chris Lattner
6d9aed4f8f Fix a few small typos I noticed when converting this over to the DAG->DAG 
selector.  Also, there is no difference between addSImm and addImm, so just
use addImm, folding some branches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22819 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 01:25:14 +00:00
Jim Laskey
a033b4d8eb Removed UINT_TO_FP and SINT_TO_FP from ISel outright. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22818 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 01:14:38 +00:00
Jim Laskey
361ca5c927 Remove ISel code generation for UINT_TO_FP and SINT_TO_FP. Now asserts if 
marked as legal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22816 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 00:41:40 +00:00
Jim Laskey
ad23c9d4f2 Make UINT_TO_FP and SINT_TO_FP use generic expansion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22815 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 00:40:22 +00:00
Nate Begeman
456f1e890c Implement a couple improvements: 
Remove dead code in ISD::Constant handling
Add support for add long, imm16

We now codegen 'long long foo(long long a) { return ++a; }'
as:
addic r4, r4, 1
addze r3, r3
blr

instead of:
li r2, 1
li r5, 0
addc r2, r4, r2
adde r3, r3, r5
blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22811 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-17 00:20:08 +00:00
Chris Lattner
a8cd01524f updates for changes in nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22808 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-16 21:58:15 +00:00
Nate Begeman
7cbd525ba8 Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty 
fixme from the PowerPC backend.  Emit slightly better code for legalizing
select_cc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22805 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-16 19:49:35 +00:00
Chris Lattner
7c5a3d390a Pull the LLVM -> DAG lowering code out of the pattern selector so that it 
can be shared with the DAG->DAG selector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22799 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-16 17:14:42 +00:00
Chris Lattner
b0096bd19d Turn loop strength reduction on by default. 
Only run createLowerConstantExpressionsPass for the simple isel.  The DAG
isel has no need for it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22794 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-15 23:47:04 +00:00
Jim Laskey
ea0617a023 Broke 80 column rule. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22792 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-15 17:35:26 +00:00
Jim Laskey
30679e691d Changed code gen for int to f32 to use rounding. This makes FP results 
consistent with gcc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22791 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-15 17:14:19 +00:00
Nate Begeman
2d56e72f09 Fix last night's PPC32 regressions by 
1. Not selecting the false value of a select_cc in the false arm, which
   isn't legal for nested selects.
2. Actually returning the node we created and Legalized in the FP_TO_UINT
   Expander.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22789 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-14 18:38:32 +00:00
Nate Begeman
5a01481585 Make FP_TO_UINT Illegal. This allows us to generate significantly better 
codegen for FP_TO_UINT by using the legalizer's SELECT variant.

Implement a codegen improvement for SELECT_CC, selecting the false node in
the MBB that feeds the phi node.  This allows us to codegen:
void foo(int *a, int b, int c) { int d = (a < b) ? 5 : 9; *a = d; }
as:
_foo:
        li r2, 5
        cmpw cr0, r4, r3
        bgt .LBB_foo_2  ; entry
.LBB_foo_1:     ; entry
        li r2, 9
.LBB_foo_2:     ; entry
        stw r2, 0(r3)
        blr

insted of:
_foo:
        li r2, 5
        li r5, 9
        cmpw cr0, r4, r3
        bgt .LBB_foo_2  ; entry
.LBB_foo_1:     ; entry
        or r2, r5, r5
.LBB_foo_2:     ; entry
        stw r2, 0(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22784 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-14 01:17:16 +00:00
Nate Begeman
8f331325a2 Remove support for 64b PPC, it's been broken for a long time. It'll be 
back once a DAG->DAG ISel exists.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22778 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-13 05:59:16 +00:00
Jim Laskey
cf083e312c Fix for 2005-08-12-rlwimi-crash.ll. Make allowance for masks being shifted to 
zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22773 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-12 23:52:46 +00:00
Jim Laskey
847c3a976b 1. This changes handles the cases of (~x)&y and x&(~y) yielding ANDC, and 
(~x)|y and x|(~y) yielding ORC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22771 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-12 23:38:02 +00:00
Jim Laskey
191cf943e6 1. Added the function isOpcWithIntImmediate to simplify testing of operand with 
specified opcode and an integer constant right operand.

2. Modified ISD::SHL, ISD::SRL, ISD::SRA to use rlwinm when applied after a mask.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22761 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-11 21:59:23 +00:00
Chris Lattner
2b48bc6f95 Tidied up the use of dyn_cast<ConstantSDNode> by using isIntImmediate more. 
Patch by Jim Laskey.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22760 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-11 17:56:50 +00:00
Chris Lattner
54abfc5ee4 Use a more efficient method of creating integer and float virtual registers 
(avoids an extra level of indirection in MakeReg).

  defined MakeIntReg using RegMap->createVirtualRegister(PPC32::GPRCRegisterClass)
  defined MakeFPReg using RegMap->createVirtualRegister(PPC32::FPRCRegisterClass)

  s/MakeReg(MVT::i32)/MakeIntReg/
  s/MakeReg(MVT::f64)/MakeFPReg/

Patch by Jim Laskey!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22759 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-11 17:15:31 +00:00
Nate Begeman
c24d484b78 Make SELECT illegal on PPC32, switch to using SELECT_CC, which more closely 
reflects what the hardware is capable of.  This significantly simplifies
the CC handling logic throughout the ISel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22756 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-10 20:52:09 +00:00
Chris Lattner
b4138c475e Changes for PPC32ISelPattern.cpp 
1. Clean up how SelectIntImmediateExpr handles use counts.
2. "Subtract from" was not clearing hi 16 bits.

Patch by Jim Laskey


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22754 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-10 18:11:33 +00:00
Chris Lattner
df706e3f0c Changed the XOR case to use the isOprNot predicate. 
Patch by Jim Laskey!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22750 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-10 16:35:46 +00:00
Chris Lattner
0d7d99fd44 1. Refactored handling of integer immediate values for add, or, xor and sub. 
New routine: ISel::SelectIntImmediateExpr
  2. Now checking use counts of large constants.  If use count is > 2 then drop
  thru so that the constant gets loaded into a register.
  Source:

int %test1(int %a) {
entry:
       %tmp.1 = add int %a,      123456789      ; <int> [#uses=1]
       %tmp.2 = or  int %tmp.1,  123456789      ; <int> [#uses=1]
       %tmp.3 = xor int %tmp.2,  123456789      ; <int> [#uses=1]
       %tmp.4 = sub int %tmp.3, -123456789      ; <int> [#uses=1]
       ret int %tmp.4
}

Did Emit:

       .machine ppc970


       .text
       .align  2
       .globl  _test1
_test1:
.LBB_test1_0:   ; entry
       addi r2, r3, -13035
       addis r2, r2, 1884
       ori r2, r2, 52501
       oris r2, r2, 1883
       xori r2, r2, 52501
       xoris r2, r2, 1883
       addi r2, r2, 52501
       addis r3, r2, 1883
       blr


Now Emits:

       .machine ppc970


       .text
       .align  2
       .globl  _test1
_test1:
.LBB_test1_0:   ; entry
       lis r2, 1883
       ori r2, r2, 52501
       add r3, r3, r2
       or r3, r3, r2
       xor r3, r3, r2
       add r3, r3, r2
       blr

Patch by Jim Laskey!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22749 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-10 16:34:52 +00:00
Chris Lattner
979a21e766 Fix a bug compiling: select (i32 < i32), f32, f32 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22747 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-10 03:40:09 +00:00