Evan Cheng
97d0e0e314
ADD / SUB / SMUL / UMUL with overflow second result top bits must be zero.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63509 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02 09:15:04 +00:00
Evan Cheng
961d6d4ac0
Add comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02 08:19:07 +00:00
Evan Cheng
67ad9db15b
Teach LowerBRCOND to recognize (xor (setcc x), 1). The xor inverts the condition. It's normally transformed by the dag combiner, unless the condition is set by a arithmetic op with overflow.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63505 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02 08:07:36 +00:00
Torok Edwin
3f142c36ad
Implement -mno-sse: if SSE is disabled on x86-64, don't store XMM on stack for
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var-args, and don't allow FP return values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-01 18:15:56 +00:00
Duncan Sands
b0d5cdd52e
Fix PR3453 and probably a bunch of other potential
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crashes or wrong code with codegen of large integers:
eliminate the legacy getIntegerVTBitMask and
getIntegerVTSignBit methods, which returned their
value as a uint64_t, so couldn't handle huge types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-01 18:06:53 +00:00
Dale Johannesen
7d2ad624fa
Make LowerCallTo and LowerArguments take a DebugLoc
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argument. Adjust all callers and overloaded versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63444 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30 23:10:59 +00:00
Bill Wendling
7581bfa275
Get rid of the non-DebugLoc-ified getNOT() method.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63442 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30 23:03:19 +00:00
Mon P Wang
7ad9b51278
When PerformBuildVectorCombine, avoid creating a X86ISD::VZEXT_LOAD of
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an illegal type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63380 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30 07:07:40 +00:00
Dan Gohman
e5af2d3a22
Make x86's BT instruction matching more thorough, and add some
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dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-29 01:59:02 +00:00
Mon P Wang
e91a000889
Fixed lowering of v816 shuffles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63252 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 23:11:14 +00:00
Duncan Sands
1465d61bdd
Rename getAnalysisToUpdate to getAnalysisIfAvailable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63198 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 13:14:17 +00:00
Evan Cheng
1632782fe9
The memory alignment requirement on some of the mov{h|l}p{d|s} patterns are 16-byte. That is overly strict. These instructions read / write f64 memory locations without alignment requirement.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63195 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 08:35:02 +00:00
Mon P Wang
3becd093cc
Add shuffle splat pattern for x86 sse shifts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63193 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 08:12:05 +00:00
Dan Gohman
d3f184906d
Reformat the allocation-order arrays to a more conventional style.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63121 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 19:25:38 +00:00
Dan Gohman
c03e9a1040
Simplify findNonImmUse; return the result using the return value
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instead of via a by-reference argument. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63118 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 19:04:30 +00:00
Evan Cheng
6a86bd71df
Implement multiple with overflow by 2 with an add instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63090 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 03:30:42 +00:00
Dan Gohman
e8ecf4876a
Eliminate unnecessary operands-list traversals.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63088 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 02:37:43 +00:00
Dan Gohman
336b636dd7
Fix the Red Zone calculation for functions with frame pointers.
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Don't use the Red Zone when dynamic stack realignment is needed.
This could be implemented, but most x86-64 ABIs don't require
dynamic stack realignment so it isn't urgent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63074 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-27 00:40:06 +00:00
Dan Gohman
92f4f16a19
Implement Red Zone utilization on x86-64. This is currently
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disabled by default; I'll enable it when I hook it up with
the llvm-gcc flag which controls it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63056 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 22:22:31 +00:00
Evan Cheng
5b2e5893c6
Enhance logic in X86DAGToDAGISel::PreprocessForRMW which move load inside callseq_start to allow it to be folded into a call. It was not considering the cases where a token factor is between the load and the callseq_start.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 18:43:34 +00:00
Dan Gohman
e7852d0144
Take the next steps in making SDUse more consistent with LLVM Use, and
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tidy up SDUse and related code.
- Replace the operator= member functions with a set method, like
LLVM Use has, and variants setInitial and setNode, which take
care up updating use lists, like LLVM Use's does. This simplifies
code that calls these functions.
- getSDValue() is renamed to get(), as in LLVM Use, though most
places can either use the implicit conversion to SDValue or the
convenience functions instead.
- Fix some more node vs. value terminology issues.
Also, eliminate the one remaining use of SDOperandPtr, and
SDOperandPtr itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62995 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 04:35:06 +00:00
Nate Begeman
c2fd67f697
De-identifying per sabre review
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 03:15:31 +00:00
Nate Begeman
51a0437b16
Map address space 256 to gs; similar mappings could be supported for the
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other x86 segments. address space 0 is stack/default, 1-255 are reserved for
client use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62980 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 01:24:32 +00:00
Nate Begeman
740ab03f12
Support pattern matching various x86 sse shifts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-26 00:52:55 +00:00
Torok Edwin
afb564c697
should have removed the + when manually applying a patch!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62973 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25 20:29:34 +00:00
Torok Edwin
c8ad2d2abf
revert this patch for now, because Codegen does still want to generate SSE code,
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for example in the case of va-args. XFAIL associated tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62972 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25 20:21:24 +00:00
Torok Edwin
7f1d5252c7
If user explicitly asks not to use SSE, don't force it. This fixes LLVM part of PR3402.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62967 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-25 17:58:56 +00:00
Nate Begeman
9b99485074
Fix an indent and a typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62940 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-24 22:12:48 +00:00
Chris Lattner
91387de8ce
hopefully address PR3379 by making the P modifier work in x86 inline asm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62887 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-23 22:33:40 +00:00
Bob Wilson
4c24546238
Add SelectionDAG::getNOT method to construct bitwise NOT operations,
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corresponding to the "not" and "vnot" PatFrags. Use the new method
in some places where it seems appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-22 17:39:32 +00:00
Evan Cheng
536ab130ec
Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62762 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-22 09:10:11 +00:00
Dan Gohman
dbf5f2557e
Recognize inline asm for bswap on x86-64 GLIBC. This allows it
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to be supported in the JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62730 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 23:40:54 +00:00
Evan Cheng
a095c972cc
Also favors NOT64r.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62710 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 19:45:31 +00:00
Dan Gohman
1ef4d8f7ee
Fix a recent regression. ClrOpcode is not set for i8; for i8, if
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we want to clear %ah to zero before a division, just use a
zero-extending mov to %al. This fixes PR3366.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62691 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 14:50:16 +00:00
Evan Cheng
aaf414c92c
Favors generating "not" over "xor -1". For example.
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unsigned test(unsigned a) {
return ~a;
}
llvm used to generate:
movl $4294967295, %eax
xorl 4(%esp), %eax
Now it generates:
movl 4(%esp), %eax
notl %eax
It's 3 bytes shorter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62661 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 02:09:05 +00:00
Evan Cheng
04ee5a1d92
Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62600 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-20 19:12:24 +00:00
Evan Cheng
2722e7b139
DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead of sign extending the low part (in AX/EAX/RAX) into it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62519 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 19:06:11 +00:00
Evan Cheng
50c3dfefd9
Minor tweak to LowerUINT_TO_FP_i32. Bias (after scalar_to_vector) has two uses so we should make it the second source operand of ISD::OR so 2-address pass won't have to be smart about commuting.
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%reg1024<def> = MOVSDrm %reg0, 1, %reg0, <cp#0>, Mem:LD(8,8) [ConstantPool + 0]
%reg1025<def> = MOVSD2PDrr %reg1024
%reg1026<def> = MOVDI2PDIrm <fi#-1>, 1, %reg0, 0, Mem:LD(4,16) [FixedStack-1 + 0]
%reg1027<def> = ORPSrr %reg1025<kill>, %reg1026<kill>
%reg1028<def> = MOVPD2SDrr %reg1027<kill>
%reg1029<def> = SUBSDrr %reg1028<kill>, %reg1024<kill>
%reg1030<def> = CVTSD2SSrr %reg1029<kill>
MOVSSmr <fi#0>, 1, %reg0, 0, %reg1030<kill>, Mem:ST(4,4) [FixedStack0 + 0]
%reg1031<def> = LD_Fp32m80 <fi#0>, 1, %reg0, 0, Mem:LD(4,16) [FixedStack0 + 0]
RET %reg1031<kill>, %ST0<imp-use,kill>
The reason 2-addr pass isn't smart enough to commute the ORPSrr is because it can't look pass the MOVSD2PDrr instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62505 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 08:19:57 +00:00
Evan Cheng
a06ec9efe1
Now not UINT_TO_FP is legal (it's marked custom), dag combiner won't
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optimize it to a SINT_TO_FP when the sign bit is known zero. X86 isel should perform the optimization itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62504 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-19 08:08:22 +00:00
Bill Wendling
030939c87b
Extend thi
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62415 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-17 07:40:19 +00:00
Evan Cheng
8e27826649
Fix MatchAddress bug that's preventing negative displacement from being folded in 64-bit mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62413 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-17 07:09:27 +00:00
Bill Wendling
f6a4e2edb0
Temporarily revert my last change. It is causing a bootstrap failure.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62405 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-17 04:23:51 +00:00
Bill Wendling
8b8a636843
Implement a special algorithm for converting uint_to_fp for i32 values on
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X86. This code:
void f() {
uint32_t x;
float y = (float)x;
}
used to be:
movl %eax, -8(%ebp)
movl [2^52 double], -4(%ebp)
movsd -8(%ebp), %xmm0
subsd [2^52 double], %xmm0
cvtsd2ss %xmm0, %xmm0
Is now:
movsd [2^52 double], %xmm0
movsd %xmm0, %xmm1
movd %ecx, %xmm2
orps %xmm2, %xmm1
subsd %xmm0, %xmm1
cvtsd2ss %xmm1, %xmm0
This is faster on X86. Note that there's an extra load of %xmm0 into %xmm1. That
will be fixed in a later coalescer fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-17 03:56:04 +00:00
Bill Wendling
64e87326d9
Add support for non-zero __builtin_return_address values on X86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62338 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-16 19:25:27 +00:00
Mon P Wang
f0fcdd8e26
Expand insert/extract of a <4 x i32> with a variable index.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62281 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 21:10:20 +00:00
Rafael Espindola
bb46f52027
Add the private linkage.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62279 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 20:18:42 +00:00
Dan Gohman
79ce276083
Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
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and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.
To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 19:20:50 +00:00
Dan Gohman
41b762a75e
Add load-folding table entries for BT*ri8 instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62267 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 17:57:09 +00:00
Dan Gohman
c13cf130c4
Make getWidenVectorType const.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62265 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 17:34:08 +00:00
Dan Gohman
0746392cc2
BT appears to be available on all >= i386 chips.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62196 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 23:27:15 +00:00
Dan Gohman
286575c65c
Don't use a BT instruction if the AND has multiple uses.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62195 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 23:25:30 +00:00
Dan Gohman
f31408d75c
Disable the register+memory forms of the bt instructions for now. Thanks
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to Eli for pointing out that these forms don't ignore the high bits of
their index operands, and as such are not immediately suitable for use
by isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62194 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 23:23:30 +00:00
Dan Gohman
4afe15b131
Add bt instructions that take immediate operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62180 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 20:33:23 +00:00
Dan Gohman
0c89b7e61e
Fix a few more JIT encoding issues in the BT instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62179 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 20:32:45 +00:00
Devang Patel
83489bb770
Use DebugInfo interface to lower dbg_* intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62127 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 00:35:13 +00:00
Duncan Sands
ceb4d1aecb
Rename getABITypeSize to getTypePaddedSize, as
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suggested by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62099 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-12 20:38:59 +00:00
Evan Cheng
f2accb5c9e
80 col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62024 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-10 03:33:22 +00:00
Misha Brukman
9b8f542e27
Removed trailing whitespace from Makefiles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-09 16:44:42 +00:00
Dan Gohman
5446274bd2
Add load-folding table entries for MOVDQA.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61972 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-09 02:40:34 +00:00
Dan Gohman
b134709a58
Whitespace and other minor adjustments to make SSE instructions have
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the same formatting as their corresponding SSE2 instructions, for
consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61971 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-09 02:27:34 +00:00
Devang Patel
eb3fc28914
Convert DwarfWriter into a pass.
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Now Users request DwarfWriter through getAnalysisUsage() instead of creating an instance of DwarfWriter object directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61955 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-08 23:40:34 +00:00
Dan Gohman
fbb7486560
Add patterns to match conditional moves with loads folded
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into their left operand, rather than their right. Do this
by commuting the operands and inverting the condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61842 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 01:00:24 +00:00
Dan Gohman
b33fc7b063
Add load-folding table entries for cmovno too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61841 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 00:44:53 +00:00
Dan Gohman
305fceb56c
Define instructions for cmovo and cmovno.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61836 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 00:35:10 +00:00
Dan Gohman
653456c351
X86_COND_C and X86_COND_NC are alternate mnemonics for
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X86_COND_B and X86_COND_AE, respectively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61835 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-07 00:15:08 +00:00
Dan Gohman
cca2983291
Revert r42653 and forward-port the code that lets INC64_32r be
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converted to LEA64_32r in x86's convertToThreeAddress. This
replaces code like this:
movl %esi, %edi
inc %edi
with this:
lea 1(%rsi), %edi
which appears to be beneficial.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61830 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-06 23:34:46 +00:00
Bill Wendling
d60de51878
Revert r61415 and r61484. Duncan was correct that these weren't needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61765 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 22:53:45 +00:00
Dan Gohman
d68a07650c
Tidy up #includes, deleting a bunch of unnecessary #includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 17:59:02 +00:00
Devang Patel
8a84e4402a
squash warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61707 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 17:31:22 +00:00
Evan Cheng
7877112775
Atom and Core i7 do not have same model number after all.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61686 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 08:45:01 +00:00
Evan Cheng
0be6d3fb2a
Add Intel processors core i7 and atom.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61603 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-03 04:24:44 +00:00
Evan Cheng
5b925c031d
Fix PR3210: Detect more Intel processors. Patch by Torok Edwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61602 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-03 04:04:46 +00:00
Evan Cheng
ccb6976a69
Do not isel load folding bt instructions for pentium m, core, core2, and AMD processors. These are significantly slower than a load followed by a bt of a register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61557 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-02 05:35:45 +00:00
Evan Cheng
018b7ee91a
Fix x86 CPU id detection to identify Penryn (and future processors).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61556 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-02 05:29:20 +00:00
Evan Cheng
52ceafa5c7
Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61555 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-02 05:29:08 +00:00
Duncan Sands
5480c0469e
Fix PR3274: when promoting the condition of a BRCOND node,
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promote from i1 all the way up to the canonical SetCC type.
In order to discover an appropriate type to use, pass
MVT::Other to getSetCCResultType. In order to be able to
do this, change getSetCCResultType to take a type as an
argument, not a value (this is also more logical).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61542 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-01 15:52:00 +00:00
Bill Wendling
998dee96d3
Linux wants the FDE initial location and address range to be forced to 32-bit.
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Darwin doesn't. Make this optional for platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-29 22:12:11 +00:00
Chris Lattner
e55484eb45
Add a simple pattern for matching 'bt'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61426 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-25 05:34:37 +00:00
Chris Lattner
f1e9fd5676
Fix some JIT encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61425 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-25 01:32:49 +00:00
Chris Lattner
d1e3229e4b
BT memory operands load from their address operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61424 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-25 01:27:10 +00:00
Chris Lattner
1c39d4cfaa
translateX86CC can never fail. Simplify it based on this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61423 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-24 23:53:05 +00:00
Bill Wendling
722f5f1cfb
Darwin likes for the EH frame to be non-local.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61420 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-24 08:05:17 +00:00
Bill Wendling
d4121bef3c
GCC doesn't emit DW_EH_PE_sdata4 for the FDE encoding on Darwin. I'm not sure
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about other platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61415 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-24 05:25:49 +00:00
Dan Gohman
82779704ff
Fix a compiler-abort on a testcase where the stack-pointer is added to
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a symbolic constant. This is unlikely to be intentional, but it
shouldn't crash the compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61408 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-24 00:27:51 +00:00
Chris Lattner
4328708bad
indentation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61407 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-24 00:11:37 +00:00
Chris Lattner
4c78e0286a
simplify some control flow and reduce indentation, no functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61404 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 23:42:27 +00:00
Dan Gohman
c7a37d4ff2
Add instruction patterns and encodings for the x86 bt instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61400 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 22:45:23 +00:00
Devang Patel
fd1c6c3123
Silence unused variable warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61392 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 21:56:28 +00:00
Dan Gohman
0b1d4a798d
Clean up the atomic opcodes in SelectionDAG.
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This removes all the _8, _16, _32, and _64 opcodes and replaces each
group with an unsuffixed opcode. The MemoryVT field of the AtomicSDNode
is now used to carry the size information. In tablegen, the size-specific
opcodes are replaced by size-independent opcodes that utilize the
ability to compose them with predicates.
This shrinks the per-opcode tables and makes the code that handles
atomics much more concise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61389 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 21:37:04 +00:00
Mon P Wang
62c75ea397
Fixed code generation for v8i16 and v16i8 splats on X86.
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Fixed lowering of v8i16 shuffles for v8i16 when we fall back to extract/insert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61365 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 04:03:27 +00:00
Dan Gohman
15a3a49e19
Make the fuse-failed debug output human-readable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61356 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 00:19:20 +00:00
Dan Gohman
b12b1a27f5
Fix fast-isel to not emit invalid assembly when presented with a
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constant shift count that doesn't fit in the shift instruction's
immediate field. This fixes PR3242.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61281 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-20 17:19:40 +00:00
Dan Gohman
018a34c576
Move the patterns which have i8 immediates before the patterns
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that have i32 immediates so that they get selected first. This
currently only matters in the JIT, as assemblers will
automatically use the smallest encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61250 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-19 18:25:21 +00:00
Chris Lattner
a33649e98c
Fix some release-assert warnings
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61244 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-19 17:03:38 +00:00
Rafael Espindola
2f6fea90a5
Fix bug 3202.
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The EH_frame and .eh symbols are now private, except for darwin9 and earlier.
The patch also fixes the definition of PrivateGlobalPrefix on pcc linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61242 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-19 10:55:56 +00:00
Dan Gohman
bfd23c9961
When emitting instructions that define EFLAGS and the EFLAGS value isn't
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used, mark the defs as dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61215 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-18 22:03:42 +00:00
Dan Gohman
34d6ad73e1
When setting up the frame pointer, add it as a live-in register to all
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non-entry blocks, so that it doesn't appear use-before-def anywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61214 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-18 22:01:52 +00:00
Mon P Wang
af9b952627
Fixed x86 code generation of multiple for v2i64. It was incorrect for SSE4.1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61211 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-18 21:42:19 +00:00
Dan Gohman
a32b7ac86f
Mark the x86 fp stack registers as "reserved". This tells LiveVariables
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and the RegisterScavenger not to expect traditional liveness
techniques are applicable to these registers, since we don't fully
modify the effects of push and pop after stackification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61179 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-18 01:05:09 +00:00
Dan Gohman
8749b61178
Add initial support for back-scheduling address computations,
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especially in the case of addresses computed from loop induction
variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61075 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16 03:35:01 +00:00