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66 Commits

Author SHA1 Message Date
Akira Hatanaka
3c77033a90 [mips] Set flag neverHasSideEffects flag on floating point conversion 
instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167348 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-11-03 00:53:12 +00:00
Akira Hatanaka
5a7dd43f04 Remove aligned/unaligned load/store fragments defined in MipsInstrInfo.td and 
use load/store fragments defined in TargetSelectionDAG.td in place of them.
Unaligned loads/stores are either expanded or lowered to target-specific nodes,
so instruction selection should see only aligned load/store nodes.

No changes in functionality.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163960 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-15 01:52:08 +00:00
Akira Hatanaka
72e9b6aeb4 Add stub methods for mips assembly matcher. 
Patch by Vladimir Medic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162124 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-08-17 20:16:42 +00:00
Akira Hatanaka
603f69dc2c Define ADJCALLSTACKDOWN/UP nodes. These nodes are emitted regardless of whether 
or not it is in mips16 mode. Define MipsPseudo (mode-independant pseudo) and
PseudoSE (mips32/64 pseudo) classes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161071 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-31 19:13:07 +00:00
Akira Hatanaka
36bcc11236 Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as 
single-precision load and store.

Also avoid selecting LUXC1 and SUXC1 instructions during isel. It is incorrect
to map unaligned floating point load/store nodes to these instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161063 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-31 18:16:49 +00:00
Akira Hatanaka
1418045472 1. introduce MipsPat in place of Pat in order to exclude those from 
being used by Mips16 or Micro Mips
2. clean up a few lines too long encountered

Patch by Reed Kotler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158470 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-14 21:03:23 +00:00
Akira Hatanaka
18f3c78092 This patch adds a predicate to existing mips32 and mips64 so that those 
instruction encodings can be excluded during mips16 processing.

This revision fixes the issue raised by Jim Grosbach.

bool hasStandardEncoding() const { return !inMips16Mode(); }

When micromips is added it will be

bool StandardEncoding() const { return !inMips16Mode()&&  !inMicroMipsMode(); }

No additional testing is needed other than to assure that there is no regression
from this patch.

Patch by Reed Kotler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157234 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-22 03:10:09 +00:00
Akira Hatanaka
ecdc9d5bb2 Add disassembler to MIPS. 
Patch by Vladimir Medic. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154935 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-17 18:03:21 +00:00
Akira Hatanaka
1cc6333161 Emit neg.s or neg.d only if -enable-no-nans-fp-math is supplied by user, 
otherwise expand FNEG during legalization.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154546 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-11 22:59:08 +00:00
Akira Hatanaka
c12a6e6b53 Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user. 
Invalid operation is signaled if the operand of these instructions is NaN.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154545 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-11 22:49:04 +00:00
Akira Hatanaka
02365945a6 Revert r153924. There were buildbot failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153925 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-03 02:51:09 +00:00
Akira Hatanaka
885020a7a7 MIPS disassembler support. 
Patch by Vladimir Medic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153924 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-03 02:20:58 +00:00
Akira Hatanaka
dfa27aea12 Fix bugs which were introduced when support for base+index floating point loads 
and stores was added.

- SelectAddr should return false if Parent is an unaligned f32 load or store.
- Only aligned load and store nodes should be matched to select reg+imm
  floating point instructions.
- MIPS does not have support for f64 unaligned load or store instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151843 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-01 22:12:30 +00:00
Jia Liu
bb481f8820 remove blanks, and some code format 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151625 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-28 07:46:26 +00:00
Akira Hatanaka
44b6c715ac Add support for floating point base register + offset register addressing mode 
load and store instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151611 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-28 02:55:02 +00:00
Akira Hatanaka
3d14b9e28d Remove unnecessary template parameters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151540 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-27 19:17:53 +00:00
Akira Hatanaka
b90113a23e Fix instruction predicates that were not set correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151538 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-27 19:09:08 +00:00
Akira Hatanaka
e4ea241853 Add definitions of floating point multiply add/sub and negative multiply 
add/sub instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151415 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-25 00:21:52 +00:00
Akira Hatanaka
e3186774f3 Remove trailing whitespace. Add newline. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150706 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-16 17:48:20 +00:00
Akira Hatanaka
e6e4b3a002 Pattern for f32 to i64 conversion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148869 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-01-24 22:05:25 +00:00
Akira Hatanaka
4cae74bd74 Various Mips64 floating point instruction patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144019 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 21:38:58 +00:00
Akira Hatanaka
c370619bac Add definition of the base class for floating point comparison instructions 
and add Mips64's version too.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144018 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 21:37:33 +00:00
Akira Hatanaka
e7126ebd54 Add definitions of 64-bit instructions which move data between integer and 
floating pointer registers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144016 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 21:32:58 +00:00
Bruno Cardoso Lopes
c3f16b316a Final patch that completes old JIT support for Mips: 
-Fix binary codes and rename operands in .td files so that automatically
generated function MipsCodeEmitter::getBinaryCodeForInstr gives correct
encoding for instructions.
-Define new class FMem for instructions that access memory.
-Define new class FFRGPR for instructions that move data between GPR and
FPU general and control registers.
-Define custom encoder methods for memory operands, and also for size
operands of ext and ins instructions.
-Only static relocation model is currently implemented.

Patch by Sasa Stankovic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142378 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-18 17:50:36 +00:00
Akira Hatanaka
8f3af87e99 Move class and instruction definitions for conditional moves to a seperate file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142220 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:43:19 +00:00
Akira Hatanaka
1acb7df498 Make changes necessary for supporting floating point load and store instructions 
that have 64-bit pointers or access the 32 x 64-bit floating pointer register
file. Update functions in MipsInstrInfo.cpp too.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141623 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 01:12:52 +00:00
Akira Hatanaka
4391bb75ec Simplify definition of FP move instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141476 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-08 03:50:18 +00:00
Akira Hatanaka
c9289f6a71 Define classes and multiclasses for FP binary instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141475 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-08 03:38:41 +00:00
Akira Hatanaka
bfca0798cf Define multiclasses for FP-to-FP instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141474 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-08 03:29:22 +00:00
Akira Hatanaka
a8de1c1be0 Define classes for FP unary instructions and multiclasses for FP-to-fixed point 
conversion instructions. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141473 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-08 03:19:38 +00:00
Jakob Stoklund Olesen
5cd4ee7770 Revert r140731, "Define classes for unary and binary FP instructions and use them to define" 
It broke the unit tests.  Please reapply with tests fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140735 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 23:59:28 +00:00
Akira Hatanaka
d42ca4607b Define classes for unary and binary FP instructions and use them to define 
multiclasses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140731 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 21:58:01 +00:00
Akira Hatanaka
aa7579025f Rename predicate In32BitMode to NotFP64bit and add definition of IsFP64bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140705 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 18:11:19 +00:00
Akira Hatanaka
d9f958375f Remove definitions of branch-on-FP-likely instructions. They are deprecated. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140704 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-28 17:56:55 +00:00
Akira Hatanaka
6c6db25c10 Remove MipsFPRound. Mips1 is no longer supported. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140661 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 23:55:37 +00:00
Akira Hatanaka
8eea4616bf Embed patterns in definitions of MFC1 and MTC1 instead of defining them outside 
of the instruction definitions using Pat<>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140644 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-27 22:01:01 +00:00
Akira Hatanaka
40eda4626d Make changes in instruction and pattern definitions so that tablegen does not 
complain it cannot infer types in patterns. Fix a mistake in definition of 
SDT_MipsExtractElementF64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140354 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-22 23:31:54 +00:00
Akira Hatanaka
8ddf6531b8 Drop support for Mips1 and Mips2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139405 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-09 20:45:50 +00:00
Akira Hatanaka
614051a1c5 Fix handling of double precision loads and stores when Mips1 is targeted. 
Mips1 does not support double precision loads or stores, therefore two single
precision loads or stores must be used in place of these instructions. This 
patch treats double precision loads and stores as if they are legal
instructions until MCInstLowering, instead of generating the single precision
instructions during instruction selection or Prolog/Epilog code insertion.

Without the changes made in this patch, llc produces code that has the same 
problem described in r137484 or bails out when
MipsInstrInfo::storeRegToStackSlot or loadRegFromStackSlot is called before
register allocation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137711 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 03:51:51 +00:00
Akira Hatanaka
ffe9a7116c Use tabs to separate opcode and operand strings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132718 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-07 18:16:51 +00:00
Akira Hatanaka
f89532f8f6 Add pattern for double-to-integer conversion. Patch by Sasa Stankovic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131927 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-23 22:16:43 +00:00
Akira Hatanaka
01765eb0a1 Fix setting of isCommutable flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131233 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-12 17:42:08 +00:00
Eric Christopher
49ac3d7da9 Fix td file comments for Mips. 
Patch by Liu <proljc@gmail.com>!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131086 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-09 18:16:46 +00:00
Akira Hatanaka
4552c9a3b3 Reverse unnecessary changes made in r129606 and r129608. There is no change in functionality. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129612 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-15 21:51:11 +00:00
Akira Hatanaka
0bf3dfbef6 Fix lines that have incorrect indentation or exceed 80 columns. There is no change in functionality. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129606 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-15 21:00:26 +00:00
Akira Hatanaka
99a2e98edd Add pass that expands pseudo instructions into target instructions after register allocation. Define pseudos that get expanded into mtc1 or mfc1 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129594 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-15 19:52:08 +00:00
Chris Lattner
7a2bdde0a0 Fix a ton of comment typos found by codespell. Patch by 
Luis Felipe Strano Moraes!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-15 05:18:47 +00:00
Akira Hatanaka
1d6b38d9d3 Added support for FP conditional move instructions and fixed bugs in handling of FP comparisons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128650 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 18:26:17 +00:00
Bruno Cardoso Lopes
81092dc20a Remove (hopefully) all trailing whitespaces from the mips backend. Patch by Hatanaka, Akira 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127003 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-04 17:51:39 +00:00
Chris Lattner
036609bd7d Flag -> Glue, the ongoing saga 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122513 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 18:28:41 +00:00