Commit Graph

2345 Commits

Author SHA1 Message Date
Chris Lattner
225549f775 disolve a hack, having CodeGenInstAlias decode the alias in the .td
file instead of the asmmatcher.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118324 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06 06:39:47 +00:00
Duncan Sands
1e96bab329 In the calling convention logic, ValVT is always a legal type,
and as such can be represented by an MVT - the more complicated
EVT is not needed.  Use MVT for ValVT everywhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118245 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-04 10:49:57 +00:00
Chris Lattner
c07bd40a64 partition operand processing between aliases and instructions.
Right now the code is partitioned but the behavior is the same.
This should be improved in the near future.   This removes some
uses of TheOperandList.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118232 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-04 02:11:18 +00:00
Chris Lattner
5f4280cd2d pull name slicing out of BuildInstructionOperandReference so
it doesn't do any lexical stuff anymore.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118230 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-04 01:58:23 +00:00
Chris Lattner
ba3b5b6382 cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118228 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-04 01:55:23 +00:00
Chris Lattner
567820c1e0 replace SrcOpNum with SrcOpName, eliminating a numering dependency
on the incoming operand list.  This also makes the code simpler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118225 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-04 01:42:59 +00:00
Chris Lattner
0bb780c0e0 strength reduce some code, resolving a fixme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118219 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-04 00:57:06 +00:00
Chris Lattner
1d13bda737 take a big step to making aliases more general and less of a hack:
now matchables contain an explicit list of how to populate each
operand in the result instruction instead of having them somehow
magically be correlated to the input inst.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118217 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-04 00:43:46 +00:00
Jim Grosbach
60aaa76196 Support generating an MC'ized CodeEmitter directly. Maintain a reference to the
Fixups list for the instruction so the operand encoders can add to it as
needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 23:38:14 +00:00
Chris Lattner
c0b14a250b rename Operand -> AsmOperand for clarity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118190 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 19:47:34 +00:00
Duncan Sands
1440e8b918 Inside the calling convention logic LocVT is always a simple
value type, so there is no point in passing it around using
an EVT.  Use the simpler MVT everywhere.  Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118167 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 11:35:31 +00:00
Jim Grosbach
e6913600c7 Break ARM addrmode4 (load/store multiple base address) into its constituent
parts. Represent the operation mode as an optional operand instead.
rdar://8614429

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118137 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 01:01:43 +00:00
Chris Lattner
a1ca91af4e Completely reject instructions that have an operand in their
ins/outs list that isn't specified by their asmstring.  Previously
the asmmatcher would just force a 0 register into it, which clearly
isn't right.  Mark a bunch of ARM instructions that use this as 
isCodeGenOnly.  Some of them are clearly pseudo instructions (like
t2TBB) others use a weird hasExtraSrcRegAllocReq thing that will
either need to be removed or the asmmatcher will need to be taught
about it (someday).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118119 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 23:40:41 +00:00
Chris Lattner
d51257a436 make MatchableInfo::Validate reject instructions (like LDR_PRE in ARM)
that have complicated tying going on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118112 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 23:18:43 +00:00
Chris Lattner
9b0d4bfca0 rewrite EmitConvertToMCInst to iterate over the MCInst operands,
filling them in one at a time.  Previously this iterated over the
asmoperands, which left the problem of "holes".  The new approach
simplifies things.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118104 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 22:55:03 +00:00
Chris Lattner
dda855de8b merge two large parallel loops in EmitConvertToMCInst, no change
in the generated .inc files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118083 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 21:49:44 +00:00
Chris Lattner
ec6f096c36 a bunch of random cleanup, move a helper to CGT where it belongs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 18:10:06 +00:00
Jim Grosbach
ab3d00e535 Revert r114340 (improvements in Darwin function prologue/epilogue), as it broke
assumptions about stack layout. Specifically, LR must be saved next to FP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118026 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 17:35:25 +00:00
Chris Lattner
3b5aec67ef add and update comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118025 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 17:34:28 +00:00
Chris Lattner
d19ec05e07 refactor/cleanup MatchableInfo by eliminating the Tokens array,
merging it into a Token field in Operand, and moving the first
token to an explicit mnemonic field.  These were parallel
arrays before (except for the mnemonic) which kept confusing me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118024 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 17:30:52 +00:00
Chris Lattner
3116fef7b9 rename operands -> asmoperands to be more descriptive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117993 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 01:03:43 +00:00
Jim Grosbach
cd5391965f Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117987 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 00:16:39 +00:00
Chris Lattner
e66b7ebfb4 fix computation of ambiguous instructions to not ignore the mnemonic.
FWIW, X86 has 254 ambiguous instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117979 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:57:23 +00:00
Chris Lattner
4c9f4e4002 give MatchableInfo::Operand a constructor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117968 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 23:08:02 +00:00
Chris Lattner
b501d4f673 Implement enough of the missing instalias support to get
aliases installed and working.  They now work when the
matched pattern and the result instruction have exactly
the same operand list.

This is now enough for us to define proper aliases for
movzx and movsx, implementing rdar://8017633 and PR7459.

Note that we do not accept instructions like:
  movzx 0(%rsp), %rsi

GAS accepts this instruction, but it doesn't make any
sense because we don't know the size of the memory
operand.  It could be 8/16/32 bits.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117901 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:34:34 +00:00
Chris Lattner
22bc5c4184 rename InstructionInfo -> MatchableInfo since it now
represents InstAliases as well.  Rename 
isAssemblerInstruction -> Validate since that is what
it does (modulo the ARM $lane hack).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117899 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:06:45 +00:00
Chris Lattner
c2d67bbf80 refactor initialization of InstructionInfo to be sharable between
instructions and InstAliases.  Start creating InstructionInfo's
for Aliases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117898 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 04:53:48 +00:00
Chris Lattner
4164f6bbbf make the asm matcher emitter reject instructions that have comments
in their asmstring.  Fix the two x86 "NOREX" instructions that have them.
If these comments are important, the instlowering stuff can print them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117897 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 04:44:29 +00:00
Chris Lattner
5bc9387806 refactor InstructionInfo to not have a pointer to CodeGenInstruction
member, and make isAssemblerInstruction() a method (pushing some code
around inside it).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117895 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 04:34:44 +00:00
Chris Lattner
c76e80ded7 define a new CodeGenInstAlias. It has an asmstring and operand list for now,
todo: the result field.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117894 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 04:05:41 +00:00
Chris Lattner
c240bb0ede factor the operand list (and related fields/operations) out of
CodeGenInstruction into its own helper class.  No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117893 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 04:03:32 +00:00
Chris Lattner
79b3cddfa2 avoid needless throw/catch/rethrow, stringref'ize some simple stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117892 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 03:19:09 +00:00
Chris Lattner
f780811456 eliminate the old InstFormatName which is always "AsmString",
simplify CodeGenInstruction. No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117891 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 02:15:23 +00:00
Chris Lattner
4a74ee7203 all predicates on an MnemonicAlias must be AssemblerPredicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 02:09:21 +00:00
Chris Lattner
1de8823578 change the singleton register handling code to be based on Record*'s
instead of strings, simplifying it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 01:47:07 +00:00
Chris Lattner
02bcbc97fb Give AsmMatcherInfo a CodeGenTarget, which simplifies a bunch of
argument passing.  Consolidate all SingletonRegister detection
and handling into a new 
InstructionInfo::getSingletonRegisterForToken method instead of
having it scattered about.  No change in generated .inc files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117888 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 01:37:30 +00:00
Chris Lattner
4d43d0fd99 move FlattenVariants out of AsmMatcherEmitter into a shared
CodeGenInstruction::FlattenAsmStringVariants method.  Use it
to simplify the code in AsmWriterInst, which now no longer 
needs to worry about variants.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117886 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 01:07:14 +00:00
Chris Lattner
52de0ef922 add a FIXME, $lane in ARM is an issue that needs to be resolved before
this can start rejecting instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117885 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 00:51:32 +00:00
Chris Lattner
4d1189f385 reject instructions that contain a \n in their asmstring. Mark
various X86 and ARM instructions that are bitten by this as isCodeGenOnly,
as they are.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117884 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 00:46:16 +00:00
Chris Lattner
d6d9dd9f5e fix a crash on:
let Constraints = "$val = $dst", Defs = [EFLAGS] in, isCodeGenOnly = 1 {

we now get:

X86InstrCompiler.td:653:52: error: Expected class, def, defm, multiclass or let definition
let Constraints = "$val = $dst", Defs = [EFLAGS] in, isCodeGenOnly = 1 {
                                                   ^



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117863 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 19:27:15 +00:00
Chris Lattner
150d20e8fc fix the !eq operator in tblgen to return a bit instead of an int.
Use this to make the X86 and ARM targets set isCodeGenOnly=1 
automatically for their instructions that have Format=Pseudo,
resolving a hack in tblgen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 19:22:57 +00:00
Chris Lattner
a4a3a5e3c2 two changes: make the asmmatcher generator ignore ARM pseudos properly,
and make it a hard error for instructions to not have an asm string.
These instructions should be marked isCodeGenOnly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 19:15:18 +00:00
Chris Lattner
39ee036f40 reapply r117858 with apparent editor malfunction fixed (somehow I
got a dulicated line).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117860 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 19:10:56 +00:00
Chris Lattner
8b2f0822f3 revert r117858 while I check out a failure I missed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 19:05:32 +00:00
Chris Lattner
efa53760fe the asm matcher can't handle operands with modifiers (like ${foo:bar}).
Instead of silently ignoring these instructions, emit a hard error and
force the target author to either refactor the target or mark the 
instruction 'isCodeGenOnly'.

Mark a few instructions in ARM and MBlaze as isCodeGenOnly the are 
doing this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 18:48:12 +00:00
Chris Lattner
6fa152c8fb have GetAliasRequiredFeatures get its features from
AsmMatcherInfo so we don't have two places that know the
feature -> enum mapping.  No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117845 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 20:15:02 +00:00
Chris Lattner
0aed1e7701 simplify code that creates SubtargetFeatureInfo, ensuring that features
that are only used by MnemonicAliases will be found.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117844 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 20:07:57 +00:00
Chris Lattner
d7e409da6d fix a fixme in stringmatcher, having it generate nice looking code if the
'tomatch' code contains \n's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117843 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 19:57:17 +00:00
Chris Lattner
8cf8bcc40c fix typos and some serious bugs in feature handling (but not for
cases that are currently exercised).  Thanks to Frits van Bommel for
the great review!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117840 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 19:47:49 +00:00
Chris Lattner
0f899c78e1 Resolve a terrible hack in tblgen: instead of hardcoding
"In32BitMode" and "In64BitMode" into tblgen, allow any
predicate that inherits from AssemblerPredicate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117831 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 19:38:20 +00:00
Chris Lattner
693173feef Implement (and document!) support for MnemonicAlias's to have Requires
directives, allowing things like this:

def : MnemonicAlias<"pop", "popl">, Requires<[In32BitMode]>;
def : MnemonicAlias<"pop", "popq">, Requires<[In64BitMode]>;

Move the rest of the X86 MnemonicAliases over to the .td file.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117830 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 19:23:13 +00:00
Chris Lattner
8cc0a6b788 fix build problem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117828 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 18:57:07 +00:00
Chris Lattner
4fd32c6648 diagnose targets that define two alises with the same 'from' mnemonic
with a useful error message instead of having tblgen explode with an 
assert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117827 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 18:56:12 +00:00
Chris Lattner
7fd4489de1 emit the mnemonic aliases in their own helper function instead of
inline into MatchInstructionImpl.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117826 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 18:48:18 +00:00
Chris Lattner
674c1dcca2 implement (and document!) the first kind of MC assembler alias, which
just remaps one mnemonic to another.  Convert a few of the X86 aliases
from .cpp to .td code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117815 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 17:36:36 +00:00
Jim Grosbach
a7c78220c4 trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117724 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 22:13:48 +00:00
Chris Lattner
4e692ab5ee fix the asmmatcher generator to handle targets with no RegisterPrefix
(like ARM) correctly.  With this change, we can now match "bx lr"
because we recognize lr as a register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117606 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 21:28:42 +00:00
Evan Cheng
f40deed62f Shifter ops are not always free. Do not fold them (especially to form
complex load / store addressing mode) when they have higher cost and
when they have more than one use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 23:41:30 +00:00
Owen Anderson
498ec20703 Provide correct encodings for NEON vcvt, which has its own special immediate encoding
for specifying fractional bits for fixed point conversions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117501 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 22:49:00 +00:00
Kevin Enderby
529b1a4398 Added the x86 instruction ud2b (2nd official undefined instruction).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117485 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 20:46:49 +00:00
Jim Grosbach
3e55612472 First part of refactoring ARM addrmode2 (load/store) instructions to be more
explicit about the operands. Split out the different variants into separate
instructions. This gives us the ability to, among other things, assign
different scheduling itineraries to the variants. rdar://8477752.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117409 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:37:02 +00:00
Benjamin Kramer
86c69c570c Constify another 2 disassembler tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117208 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 09:28:42 +00:00
Benjamin Kramer
4d1dca92bd Make the disassembler tables const so they end up in read-only memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 09:10:44 +00:00
Mikhail Glushenkov
a73e586495 Remove -llvmc-temp-hack from tblgen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117197 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 07:32:53 +00:00
Mikhail Glushenkov
17ef94fe1b Syntax tweak in llvmc: (something [a,b,c]) -> (something a, b, c).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117196 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 07:32:46 +00:00
Mikhail Glushenkov
c761f7dca2 Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117195 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 07:32:37 +00:00
Benjamin Kramer
a3ac427507 Make some symbols static, move classes into anonymous namespaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117111 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 17:35:07 +00:00
Anders Carlsson
238777eb58 Add a way to emit StringSwitch of clang attribute spellings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116899 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 01:21:53 +00:00
Oscar Fuentes
f0c55a9b97 Build with RTTI and exceptions disabled. Only in GCC for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116682 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-17 02:26:16 +00:00
Jim Grosbach
8abe32af38 ARM mode encoding information for UBFX and SBFX instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-15 17:15:16 +00:00
Jim Grosbach
b3af5de2d9 Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern
and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116432 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 21:00:04 +00:00
Jim Grosbach
b35ad41fef Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 19:56:10 +00:00
Jim Grosbach
5013f7469e Allow targets to optionally specify custom binary encoder functions for
operand values. This is useful for operands which require additional trickery
to encode into the instruction. For example, the ARM shifted immediate and
shifted register operands.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116353 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 22:21:57 +00:00
Cameron Esfahani
519c893c26 Fix spelling error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116282 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-12 00:21:05 +00:00
Jim Grosbach
a1e2194f03 The assert() should reference to machine instr operand number, too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 21:41:31 +00:00
Jim Grosbach
1a7233f9d0 Make sure to use the machine instruction operand number. It doesn't always
map one-to-one with the CodeGenInstruction operand number.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116238 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 21:31:22 +00:00
Jim Grosbach
c4bd6fbf4b trailing whitespace cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116215 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 19:38:01 +00:00
Jim Grosbach
01855071e2 When figuring out which operands match which encoding fields in an instruction,
try to match them by name first. If there is no by-name match, fall back to
assuming they are in order (this was the previous behavior).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116211 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-11 18:25:51 +00:00
Jim Grosbach
bb16824dc3 A few 80 column cleanups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116069 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 18:13:57 +00:00
Jim Grosbach
9ed2cee105 trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116068 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 18:09:59 +00:00
Daniel Dunbar
6aa526bf76 Fix -Asserts warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116030 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 02:07:22 +00:00
Jim Grosbach
bade37bb8b Make <target>CodeEmitter::getBinaryCodeForInstr() a const method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116018 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 00:21:28 +00:00
Jim Grosbach
0e99219e03 Move checking for t2MOVCCi16 to the right place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115994 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 22:14:01 +00:00
Nick Lewycky
366b1e1f3f Fix typo in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115986 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 21:55:16 +00:00
Dan Gohman
e4f1a9b8a2 Move tool_output_file into its own file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115973 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 20:32:40 +00:00
Jim Grosbach
8b892ae3d6 trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115923 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 16:56:28 +00:00
Jim Grosbach
a4257162be Allow use of the 16-bit literal move instruction in CMOVs for Thumb2 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 00:53:56 +00:00
Jim Grosbach
3bbdcea49a Allow use of the 16-bit literal move instruction in CMOVs for ARM mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115884 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-07 00:42:42 +00:00
Jim Grosbach
4fc92e02d7 Now that VDUPfqf and VDUPfdfare properly pseudos, nuke the special handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115841 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-06 21:17:07 +00:00
Chris Lattner
46f55527d8 Generalize tblgen's dag parsing logic to handle arbitrary expressions
as the operator of the dag.  Specifically, this allows parsing things
like (F.x 4) in addition to just (a 4).

Unfortunately, this runs afoul of an idiom being used by llvmc.  It
is using dags like (foo [1,2,3]) to represent a list of stuff being
passed into foo.  With this change, this is parsed as a [1,2,3] 
subscript on foo instead of being the first argument to the dag.
Cope with this in the short term by requiring a "-llvmc-temp-hack"
argument to tblgen to get the old parsing behavior.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115742 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-06 04:55:48 +00:00
Chris Lattner
578bcf0e48 cleanups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115739 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-06 04:31:40 +00:00
Chris Lattner
c7252ce743 remove the !nameconcat tblgen feature. It "shorthand" and only used in 4 places
where !cast is just as short.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115722 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-06 00:19:21 +00:00
Chris Lattner
8d978a75b4 allow !strconcat to take more than two operands to eliminate
!strconcat(!strconcat(!strconcat(!strconcat

Simplify some x86 td files to use it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115719 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05 23:58:18 +00:00
Chris Lattner
c2b0875b8d when david added support for #NAME# he didn't update the comments and
tried (but failed) to artificially constrain it to working with #NAME#.
Just allow any # in identifiers, and update the comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115704 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05 22:59:29 +00:00
Chris Lattner
df72eaef3d enhance tblgen to support anonymous defm's, use this to
simplify the X86 CMOVmr's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115702 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05 22:51:56 +00:00
Jim Grosbach
9c3aa4d4cd trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115664 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05 20:35:57 +00:00
Sebastian Redl
2dc91642ec Update attribute reading for the changed source location code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115624 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05 15:59:36 +00:00
Douglas Gregor
4a12f22773 Properly deserialize Clang types that are used as attribute arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115616 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05 14:51:48 +00:00
Sean Callanan
6aeb2e32b7 Fixed the disassembler to handle two new X86
instruction forms.  Now the ENTER instruction
disassembles correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115573 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-04 22:45:51 +00:00
Francois Pichet
8ec055dbc8 Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-01 21:20:39 +00:00
Dale Johannesen
0488fb649a Massive rewrite of MMX:
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 23:57:10 +00:00
Jim Grosbach
ca96a86165 Let a target specify whether it wants an assembly printer to be the MC version
or not. TableGen needs to generate the printInstruction() function as taking
an MCInstr* or a MachineInstr*, depending. Default to the old non-MC
version so that everything not yet using MC continues to just work without
fidding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115126 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 01:29:54 +00:00
Evan Cheng
3881cb7a5d Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP
pipeline forwarding path.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115098 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-29 22:42:35 +00:00
Jim Grosbach
9255b8d349 trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115096 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-29 22:32:50 +00:00
Chris Lattner
b2ef4c1235 add basic avx support to the disassembler, also teach it about ssmem/sdmem
operands.

With this done, we can remove the _Int suffixes from the round instructions
without the disassembler blowing up.  This allows the assembler to support
them, implementing rdar://8456376 - llvm-mc rejects 'roundss'


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115019 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-29 02:57:56 +00:00
Evan Cheng
63d66eed16 Add support to model pipeline bypass / forwarding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115005 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-28 23:50:49 +00:00
Benjamin Kramer
d1e1703c39 Push twines deeper into SourceMgr's error handling methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114847 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-27 17:42:11 +00:00
Michael J. Spencer
1f40960543 Get rid of pop_macro warnings on MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114750 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-24 19:48:47 +00:00
Owen Anderson
f523e476c2 Revert r114703 and r114702, removing the isConditionalMove flag from instructions. After further
reflection, this isn't going to achieve the purpose I intended it for.  Back to the drawing board!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114710 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23 23:45:25 +00:00
Owen Anderson
5716180b1a Add an TargetInstrDesc bit to indicate that a given instruction is a conditional move.
Not intended functionality change, as nothing uses this yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114702 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23 22:44:10 +00:00
Nate Begeman
8a6e7e1214 Revert r114596, it's breaking a few tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114659 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23 16:49:17 +00:00
Nate Begeman
e5cb26fab9 <rdar://problem/8228022> Wvector-conversions warnings in arm_neon.h
Explicitly cast arguments to the type the builtin expects, which is <vN x i8>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114596 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22 22:28:42 +00:00
Chris Lattner
d847bc20b8 Rework passing parent pointers into complexpatterns, I forgot
that complex patterns are matched after the entire pattern has
a structural match, therefore the NodeStack isn't in a useful
state when the actual call to the matcher happens.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114489 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 22:00:25 +00:00
Chris Lattner
78d3af47f5 just like they can opt into getting the root of the pattern being
matched, allow ComplexPatterns to opt into getting the parent node
of the operand being matched.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114472 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 20:37:12 +00:00
Chris Lattner
52a261b3c1 fix a long standing wart: all the ComplexPattern's were being
passed the root of the match, even though only a few patterns
actually needed this (one in X86, several in ARM [which should
be refactored anyway], and some in CellSPU that I don't feel 
like detangling).   Instead of requiring all ComplexPatterns to
take the dead root, have targets opt into getting the root by
putting SDNPWantRoot on the ComplexPattern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114471 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 20:31:19 +00:00
Mikhail Glushenkov
f41b75d85b Trailing whitespace, 80-col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 14:59:50 +00:00
Mikhail Glushenkov
46aa524f0d llvmc: Allow multiple output languages.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114433 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21 14:59:42 +00:00
Eric Christopher
168705049c Handle the odd case where we only have one instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-18 18:50:27 +00:00
Bob Wilson
ee9ca07e7f Use float64 instead of int64 vector elements for NEON vget_low and vget_high
functions, since int64 is not a legal type and using it leads to inefficient
code.  PR8036.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15 01:52:33 +00:00
Bob Wilson
72774c9a83 Tidy whitespace in generated arm_neon.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113865 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-14 21:52:34 +00:00
Michael J. Spencer
08047f6169 CBackend: Fix MSVC build.
This may produce warnings on MSVS, but it's better than failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113834 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-14 04:27:38 +00:00
Dale Johannesen
8be452545a Add x86mmx to TableGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11 00:16:46 +00:00
Evan Cheng
5f54ce3473 For each instruction itinerary class, specify the number of micro-ops each
instruction in the class would be decoded to. Or zero if the number of
uOPs must be determined dynamically.

This will be used to determine the cost-effectiveness of predicating a
micro-coded instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113513 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-09 18:18:55 +00:00
Chris Lattner
373c458850 fix bugs in push/pop segment support, rdar://8407242
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113422 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 22:13:08 +00:00
Bill Wendling
d8dd5757e0 Add an MVT::x86mmx type. It will take the place of all current MMX vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113261 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 20:03:56 +00:00
Bill Wendling
72d1027d87 Fix whitespace, because I'm OCD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113250 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 18:49:14 +00:00
Dale Johannesen
86097c384f Add patterns for MMX that use the new intrinsics.
Enable palignr intrinsic.
These may need adjustment for a new VT in due course.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113233 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 18:10:56 +00:00
Chris Lattner
32c685cb67 attempt to appease msvc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113198 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 06:10:48 +00:00
Gabor Greif
e53ee3b112 fix comment typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113197 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 06:06:06 +00:00
Chris Lattner
9bb9fa19a5 generalize my previous operand loc info hack. If the same operand
is busted for all variants, report it as the location.  This allows
us to get the operand right for bugs like:

t.s:3:12: error: invalid operand for instruction
	outb %al, %gs
	          ^

Even though there are reg/imm and reg/reg forms of this instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113183 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 23:37:39 +00:00
Chris Lattner
ce4a3355d9 in the case where an instruction only has one implementation
of a mneumonic, report operand errors with better location
info.  For example, we now report:

t.s:6:14: error: invalid operand for instruction
        cwtl $1
             ^

but we fail for common cases like:

t.s:11:4: error: invalid operand for instruction
   addl $1, $1
   ^

because we don't know if this is supposed to be the reg/imm or imm/reg
form.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113178 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 22:11:18 +00:00
Chris Lattner
a008e8ac73 Now that we know if we had a total fail on the instruction mnemonic,
give a more detailed error.  Before:

t.s:11:4: error: unrecognized instruction
   addl $1, $1
   ^
t.s:12:4: error: unrecognized instruction
   f2efqefa $1
   ^

After:

t.s:11:4: error: invalid operand for instruction
   addl $1, $1
   ^
t.s:12:4: error: invalid instruction mnemonic 'f2efqefa'
   f2efqefa $1
   ^

This fixes rdar://8017912 - llvm-mc says "unrecognized instruction" when it means "invalid operands"


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113176 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:54:15 +00:00
Chris Lattner
fa0d74d58e simplify DEBUG_WITH_TYPE usage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113174 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:28:52 +00:00
Chris Lattner
44b0daad44 this if can now be an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113173 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:25:43 +00:00
Chris Lattner
80db4e51d2 ;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113172 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:23:43 +00:00
Chris Lattner
2b1f943444 now that the opcode is trivially exposed, start matching instructions
by doing a binary search over the mnemonic instead of doing a linear
search through all possible instructions.  This implements rdar://7785064


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113171 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:22:45 +00:00
Chris Lattner
96352e5ceb emit the match table at global scope instead of within the
MatchInstructionImpl. This makes it easier to read/understand
MatchInstructionImpl.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113170 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:08:38 +00:00
Chris Lattner
e206fcf0e9 special case the mnemonic operand of the instruction in the
generated matcher, emiting it as a column in the MatchEntry
table instead of forcing it to go through classification and
everything else.  Making it be classified caused tblgen to
produce a ton of one-off classes for each mneumonic.  This
should reduce the size of the generated matcher significantly
while paving the way for future improvements.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113169 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:01:37 +00:00
Chris Lattner
87410368e1 The "ambiguous instructions" check only produces anything with -debug,
so only do the N^2 loop with debug mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 20:21:47 +00:00
Chris Lattner
ec6789f4f9 have tblgen detect when an instruction would have matched, but
failed because a subtarget feature was not enabled.  Use this to
remove a bunch of hacks from the X86AsmParser for rejecting things
like popfl in 64-bit mode.  Previously these hacks weren't needed,
but were important to get a message better than "invalid instruction"
when used in the wrong mode.

This also fixes bugs where pushal would not be rejected correctly in
32-bit mode (just pusha).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113166 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 20:08:02 +00:00
Chris Lattner
79ed3f77e8 change MatchInstructionImpl to return an enum instead of bool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113165 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 19:22:17 +00:00
Chris Lattner
0692ee676f have AsmMatcherEmitter.cpp produce the hunk of code that gets included
into the middle of the class, and rework how the different sections of
the generated file are conditionally included for simplicity.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113163 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 19:11:01 +00:00
Chris Lattner
cc67c75b67 emit the LLVM intrinsic name -> intrinsic number mapping table with
StringMatcher instead of a linear sequence of memcmps.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113145 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 03:58:45 +00:00
Chris Lattner
902edf2166 allow specifying an indentation level for the string matcher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113143 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 03:50:59 +00:00
Chris Lattner
298b176559 emit the __builtin -> intrinsic map with StringMatcher instead of a
copy of a close relative of it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113142 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 03:14:45 +00:00
Chris Lattner
8e4fdef6cc same bug, another place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113141 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 03:12:27 +00:00
Chris Lattner
6d7c307a08 fix a critical bug where the generated table would say
"1 strings to match" in a comment, which isn't gramatic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113140 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 03:11:10 +00:00
Chris Lattner
2ba1359ba6 update cmake
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113139 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 02:58:25 +00:00
Chris Lattner
5845e5c62b factor the snazzy string matcher code that Daniel hates
out of AsmMatcherEmitter.cpp into its own class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113137 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 02:01:51 +00:00
Chris Lattner
2738ff9c22 slightly improve the runtime and code size of the Intrinsics info table by not
comparing the "llvm." prefix in the memcmp, and not storing it in the string literal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113136 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 01:44:44 +00:00
Chris Lattner
718045889e zap dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113071 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-04 17:45:58 +00:00
David Greene
9703843dfa Generalize getFieldType to work on all TypedInits. Add a couple of testcases from
Amaury Pouly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113010 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 21:00:49 +00:00
Jakob Stoklund Olesen
ecf93e4ab3 Stop emitting predicate functions. They are no longer used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112924 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03 00:39:50 +00:00
Chris Lattner
8861e275d0 remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112707 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 15:39:31 +00:00
Dan Gohman
d4c454317a Make tool_output_file's raw_ostream instance a member variable instead
of a base class.

This makes it possible to unregister the file from FilesToRemove when
the file is done. Also, this eliminates the need for
formatted_tool_output_file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112706 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 14:20:41 +00:00
Chris Lattner
2d9005848d more dead thing zapping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112353 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-28 03:43:50 +00:00
Chris Lattner
1ff90f7896 zap dead method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112352 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-28 03:42:45 +00:00
Bob Wilson
dbb350a5c7 Fix a comment typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112302 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-27 21:56:59 +00:00
Eric Christopher
53452606ca Allow strict subclasses of register classes, this way we can handle
ARM instructions with:

foo GPR, rGPR

which happens a lot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112025 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25 04:58:56 +00:00
Eric Christopher
a2c9188560 Split out register class subclassing to a separate function and clean up
accordingly.  No functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112008 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25 00:41:18 +00:00
Eric Christopher
2cfcad97b7 Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111996 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 23:21:59 +00:00
Mikhail Glushenkov
8c67e4cb3a llvmc: Improve error handling in EmitEdgeClasses().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111886 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 01:10:22 +00:00
Mikhail Glushenkov
d9a7316f9a llvmc: Make syntax more consistent.
CompilationGraph and LanguageMap definitions do not use special syntax anymore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-23 23:21:23 +00:00
Mikhail Glushenkov
00a5b5b2e9 llvmc: Allow multiple LanguageMaps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111829 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-23 19:24:16 +00:00
Mikhail Glushenkov
7555f0a2bc llvmc: Properly handle (error) in edge properties.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111827 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-23 19:24:08 +00:00
Mikhail Glushenkov
c712edc785 llvmc: Do not mention plugins in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111826 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-23 19:24:00 +00:00
Chandler Carruth
54f6163042 Fix some GCC warnings by providing a virtual destructor in the base of a class
hierarchy with virtual methods and using llvm_unreachable to properly indicate
unreachable states which would otherwise leave variables uninitialized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111803 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-23 08:25:07 +00:00
Mikhail Glushenkov
297514d155 llvmc: Fix alias generation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111662 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-20 18:16:26 +00:00
Dan Gohman
cec358ae16 Convert tablegen to use tool_output_file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111644 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-20 16:45:58 +00:00
Mikhail Glushenkov
7a57454d82 llvmc: Do not prefix option names with AutoGenerated.
Since they now live in the namespace 'autogenerated'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111620 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-20 11:24:51 +00:00
Mikhail Glushenkov
03b6d4e04c llvmc: Cut global namespace pollution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111619 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-20 11:24:44 +00:00
Mikhail Glushenkov
b57326c8aa llvmc: Update examples.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111553 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-19 20:04:19 +00:00
Eli Friedman
a8fa392691 Use std::string instead of StringRef in ClangAttrEmitter.cpp; per report on
cfe-dev, fixes an error compiling with MSVC.  Using a StringRef here doesn't
look safe in any case.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111513 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-19 06:11:05 +00:00
Sean Hunt
5c5f46697d Add include missing for VC build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111484 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-19 00:19:03 +00:00
Sean Hunt
5b38500197 Remove three spurious semicolons
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111480 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-19 00:03:05 +00:00
Sean Hunt
726a3d284e Finish full attribute class emission for clang.
For more information, see the accompanying clang patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111454 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18 23:23:09 +00:00
Eric Christopher
922157c834 Remove predicate workaround, we're going to require that predicate
and optional def operands are handled in the backend support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111220 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 01:18:37 +00:00
Bob Wilson
22f5dc79c0 Rename sat_shift operand to shift_imm, in preparation for using it for other
instructions besides saturate instructions.  No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16 18:27:34 +00:00
Mikhail Glushenkov
b3d36293c2 llvmc: remove dynamic plugins.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111094 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-15 07:07:12 +00:00
Mikhail Glushenkov
cb5d3ef882 Revert r111007.
Apparently, this is now fixed in Clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111032 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 20:08:53 +00:00
Mikhail Glushenkov
aa1a373a66 Add a workaround for building with Clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111007 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 06:02:45 +00:00
Mikhail Glushenkov
2e027cb6ed llvmc: fix two tests, remove XFAILs.
Tested on Linux and Darwin; please add platform-specific XFAILs/mail me a bug
report if this still fails.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110998 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 02:29:24 +00:00
Johnny Chen
1adc40cac3 Cleaned up the for-disassembly-only entries in the arm instruction table so that
the memory barrier variants (other than 'SY' full system domain read and write)
are treated as one instruction with option operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 20:46:17 +00:00
Daniel Dunbar
4f98f83459 tblgen/AsmMatcher: Always emit the match function as 'MatchInstructionImpl',
target specific parsers can adapt the TargetAsmParser to this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110888 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 00:55:32 +00:00
Bob Wilson
eaf1c98a7c Move the ARM SSAT and USAT optional shift amount operand out of the
instruction opcode.  This also fixes part of PR7792.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110875 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 23:10:46 +00:00
Daniel Dunbar
4d39b6728d tblgen/AsmMatcher: Treat '.' in assembly strings as a token separator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110789 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 06:36:59 +00:00
Daniel Dunbar
a9ba5fe2bd tblgen/AsmMatcher: Downgrade instructions with tied operands to a debug-only warning, for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110779 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 04:46:08 +00:00
Bob Wilson
9a1c189d9e Add a separate ARM instruction format for Saturate instructions.
(I discovered 2 more copies of the ARM instruction format list, bringing the
total to 4!!  Two of them were already out of sync.  I haven't yet gotten into
the disassembler enough to know the best way to fix this, but something needs
to be done.)  Add support for encoding these instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110754 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 00:01:18 +00:00
Eric Christopher
ae321ed287 We already have this as OperandNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110748 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-10 23:46:20 +00:00
Bill Wendling
73739d0bf1 Add back in r109901, which adds a Compare flag to the target instructions. It's
useful after all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110531 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-08 01:49:35 +00:00
Rafael Espindola
55e9587469 Fix eabi calling convention when a 64 bit value shadows r3.
Without this what was happening was:

* R3 is not marked as "used"
* ARM backend thinks it has to save it to the stack because of vaarg
* Offset computation correctly ignores it
* Offsets are wrong

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110446 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06 15:35:32 +00:00
Bill Wendling
5b55ff0c15 Revert r109901. The implementation of <rdar://problem/7405933> (r110423) doesn't
need the Compare flag after all.

--- Reverse-merging r109901 into '.':
U    include/llvm/Target/TargetInstrDesc.h
U    include/llvm/Target/Target.td
U    utils/TableGen/InstrInfoEmitter.cpp
U    utils/TableGen/CodeGenInstruction.cpp
U    utils/TableGen/CodeGenInstruction.h



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110424 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06 01:36:09 +00:00
Eric Christopher
5759b9b8be Moar words!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110422 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06 01:30:54 +00:00
Nate Begeman
59d70cbc29 Add tablegen support for vdup_lane
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110419 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-06 01:24:11 +00:00
Dan Gohman
7365c091f9 Remove IntrWriteMem, as it's the default. Rename IntrWriteArgMem
to IntrReadWriteArgMem, as it's for reading as well as writing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110395 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 23:36:21 +00:00
Bill Wendling
1844b1a5a4 Add a "Compare" flag to the target instruction descriptor. This will be used
later to identify and possibly remove superfluous compare instructions -- those
that are testing for and setting a status flag that should already be set.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109901 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-30 22:48:39 +00:00
Jim Grosbach
6ccfc507dc Many Thumb2 instructions can reference the full ARM register set (i.e.,
have 4 bits per register in the operand encoding), but have undefined
behavior when the operand value is 13 or 15 (SP and PC, respectively).
The trivial coalescer in linear scan sometimes will merge a copy from
SP into a subsequent instruction which uses the copy, and if that
instruction cannot legally reference SP, we get bad code such as:
  mls r0,r9,r0,sp
instead of:
  mov r2, sp
  mls r0, r9, r0, r2

This patch adds a new register class for use by Thumb2 that excludes
the problematic registers (SP and PC) and is used instead of GPR
for those operands which cannot legally reference PC or SP. The
trivial coalescer explicitly requires that the register class
of the destination for the COPY instruction contain the source
register for the COPY to be considered for coalescing. This prevents
errant instructions like that above.

PR7499




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109842 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-30 02:41:01 +00:00
Bob Wilson
fdb530d406 Fix a warning from gcc-4.0 (from the ppc buildbot).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109605 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-28 18:21:10 +00:00
Eric Christopher
bc16827be6 Filter out patterns that have PredicateOperands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109572 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-28 01:52:23 +00:00
Mikhail Glushenkov
67d985ffb2 Return -1 only on failure to execute a program.
Also fix some comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109499 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-27 11:19:36 +00:00
Eric Christopher
ecfa079206 80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109407 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-26 17:53:07 +00:00
Mikhail Glushenkov
b374d4fd82 Get rid of exceptions in llvmc.
llvmc can be now compiled with llvm-gcc on Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109215 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 03:42:55 +00:00
Eric Christopher
07fdd897e2 Hack around extracts that aren't easy to process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109043 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 22:07:19 +00:00
Chris Lattner
444e2f530e remove option from tablegen for building static header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108893 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 19:45:21 +00:00
Bruno Cardoso Lopes
94143ee625 Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108769 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 23:32:44 +00:00
Mikhail Glushenkov
cf95ecceba Remove code duplication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108718 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 17:17:22 +00:00
Mikhail Glushenkov
b32d8dd592 Better error reporting for switch_list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108714 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 17:17:10 +00:00
Daniel Dunbar
54074b5f04 TblGen/AsmMatcher: Add support for honoring instruction Requires<[]> attributes as part of the matcher.
- Currently includes a hack to limit ourselves to "In32BitMode" and "In64BitMode", because we don't have the other infrastructure to properly deal with setting SSE, etc. features on X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 05:44:09 +00:00
Mikhail Glushenkov
fc97aeb4e6 llvmc: Add a new option type (switch_list).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108673 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 03:16:25 +00:00
Bill Wendling
b9449d6639 Update comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108571 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-16 23:10:00 +00:00
Bill Wendling
7431beaba2 Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and
thus is a much more meaningful name.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108563 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-16 22:20:36 +00:00
Duncan Sands
3472766f9e Convert some tab stops into spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108130 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-12 08:16:59 +00:00
Jakob Stoklund Olesen
4f8e771ae8 Replace copyRegToReg with COPY in FastISelEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108071 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-11 03:53:50 +00:00
Dan Gohman
84023e0fbe Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
 - Eschew ST0 and ST1 for return values.
 - Fix the PIC base register initialization so that it doesn't ever
   fail to end up the top of the entry block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 09:00:22 +00:00
Bruno Cardoso Lopes
e86b01c153 Start the support for AVX instructions with 256-bit %ymm registers. A couple of
notes:
- The instructions are being added with dummy placeholder patterns using some 256
  specifiers, this is not meant to work now, but since there are some multiclasses
  generic enough to accept them,  when we go for codegen, the stuff will be already
  there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
  file.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107996 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 18:27:43 +00:00
Bob Wilson
02266e29f9 --- Reverse-merging r107947 into '.':
U    utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U    test/CodeGen/X86/fast-isel.ll
U    test/CodeGen/X86/fast-isel-loads.ll
U    include/llvm/Target/TargetLowering.h
U    include/llvm/Support/PassNameParser.h
U    include/llvm/CodeGen/FunctionLoweringInfo.h
U    include/llvm/CodeGen/CallingConvLower.h
U    include/llvm/CodeGen/FastISel.h
U    include/llvm/CodeGen/SelectionDAGISel.h
U    lib/CodeGen/LLVMTargetMachine.cpp
U    lib/CodeGen/CallingConvLower.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U    lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U    lib/CodeGen/SelectionDAG/FastISel.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U    lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U    lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U    lib/CodeGen/SelectionDAG/TargetLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.h
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86FastISel.cpp
U    lib/Target/X86/X86ISelLowering.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:37:18 +00:00
Dan Gohman
a5d4391d6d These changes should have accompanied r107943.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 00:59:16 +00:00
Dale Johannesen
7835f1fcdb Changes to ARM tail calls, mostly cosmetic.
Add explicit testcases for tail calls within the same module.
Duplicate some code to humor those who think .w doesn't apply on ARM.
Leave this disabled on Thumb1, and add some comments explaining why it's hard
and won't gain much.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107851 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 01:18:23 +00:00
Dan Gohman
f595141525 Revert 107840 107839 107813 107804 107800 107797 107791.
Debug info intrinsics win for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107850 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 01:00:56 +00:00
Chris Lattner
9fc05227a2 Implement the major chunk of PR7195: support for 'callw'
in the integrated assembler.  Still some discussion to be
done.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107825 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07 22:27:31 +00:00
Dan Gohman
eabaed26c3 Give FunctionLoweringInfo an MBB member, avoiding the need to pass it
around everywhere, and also give it an InsertPt member, to enable isel
to operate at an arbitrary position within a block, rather than just
appending to a block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107791 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07 16:47:08 +00:00
Jakob Stoklund Olesen
a4e1ba53dd Add a new target independent COPY instruction and code to lower it.
The COPY instruction is intended to replace the target specific copy
instructions for virtual registers as well as the EXTRACT_SUBREG and
INSERT_SUBREG instructions in MachineFunctions. It won't we used in a selection
DAG.

COPY is lowered to native register copies by LowerSubregs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02 22:29:50 +00:00
Jakob Stoklund Olesen
65766ce7df Clean up TargetOpcodes.h a bit, and limit the number of places where the full
list of predefined instructions appear. Add some consistency checks.

Ideally, TargetOpcodes.h should be produced by TableGen from Target.td, but it
is hardly worth the effort.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107520 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02 21:44:22 +00:00
Duncan Sands
ef36d864d6 Remove unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106834 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 09:35:33 +00:00
Bob Wilson
e9c2615b76 Change array references to match my previous change to use the public type
names for the array fields.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106803 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 22:21:19 +00:00
Bob Wilson
1ac27cf5ae Fix up some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106795 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 22:04:30 +00:00
Bob Wilson
9969bc3d19 Use the struct tags mandated by ARM's ABI. Also use the public type names for
the array fields in these structs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106794 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 22:03:41 +00:00
Nico Weber
50b9efc2a8 Add support for the x86 instructions "pusha" and "popa".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 20:00:58 +00:00
Bruno Cardoso Lopes
81cd7ffe45 Fix a tblgen bug.
Given the pattern below as an example:
list<dag> Pattern = [(set RC:$dst, (v4f32 (shufp:src3 RC:$src1,
                            (mem_frag addr:$src2))))];

The right reference resolving should lead to:
list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp:src3 VR128:$src1,
                            (mem_frag addr:$src2))))];
But was yielding:
list<dag> Pattern = [(set VR128:$dst, (v4f32 (shufp VR128:$src1,
                            (mem_frag addr:$src2))))];

Fix this by passing the right name when creating a new DagInit node.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106670 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 19:50:39 +00:00
Nick Lewycky
ec4c02d252 Don't link against libm and libpthread which don't exist in BeOS/Haiku. Also,
Haiku like Linux provides <regex.h>, so use it. Patch by Paul Davey!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106620 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 06:48:34 +00:00
Bruno Cardoso Lopes
e5104ac99a Fix a subtle multiclass bug: when using class inheritance on
a toplevel 'defm', make sure to properly resolve references.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106570 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 20:30:50 +00:00
Eric Christopher
1f4a1493fb Remove isTwoAddress from llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106470 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-21 20:35:09 +00:00
Nate Begeman
c4a1b652b2 Add support for returning multiple vectors via sret, which is how the ARM target expects the intrinsics to work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106406 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-20 21:09:52 +00:00
Dale Johannesen
10416803c1 An attempt to fix the problem Anton reported with
ARM tail calls.  Don't know if it works, but it
doesn't break Darwin.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106309 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 20:44:28 +00:00
Bruno Cardoso Lopes
6e0a99a7ab Teach tablegen how to inherit from classes in 'defm' definitions.
The rule is simple: only inherit from a class list if they come
in the end, after the last multiclass.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106305 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 19:53:41 +00:00
Dan Gohman
a606d955de Start TargetRegisterClass indices at 0 instead of 1, so that
MachineRegisterInfo doesn't have to confusingly allocate an extra
entry.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106296 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18 18:13:55 +00:00
Bruno Cardoso Lopes
93583c97f8 In case Rec is a definition and not a class, do the proper comparison!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106246 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17 23:00:16 +00:00
Nate Begeman
f8c4c27d84 Modify tablegen to support generating all NEON code used by clang at once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106207 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17 04:15:13 +00:00
Bruno Cardoso Lopes
477bf62048 Fix the handling of !if result, avoiding null results for non 'int'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106201 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17 01:50:39 +00:00
Bruno Cardoso Lopes
eba8f1893b For a tablegen expression such as !if(a,b,c), let 'a'
be evaluated for 'bit' operators


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106185 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17 00:31:36 +00:00
Sean Hunt
e3f647360c Fix the typo in my previous one-line commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106179 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-17 00:10:16 +00:00
Sean Hunt
a85e1957dd Make sure CMake can build the files added by my previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106178 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16 23:52:37 +00:00
Sean Hunt
16171446c6 Add preliminary clang attribute generation support.
The attribute class generation support is still somewhat limited.
See the accompanying clang commit for more details.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106174 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16 23:45:50 +00:00
Bruno Cardoso Lopes
e87de41189 let the '!eq' expression support 'int' and 'bit' types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106171 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-16 23:24:12 +00:00
Nate Begeman
4da883a56f Make VC++ happy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106054 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15 22:10:31 +00:00
Dale Johannesen
6470a116f1 Next round of tail call changes. Register used in a tail
call must not be callee-saved; following x86, add a new
regclass to represent this.  Also fixes a couple of bugs.
Still disabled by default; Thumb doesn't work yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106053 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-15 22:08:33 +00:00
Chris Lattner
f6c4a30984 generate better code in CheckComplexPattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105970 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-14 22:33:34 +00:00
Nate Begeman
918f8e4ab0 Add the last of the SemaChecking-gen code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105929 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-14 05:17:23 +00:00
Nate Begeman
d72c900152 Add a helping of comments
Add code for generating bits of semachecking


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105907 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-13 04:47:03 +00:00
Chris Lattner
5ca96988b0 declare a class with 'class' instead of struct to avoid tag mismatch
warnings, and don't shift by a bool.  Patch by Rizky Herucakra!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105886 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-12 15:46:56 +00:00