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3431 Commits

Author SHA1 Message Date
Chris Lattner
98a8ba0393 Fix a problem where probing for addressing modes caused expressions to be 
emitted too early.  In particular, this fixes
Regression/CodeGen/X86/regpressure.ll:regpressure3.

This also improves the 2nd basic block in 164.gzip:flush_block, which went from

.LBBflush_block_1:      # loopentry.1.i
        movzx %EAX, WORD PTR [dyn_ltree + 20]
        movzx %ECX, WORD PTR [dyn_ltree + 16]
        mov DWORD PTR [%ESP + 32], %ECX
        movzx %ECX, WORD PTR [dyn_ltree + 12]
        movzx %EDX, WORD PTR [dyn_ltree + 8]
        movzx %EBX, WORD PTR [dyn_ltree + 4]
        mov DWORD PTR [%ESP + 36], %EBX
        movzx %EBX, WORD PTR [dyn_ltree]
        add DWORD PTR [%ESP + 36], %EBX
        add %EDX, DWORD PTR [%ESP + 36]
        add %ECX, %EDX
        add DWORD PTR [%ESP + 32], %ECX
        add %EAX, DWORD PTR [%ESP + 32]
        movzx %ECX, WORD PTR [dyn_ltree + 24]
        add %EAX, %ECX
        mov %ECX, 0
        mov %EDX, %ECX

to

.LBBflush_block_1:      # loopentry.1.i
        movzx %EAX, WORD PTR [dyn_ltree]
        movzx %ECX, WORD PTR [dyn_ltree + 4]
        add %ECX, %EAX
        movzx %EAX, WORD PTR [dyn_ltree + 8]
        add %EAX, %ECX
        movzx %ECX, WORD PTR [dyn_ltree + 12]
        add %ECX, %EAX
        movzx %EAX, WORD PTR [dyn_ltree + 16]
        add %EAX, %ECX
        movzx %ECX, WORD PTR [dyn_ltree + 20]
        add %ECX, %EAX
        movzx %EAX, WORD PTR [dyn_ltree + 24]
        add %ECX, %EAX
        mov %EAX, 0
        mov %EDX, %EAX

... which results in less spilling in the function.

This change alone speeds up 164.gzip from 37.23s to 36.24s on apoc.  The
default isel takes 37.31s.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19650 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 01:06:26 +00:00
Chris Lattner
e9fe2bcac2 Fix indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19649 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 23:25:45 +00:00
Chris Lattner
869e0434ae Don't bother using max here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19647 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 23:02:13 +00:00
Chris Lattner
90d1be7eef Do not give token factor nodes outrageous weights 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19645 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 22:56:09 +00:00
Chris Lattner
5c65981a57 Two changes: 
1. Fold  [mem] += (1|-1) into inc [mem]/dec [mem] to save some icache space.
 2. Do not let token factor nodes prevent forming '[mem] op= val' folds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19643 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 22:10:42 +00:00
Chris Lattner
e10269ba30 Refactor load/op/store folding into it's own method, no functionality changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19641 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 19:25:26 +00:00
Chris Lattner
ae3ffba466 Fix a major regression last night that prevented us from producing [mem] op= reg 
operations.

The body of the if is less indented but unmodified in this patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19638 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 17:49:14 +00:00
Chris Lattner
2a4e508281 Codegen this: 
int %foo(int %X) {
        %T = add int %X, 13
        %S = mul int %T, 3
        ret int %S
}

as this:

        mov %ECX, DWORD PTR [%ESP + 4]
        lea %EAX, DWORD PTR [%ECX + 2*%ECX + 39]
        ret

instead of this:

        mov %ECX, DWORD PTR [%ESP + 4]
        mov %EAX, %ECX
        add %EAX, 13
        imul %EAX, %EAX, 3
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19633 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 06:48:02 +00:00
Tanya Lattner
7a866d9a43 Added tmp instructions to preserve ssa. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19632 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 06:47:26 +00:00
Chris Lattner
4ff348befa Fix test/Regression/CodeGen/X86/2005-01-17-CycleInDAG.ll and 132.ijpeg. 
Do not fold a load into an operation if it will induce a cycle in the DAG.

Repeat after me: dAg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19631 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 06:26:58 +00:00
Chris Lattner
cb1aa8d772 Do not fold a load into a comparison that is used by more than one place. 
The comparison will probably be folded, so this is not ok to do.
This fixed 197.parser.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19624 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 01:34:14 +00:00
Chris Lattner
c98279d371 Do not codegen 'xor bool, true' as 'not reg'. not reg inverts the upper bits 
of the bytereg.  This fixes yacr2, 300.twolf and probably others.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19622 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 00:23:16 +00:00
Chris Lattner
4df0de975a Set up the shift and setcc types. 
If we emit a load because we followed a token chain to get to it, try to
fold it into its single user if possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19620 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 00:00:33 +00:00
Tanya Lattner
7600587e66 Added paramters to a few functions in order to allow me to change the functions to preserve SSA 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19615 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-16 08:51:10 +00:00
Chris Lattner
da2ce11407 * Adjust to changes in TargetLowering interfaces. 
* Remove custom promotion for bool and byte select ops.  Legalize now
  promotes them for us.
* Allow folding ConstantPoolIndexes into EXTLOAD's, useful for float immediates.
* Declare which operations are not supported better.
* Add some hacky code for TRUNCSTORE to pretend that we have truncstore
  for i16 types.  This is useful for testing promotion code because I can
  just remove 16-bit registers all together and verify that programs work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19614 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-16 07:34:08 +00:00
Chris Lattner
ccad8439e0 cycles_t -> CycleCount_t 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19604 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-16 04:20:30 +00:00
Reid Spencer
bdf6a39d1c Rename BUILD_* to PROJ_* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19592 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-16 02:21:29 +00:00
Tanya Lattner
5fd2ef1e43 Fixed a couple of instructions that broke SSA. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19587 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-16 02:14:17 +00:00
Chris Lattner
638559aaa3 Improve compatiblity with HPUX on Itanium, patch by Duraid Madina 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19586 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-16 01:31:31 +00:00
Chris Lattner
45554a61f2 Add a new target-independent code generator flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19567 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-15 06:00:32 +00:00
Chris Lattner
e9ef81dd2f Add support for truncstore and *extload. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19566 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-15 05:22:24 +00:00
Chris Lattner
7f2afac1dc Adjust to CopyFromREg changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19561 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-14 22:37:41 +00:00
Chris Lattner
3c70764907 Fix Regression/CodeGen/PowerPC/2005-01-14-UndefLong.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19557 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-14 20:22:02 +00:00
Chris Lattner
fbd4de1d9b Fix: Regression/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19555 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-14 19:31:00 +00:00
Chris Lattner
18c2f13e0f Add new ImplicitDef node, rename CopyRegSDNode class to RegSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19535 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-13 20:50:02 +00:00
Chris Lattner
1d50b7fa53 Codegen factor nodes more intelligently according to perceived register pressure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19532 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-13 19:56:00 +00:00
Chris Lattner
c35807155c Initial trivial (but stupid) codegen for this node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19529 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-13 18:01:36 +00:00
Chris Lattner
636e79a20f Add some really pedantic assertions to the load folding code. Fix a bunch 
of cases where we accidentally emitted a load folded once and unfolded
elsewhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19522 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-13 05:53:16 +00:00
Chris Lattner
a0bb692b27 We can only fold a load into an op if there is exactly one use of the value. 
Checking to see if the load has two uses is not equivalent, as the chain
value may have zero uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19518 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 18:38:26 +00:00
Chris Lattner
9bbd992eb1 Try both ways to fold an add together. This allows us to generate this code 
imul %EAX, %EAX, 400
        add %ECX, %EAX
        add %ESI, DWORD PTR [%ECX + 4*%EDX]
        inc %EDX
        cmp %EDX, 100

instead of this:

        imul %EAX, %EAX, 400
        add %ECX, %EAX
        mov %EAX, %EDX
        shl %EAX, 2
        add %ECX, %EAX
        add %ESI, DWORD PTR [%ECX]
        inc %EDX
        cmp %EDX, 100


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19513 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 18:08:53 +00:00
Chris Lattner
2b9378646d Fix a major miscompilation where we were overwriting the scale reg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19511 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 07:33:20 +00:00
Chris Lattner
48034fd9f1 Do not use the type of the RHS constant to determine the type of the operation. 
This fails for shifts because the constant is always 8 bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19508 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 05:22:07 +00:00
Chris Lattner
a23ccfb124 Do not lose the offset from teh global when peephole optimizing instructions. 
This fixes FreeBench/pcompress


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19507 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 05:17:28 +00:00
Jeff Cohen
603fea9eb6 Fix C++ more compilatiom errors 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19504 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 04:29:05 +00:00
Chris Lattner
a56cea4495 Fix a compile error with VC++, which things that static const arrays need 
to be dynamically initialized. :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19503 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 04:23:22 +00:00
Chris Lattner
7dbcb75b15 Fix a bug that caused us to crash on povray. We weren't emitting an FP_REG_KILL into a block that had a successor with a FP PHI node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19502 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 04:21:28 +00:00
Chris Lattner
e11a9a93a8 Print a load of a null pointer (in intel mode) like this: 
mov %AX, WORD PTR [0]

instead of like this:

        mov %AX, WORD PTR []


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19501 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 04:07:11 +00:00
Chris Lattner
9f2cb3da48 Print a load of a null pointer like this: 
movw 0, %ax

instead of like this:

        movw , %ax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19500 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 04:05:19 +00:00
Chris Lattner
085c9955ca Fix a crash compiling povray on UINT_TO_FP from i16. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19499 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 04:00:00 +00:00
Chris Lattner
4292830fe5 There are no [mem] op= reg instructions for FP, so remove their entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19496 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 03:16:09 +00:00
Chris Lattner
db8c368d7b Fix a bug where we didn't insert FP_REG_KILL instructions into MBB's that 
contain FP PHI nodes but no other FP defining instructions.  This fixes
183.equake


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19495 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 02:57:10 +00:00
Chris Lattner
afce4306ec Fold TRUNCATE (LOAD P) into a smaller load from P. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19494 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 02:19:06 +00:00
Chris Lattner
ef6806c979 Be more careful about order of arg evalution for CopyToReg nodes. This shrinks 
256.bzip2 from 7142 to 7103 lines of .s file.

Second, add initial support for folding loads into compares, though this code
is dynamically dead for now. :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19493 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 02:02:48 +00:00
Chris Lattner
7ea64f5d12 Fold some more [mem] op= val operators. This allows us to things like this 
several times in 256.bzip2:

        mov %EAX, DWORD PTR [%ESP + 204]
-       mov %EAX, DWORD PTR [%EAX]
-       or %EAX, 2097152
-       mov %ECX, DWORD PTR [%ESP + 204]
-       mov DWORD PTR [%ECX], %EAX
+       or DWORD PTR [%EAX], 2097152


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19492 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-12 01:28:00 +00:00
Chris Lattner
dbba22fa2a Fold loads into sign/zero extends. instead of: 
mov %AL, BYTE PTR [%EDX + l18_length_code]
  movzx %EAX, %AL

Emit:

  movzx %EAX, BYTE PTR [%EDX + l18_length_code]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19489 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 23:33:00 +00:00
Chris Lattner
837caa7223 Comment out debug code :) 
Select [mem] += Val operations.  For constants, we used to get:

  mov %ECX, -32768
  add %ECX, DWORD PTR [l4_match_start]
  mov DWORD PTR [l4_match_start], %ECX

Now we get:

  add DWORD PTR [l4_match_start], -32768

For other values we used to get:

  mov %EBP, %EDI   ;; because the add destroys the value
  add %EBP, DWORD PTR [l4_input_len]
  mov DWORD PTR [l4_input_len], %EBP

now we get:

  add DWORD PTR [l4_input_len], %EDI

Both of these use less registers than the alternative, are faster and smaller.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19488 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 23:21:30 +00:00
Chris Lattner
5f75d9a88c Handle the global address case here, not just the offset case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19487 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 22:58:43 +00:00
Chris Lattner
c4b6a78980 Treat int constants as not requiring a register, since they are almost always 
folded into an instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19486 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 22:29:12 +00:00
Chris Lattner
a5ade060db * Factor a bunch of binary operator cases into shared code. 
* Fold loads into Add, sub, and, or, xor and mul when possible.
* Codegen shl X, 1 as add X, X


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19483 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 21:19:59 +00:00
Chris Lattner
947d544e29 Fold multiplies by 3,5,9 into addressing modes when possible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19480 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 19:37:02 +00:00
Chris Lattner
51a263434a Instead of generating stuff like this: 
mov %ECX, %EAX
        add %ECX, 32768
        mov %SI, WORD PTR [2*%ECX + l13_prev]

Generate this:

        mov %SI, WORD PTR [2*%ECX + l13_prev + 65536]

This occurs when you have a GEP instruction where an index is
"something + imm".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19472 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 06:36:20 +00:00
Chris Lattner
31805bf2b6 Implement MEMCPY natively in terms of rep movs* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19468 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 06:19:26 +00:00
Chris Lattner
989de030c4 Implement memset -> rep stos* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19467 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 06:14:36 +00:00
Chris Lattner
795069dd38 Announce that we don't support mem ops yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19466 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 05:57:36 +00:00
Chris Lattner
a95589be3f Teach the address selector to make 'reg+reg' addressing modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19457 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 04:40:19 +00:00
Chris Lattner
d4dab929d8 Emit NOT instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19455 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 04:31:30 +00:00
Chris Lattner
6c07aee7c9 Fix a bug emitting branches that broke a lot of programs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19452 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 04:06:27 +00:00
Chris Lattner
ef7ba0756b Be more careful where we set ContainsFPCode. We were missing a set in the 
int -> FP casting code.  Note that we don't have to set it for FP operations
that take FP values as operands: whatever produces the FP value will set the
flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19451 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 03:50:45 +00:00
Chris Lattner
a3aa2e2882 Fix a major bug in setcc/cmov folding, where we accidentally 
inverted the sense of the comparison.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19450 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 03:37:59 +00:00
Chris Lattner
1133309e57 Take register pressure into account when we have to decide whether to 
evaluate the LHS or the RHS of an operation first.  This causes good things
to happen.  For example, instead of compiling a loop to this:

.LBBstrength_result7_1: # loopentry
        movl 16(%esp), %edi
        movl (%edi), %edi             ;;; LOAD
        movl (%ecx), %ebx
        movl $2, (%eax,%ebx,4)
        movl (%edx), %ebx
        movl %esi, %ebp
        addl $21, %ebp
        addl $42, %esi
        cmpl $0, %edi                 ;;; USE
        cmovne %esi, %ebp
        cmpl %ebp, %ebx
        movl %ebp, %esi
        jg .LBBstrength_result7_1

We now compile it to this:

.LBBstrength_result7_1: # loopentry
        movl %edi, %ebx
        addl $42, %ebx
        addl $21, %edi
        movl (%ecx), %ebp              ;; LOAD
        cmpl $0, %ebp                  ;; USE
        cmovne %ebx, %edi
        movl (%edx), %ebx
        movl $2, (%eax,%ebx,4)
        movl (%esi), %ebx
        cmpl %edi, %ebx
        jg .LBBstrength_result7_1

Which reduces register pressure enough (in this case) to avoid spilling in the
loop.

As another example, consider the CodeGen/X86/regpressure.ll testcase.  We
used to generate this code for both cases:

regpressure1:
        subl $32, %esp
        movl %esi, 12(%esp)
        movl %edi, 8(%esp)
        movl %ebx, 4(%esp)
        movl %ebp, (%esp)
        movl 36(%esp), %ecx
        movl (%ecx), %eax
        movl 4(%ecx), %edx
        movl %edx, 24(%esp)
        movl 8(%ecx), %edx
        movl %edx, 16(%esp)
        movl 12(%ecx), %edx
        movl 16(%ecx), %esi
        movl 20(%ecx), %edi
        movl 24(%ecx), %ebx
        movl %ebx, 28(%esp)
        movl 28(%ecx), %ebx
        movl 32(%ecx), %ebp
        movl %ebp, 20(%esp)
        movl 36(%ecx), %ecx
        imull 24(%esp), %eax
        imull 16(%esp), %eax
        imull %edx, %eax
        imull %esi, %eax
        imull %edi, %eax
        imull 28(%esp), %eax
        imull %ebx, %eax
        imull 20(%esp), %eax
        imull %ecx, %eax
        movl (%esp), %ebp
        movl 4(%esp), %ebx
        movl 8(%esp), %edi
        movl 12(%esp), %esi
        addl $32, %esp
        ret

This code is basically trying to do all of the loads first, then execute all
of the multiplies.  Because we run out of registers, lots of spill code happens.
We now generate this code for both cases:

regpressure1:
        movl 4(%esp), %ecx
        movl (%ecx), %eax
        movl 4(%ecx), %edx
        imull %edx, %eax
        movl 8(%ecx), %edx
        imull %edx, %eax
        movl 12(%ecx), %edx
        imull %edx, %eax
        movl 16(%ecx), %edx
        imull %edx, %eax
        movl 20(%ecx), %edx
        imull %edx, %eax
        movl 24(%ecx), %edx
        imull %edx, %eax
        movl 28(%ecx), %edx
        imull %edx, %eax
        movl 32(%ecx), %edx
        imull %edx, %eax
        movl 36(%ecx), %ecx
        imull %ecx, %eax
        ret

which is much nicer (when we fold loads into the muls it will be even better).
The old instruction selector used to produce the good code for regpressure1
but not for regpressure2, as it depended on the order of operations in the
LLVM code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19449 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-11 03:11:44 +00:00
Chris Lattner
24aad1b0c1 Fold setcc instructions into selects. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19438 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-10 22:10:13 +00:00
Chris Lattner
57fbfb5879 Add conditional moves for the parity flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19437 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-10 22:09:33 +00:00
Chris Lattner
a13d3236d1 Implement 8-bit multiply for X86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19435 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-10 20:55:48 +00:00
Chris Lattner
bd9f0eefb2 Codegen (Reg|imm)+&GV as an LEA, because we cannot put it into the immediate field 
of an ADDri (due to current restrictions on MachineOperand :( ).  This allows
us to generate:

        leal Data+16000, %edx

instead of:

        movl $Data, %edx
        addl $16000, %edx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19420 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-09 20:20:29 +00:00
Chris Lattner
250208587d Fix copy and pasto's for FP -> Int. This fixes fldry 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19418 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-09 19:49:59 +00:00
Chris Lattner
590d800a12 Initial implementation of FP->INT and INT->FP casts 
Also, fix zero_extend from bool to i8, which fixes Shootout/objinst.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19414 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-09 18:52:44 +00:00
Chris Lattner
6e7c47c12d Fix a subtle bug involving constant expr casts from int to fp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19410 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-09 01:49:29 +00:00
Chris Lattner
1482458b23 Implement varargs and returnaddress/frameaddress intrinsics. With this 
patch, all of SingleSource/UnitTests passes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19408 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-09 00:01:27 +00:00
Chris Lattner
b0802651bf Okay 15th time is the charm. Looking at the vector size is useless as it 
gets clobbered by a previous statement.  This fixes all calls finally.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19399 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-08 20:51:36 +00:00
Chris Lattner
6cc70ef0f9 Okay, my off by one was actually off by two. This fixes Generic/2003-07-07-BadLongConst.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19398 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-08 20:39:31 +00:00
Chris Lattner
ce45d65d9a Fix off by one error 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19396 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-08 20:31:34 +00:00
Chris Lattner
5188ad735c Adjust to changes in LowerCallTo interface 
Minor bugfixes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19376 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-08 19:28:19 +00:00
Chris Lattner
8c92628d1c Wrap long line. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19367 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-08 06:59:50 +00:00
Chris Lattner
7ab65934a0 The X86 instruction selector already handles codegen of: 
store float 123.45, float* %P

as an integer store.  This adds handling of float immediate stores as integers
for arguments passed function calls.

This is now tested by CodeGen/X86/store-fp-constant.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19364 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-08 05:45:24 +00:00
Chris Lattner
18ad19488d Allow the selection-dag based selector to be diabled with -disable-pattern-isel. 
For now, this is the default, as the current selector is missing some big pieces.
To enable the new selector, pass -disable-pattern-isel=false to llc or lli.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19335 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-07 07:50:50 +00:00
Chris Lattner
8acb1ba04d Reimplementation of the X86 pattern isel. This is still missing many large 
pieces, but can already do amazing things in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19334 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-07 07:49:41 +00:00
Chris Lattner
d844d0128a This file is now dead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19333 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-07 07:49:05 +00:00
Chris Lattner
95cdb36714 Add a new prototype 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19332 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-07 07:48:33 +00:00
Chris Lattner
6ac95f9679 Codegen -1 and -0.0 more efficiently. This implements CodeGen/X86/negatize_zero.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19313 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-06 21:19:16 +00:00
Jeff Cohen
d01f65aea1 Fix CBE code so that it compiles with VC++. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19303 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-06 04:21:49 +00:00
Chris Lattner
5384b38ccc 1. If a double FP constant must be put into a constant pool, but it can be 
precisely represented as a float, put it into the constant pool as a
   float.
2. Use the cbw/cwd/cdq instructions instead of an explicit SAR for signed
   division.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19291 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-05 16:30:14 +00:00
Chris Lattner
0539313fe5 Minor optimization to allocate R8 registers in a better order. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19289 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-05 16:09:16 +00:00
Jeff Cohen
1c32f79a82 Revert elimination of global variable hack... still needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19273 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-03 16:34:19 +00:00
Chris Lattner
10197ff5cd ADC and IMUL are also commutable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19264 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-03 01:27:59 +00:00
Chris Lattner
35e5c7c186 This hunk: 
-  unsigned TrueValue = getReg(TrueVal, BB, BB->begin());
+  unsigned TrueValue = getReg(TrueVal);

Fixes the PPC regressions from last night.

The other hunk is just a clarity improvement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19263 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-02 23:07:31 +00:00
Jeff Cohen
40296bdf27 Eliminate the use of the global variable hack in the X86 target that was used 
to get Visual Studio to link in X86.lib to the executables that need it.  There
is another way of doing it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19252 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-02 04:23:12 +00:00
Chris Lattner
5aee0b97aa Disable 2->3 address promotion of add and inc instructions to LEA's. In 
addition to being three address, LEA's don't set the flags.

This fixes 186.crafty.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19251 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-02 04:18:17 +00:00
Chris Lattner
5dd350defd Add a new method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19249 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-02 02:38:18 +00:00
Chris Lattner
eb96ec52ff Add support for SETNPr to lower to memory form. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19248 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-02 02:37:46 +00:00
Chris Lattner
bcea4d6f28 Implement the convertToThreeAddress method, add support for inverting JP/JNP 
branches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19247 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-02 02:37:07 +00:00
Chris Lattner
cc65beeb39 Two changes here: 
1. Add new instructions for checking parity flags: JP, JNP, SETP, SETNP.
2. Set the isCommutable and isPromotableTo3Address bits on several
   instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19246 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-02 02:35:46 +00:00
Chris Lattner
273f2280f2 Add some bits that can be set for instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19241 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-02 02:27:48 +00:00
Chris Lattner
6dec0b09d5 Fix a FIXME: Select instructions on longs were miscompiled. 
While we're at it, improve codegen of select instructions.  For this
testcase:

int %test(bool %C, int %A, int %B) {
  %D = select bool %C, int %A, int %B
  ret int %D
}

We used to generate this code:

_test:
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        b .LBB_test_3   ;
.LBB_test_2:    ;
        or r5, r4, r4
.LBB_test_3:    ;
        or r3, r5, r5
        blr

Now we emit:

_test:
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        or r4, r5, r5
.LBB_test_2:    ;
        or r3, r4, r4
        blr

-Chris


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19214 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-01 16:10:12 +00:00
Chris Lattner
e7f96c515e Substantially improve the code generated by non-folded setcc instructions. 
In particular, instead of compiling this:

bool %test(int %A, int %B) {
  %C = setlt int %A, %B
  ret bool %C
}

to this:

test:
        save %sp, -96, %sp
        subcc %i0, %i1, %g0
        bl .LBBtest_1   !
        nop
        ba .LBBtest_2   !
        nop
.LBBtest_1:     !
        or %g0, 1, %i0
        ba .LBBtest_3   !
        nop
.LBBtest_2:     !
        or %g0, 0, %i0
        ba .LBBtest_3   !
        nop
.LBBtest_3:     !
        restore %g0, %g0, %g0
        retl
        nop

We now compile it to this:

test:
        save %sp, -96, %sp
        subcc %i0, %i1, %g0
        or %g0, 1, %i0
        bl .LBBtest_2   !
        nop
.LBBtest_1:     !
        or %g0, %g0, %i0
.LBBtest_2:     !
        restore %g0, %g0, %g0
        retl
        nop


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19213 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-01 16:06:57 +00:00
Chris Lattner
f376e5e5f6 Fix PR490 
Fix testcase CodeGen/CBackend/2004-12-28-LogicalConstantExprs.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19176 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-12-29 04:00:09 +00:00
Chris Lattner
6b4f501470 Remove unused enum value 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19024 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-12-17 22:41:46 +00:00
Chris Lattner
84c556e92a Remove unused #include 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19021 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-12-17 19:07:04 +00:00
Chris Lattner
8cdbc35216 Change the sentinal 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19007 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-12-17 00:46:51 +00:00
Chris Lattner
11cf7aa775 Create a stack slot for the return address lazily instead of eagerly. This 
save small amounts of time for functions that don't call llvm.returnaddress
or llvm.frameaddress (which is almost all functions).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19006 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-12-17 00:07:46 +00:00
Tanya Lattner
acd6782470 Chris is a pain ;) Removing reassociate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19005 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-12-16 23:16:16 +00:00